JPH036844U - - Google Patents

Info

Publication number
JPH036844U
JPH036844U JP1989064939U JP6493989U JPH036844U JP H036844 U JPH036844 U JP H036844U JP 1989064939 U JP1989064939 U JP 1989064939U JP 6493989 U JP6493989 U JP 6493989U JP H036844 U JPH036844 U JP H036844U
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
elements
signal layer
lsi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989064939U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989064939U priority Critical patent/JPH036844U/ja
Publication of JPH036844U publication Critical patent/JPH036844U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
JP1989064939U 1989-06-05 1989-06-05 Pending JPH036844U (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989064939U JPH036844U (de) 1989-06-05 1989-06-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989064939U JPH036844U (de) 1989-06-05 1989-06-05

Publications (1)

Publication Number Publication Date
JPH036844U true JPH036844U (de) 1991-01-23

Family

ID=31596321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989064939U Pending JPH036844U (de) 1989-06-05 1989-06-05

Country Status (1)

Country Link
JP (1) JPH036844U (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62101062A (ja) * 1985-10-28 1987-05-11 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 集積回路装置実装モジユ−ル

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62101062A (ja) * 1985-10-28 1987-05-11 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 集積回路装置実装モジユ−ル

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