JPH0368873A - Peak rectifying circuit - Google Patents

Abstract

PURPOSE:To surely perform peak rectification without generating malfunction even when noise is mixed into an input signal by limiting the value of the current supplied to a rectifying transistor by the second constant current circuit. CONSTITUTION:A power supply is connected to the collectors of rectifying transistors 10a, 10b through the second constant current circuit 18. A rectified current is inputted to a smoothing condenser 16 which is turn repeats charge and discharge according to its time constant to smooth the rectified waveform. Therefore, at the time of the boosting of input voltage, the value of the current capable of being allowed to flow by the rectifying transistors 10a, 10b is limited to the max. Ico2. At the time of the dropping of input voltage, the smoothing condenser 16 is discharged but rapidly discharged as compared with a conventional case by the current Ico1 flowing to a constant current circuit 14. Whereupon, even when noise 100 is mixed into an input signal, no conventional overcurrent flows to the rectifying transistors 10a, 10b and output voltage is not boosted abruptly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a peak rectifier circuit, and particularly to a peak rectifier circuit with excellent noise resistance.

[Conventional techniques] Peak rectifier circuits that can obtain the positive wave height (direct current DC signal) of the input signal regardless of the input waveform are widely used in signal processing systems of reading circuits that read information recorded on floppy disks. It is used.

FIG. 4 shows a circuit diagram of a conventional peak rectifier circuit.

In the figure, rectifying transistors 10a and iob are connected in parallel with their collectors and emitters connected to each other,
A power supply 12 is connected to its collector. Further, an input terminal to which an alternating current signal is input is connected to the base.

On the other hand, output terminals are connected to the emitters of the transistors 10a and 10b, and input and output transistors 14a
Constant current circuit 1 using a current mirror consisting of , 14b
4 is connected so that a constant current flows through the collector of the output transistor 14b. A smoothing capacitor 16 is connected in parallel with this constant current circuit 14, and is configured to perform charging and discharging and smoothing by output signals from the rectifying transistors 10a and 10b.

A conventional peak rectifier circuit has such a circuit configuration, and as shown in FIGS. 3(a) and 3(b), differential signals whose phases are inverted to each other are connected to the transistor 10a.

When input to 10b, each transistor turns on and off using this signal as a base current, and outputs only the positive value of the input signal. Since each transistor is connected in parallel, the output signal becomes a full-wave rectified waveform as shown by the broken line in FIG. 3(C), and is further smoothed by the smoothing capacitor 16, resulting in the output signal as shown in FIG. 3(c). This becomes the output waveform.

In this way, the peak rectifier circuit can obtain a DC signal with a peak value regardless of the waveform of the input signal, and therefore can be used for peak detection using a threshold value.

[Problems to be Solved by the Invention] However, the above conventional peak rectifier circuit has several problems. As described above, in the conventional peak rectifier circuit, the rectifying transistor has a collector connected to a power source and is an emitter follower with an emitter as an output terminal, and has an extremely low output impedance. Therefore,
As shown in FIGS. 3(a) and 3(b), when noise 100 is mixed into the input differential signal, this noise 100 causes transistors 10a, 1. Ob outputs a large current and instantly charges the smoothing capacitor 16. Therefore, the output signal sharply increases at the point where the noise 100 is mixed, as shown in FIG. 3(C).

Furthermore, the smoothing capacitor 16 discharges the charged charge, but it takes a long time to discharge because the time constant is large, and as shown in FIG. I'll keep it for a while.

As described above, the conventional peak rectifier circuit has a problem in that when noise is mixed into the input signal, the noise makes it impossible to obtain the original peak value output, resulting in malfunction.

The present invention has been made in view of the above-mentioned conventional problems, and an object thereof is to provide a peak rectifier circuit that does not malfunction even if noise is mixed into an input signal and has excellent noise resistance characteristics.

[Means for solving the problems] In order to achieve the above object, the peak rectifier circuit of the present invention includes a power source and a rectifying transistor to which a voltage from the power source is applied and rectifies an input signal inputted to the base. a first constant current circuit connected to the output terminal of the rectifying transistor; and a first constant current circuit connected to the output terminal of the rectifying transistor in parallel with the first constant current circuit, and charging and discharging by the output signal from the rectifying transistor. a smoothing capacitor that outputs the peak value of the input signal; a second constant current circuit that is connected between the power source and the rectifying transistor and that limits current supply to the rectifying transistor; The present invention is characterized by comprising a clamp circuit connected to the output end of the current circuit and applying a predetermined voltage to the output end of the second constant current circuit.

[Function] The peak rectifier circuit of the present invention has the above-described configuration, and limits the current value supplied to the rectifier transistor by the second constant current circuit. Then, even if noise is mixed into the input signal, the smoothing capacitor will not be charged instantly by this noise, and the output voltage will not rise suddenly.

Furthermore, since the first constant current circuit sucks the discharge current discharged by the smoothing capacitor, the discharge can be performed quickly, and the voltage increased due to noise can be returned to its original peak value.

As is well known, the constant current circuit does not uniquely determine the value of the output voltage by itself, and therefore, depending on the voltage, the transistors forming the constant current circuit may become saturated and become inoperable. However, in the present invention, since a predetermined voltage can be applied to the constant current circuit by the clamp circuit, the constant current circuit can operate reliably without saturating the transistors.

[Example 7] Preferred embodiments of the peak rectifier circuit according to the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of this embodiment. In the figure, rectifying transistors 10a and 10b are connected in parallel with their collectors and emitters connected to each other. Further, an input terminal to which an alternating current signal is input is connected to its base, and a differential signal is input to each transistor.

On the other hand, output terminals are connected to the emitters of transistors 10a and 10b, and input and output transistors 1.4
A first constant current circuit 14 using a current mirror consisting of a and 1.4b is also connected.

A smoothing capacitor 16 is connected in parallel with this first constant current circuit 14, and rectifying transistors 1, Oa, 1 .
The configuration is such that charging and discharging are performed using the output signal from Ob, and the output signal is smoothed.

Here, the characteristic feature of this embodiment is that the second constant current circuit 1 is connected to the collectors of the rectifying transistors lQa and 10b.
The power supply was connected via 8. This second constant current circuit 18 is composed of input and output transistors 18a and 18b whose bases are connected, both of which are PN.
It is P-shaped.

The input transistor 18a has P between its collector and base.
It is a so-called diode connection connected through an NP type transistor, and the ratio of the emitter areas of the input transistor 18a and the output transistor 18b is N1.The current from the power supply 12 supplied to the input transistor 18a is Iref. , when the collector current of the output transistor 18b is I c O2, Ico2! It is known that the relationship NXIref exists, and a constant current 1 co 2 can always be supplied regardless of the output voltage.

Furthermore, the output transistor 18b of the second constant current circuit 18
A clamp circuit 2 is installed at the emitter of the
0 is connected. This clamp circuit 20 is composed of two diode-connected transistors 20a and 20b and a PNP transistor 20c with a common collector connected in series with the power supply 12. Therefore, when the base-collector voltage of each transistor is VBE, , the potential Vp at two points in the figure is maintained at a constant voltage of V p wV CCV B E .

Note that the reference current 1r flowing through the input transistor 14a also flows through the collector of the output transistor 14b of the constant current circuit 14.
A constant current Ic0 approximately proportional to ef (However, Ico
<Ico2) flows, and this 1 input and output transistors 14a, 1 of the constant current circuit 14
4b, the collector of the input transistor 18a of the second constant current circuit 18 and the clamp circuit 20 are connected via NPN transistors, respectively, to form a current mirror.

The peak rectifier circuit of this embodiment has the circuit configuration as described above, and its operation will be explained below using the timing chart of FIG. 2.

Figures 2(a) and 2(b) show the rectifying transistor lQ.
The input waveforms input to a and 10b are respectively shown. Generally, when processing signals read from a magnetic recording medium such as a floppy disk, differential signals whose phases are inverted to each other are often used. When such a differential signal is input, the rectifying transistors 10a and 10b are turned on and off using this signal as a control signal to rectify the input signal. That is, each transistor 10a, lQb is turned on only when the input signal is a positive value, and a collector-emitter current flows, but the positive value of each input signal is alternately input, and each transistor 10a, 10b is connected in parallel. Therefore, the waveform is only in one direction as shown by the broken line in FIG. 3(c).

Then, such a rectified waveform is input to the smoothing capacitor 16, and the smoothing capacitor 16 repeats charging and discharging according to its time constant to smooth the rectified waveform.

In this embodiment, as described above, the power supply 12 is connected to the collectors of the rectifying transistors 10a+10b via the second constant current circuit 18. Therefore, when the input voltage increases, the current value that can flow through the rectifying transistors 10a and 10b is limited to the maximum I c O2. Further, when the input terminal falls, the smoothing capacitor 16 is discharged, but due to the current I co 1 flowing through the constant current circuit 14, it is discharged more quickly than in the past.

Then, as shown in Figures 2(a) and (b), even if the input signal contains 100 noise, this noise 10
0, the rectifying transistor 10a.

There is no excessive current flowing through 10b as in the conventional case,
Since the smoothing capacitor 16 is charged slightly more slowly than in the conventional case, the output voltage does not rise suddenly due to the noise 100 as in the conventional case.

Furthermore, since the first constant current circuit 14 absorbs only I co 1 of the current discharged by the smoothing capacitor 16, a steeper discharge is possible than in the past, and the voltage that has increased due to the noise 100 also rapidly returns to its original voltage value. Can return.

In this way, in this embodiment, voltage fluctuations due to noise can be suppressed, and as a result, peak rectification can be performed to stably output a peak value as shown by the solid line in FIG. 2(c).

Note that by controlling the charging and discharging of the smoothing capacitor 16 with two constant current circuits as in this embodiment, the output waveform becomes slightly sawtooth, but I co 1 and I co2
By appropriately setting , it is possible to perform peak rectification with sufficient accuracy.

[Effects of the Invention] As explained above, the peak rectifier circuit of the present invention can reliably perform peak rectification without malfunctioning even if noise is mixed into the input signal.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of an embodiment of the peak rectifier circuit according to the present invention, Fig. 2 is a timing chart of the same embodiment, Fig. 3 is a timing chart of a conventional peak rectifier circuit, and Fig. 4 is a conventional peak rectifier circuit. FIG. 5 is an embodiment of the peak rectifier circuit according to the present invention. 10a, 10b... Rectifying transistor 12
... Power supply 4 6 8 0 1st constant current circuit smoothing capacitor 2nd constant current circuit clamp circuit

Claims (1)

[Claims] A power source; a rectifying transistor to which a voltage from the power source is applied and rectifying an input signal input to its base; and a first constant current circuit connected to the output terminal of the rectifying transistor. a smoothing capacitor that is connected to the output terminal of the rectifying transistor in parallel with the first constant current circuit and is charged and discharged by the output signal from the rectifying transistor to output the peak value of the input signal; the power source and the rectifying transistor; a second constant current circuit that is connected between the rectifier transistor and limits the current supply to the rectifying transistor; A peak rectifier circuit characterized by comprising: a clamp circuit for applying voltage;