JPH0369130A - Resin-sealed type semiconductor device - Google Patents

Resin-sealed type semiconductor device

Info

Publication number
JPH0369130A
JPH0369130A JP1205928A JP20592889A JPH0369130A JP H0369130 A JPH0369130 A JP H0369130A JP 1205928 A JP1205928 A JP 1205928A JP 20592889 A JP20592889 A JP 20592889A JP H0369130 A JPH0369130 A JP H0369130A
Authority
JP
Japan
Prior art keywords
solder
leads
lead
resin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1205928A
Other languages
Japanese (ja)
Other versions
JP2765083B2 (en
Inventor
Kazuhiro Iino
飯野　和宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1205928A priority Critical patent/JP2765083B2/en
Publication of JPH0369130A publication Critical patent/JPH0369130A/en
Application granted granted Critical
Publication of JP2765083B2 publication Critical patent/JP2765083B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a low-cost semiconductor device whose outer leads are not bent or do not fall off by a method wherein the melting point of a solder used to form a solder bump is made different from that of a solder of the outer leads, the sheet thickness of the outer leads is made thicker than the sheet thickness of inner leads and protrusions or holes are formed between the outer leads and the inner leads. CONSTITUTION:The following are provided: a semiconductor chip 1 provided with solder bumps 2 which have been formed on electrode pads as input terminals; and a lead frame 3 which is provided with inner leads 3b, of a thin sheet thickness, connected to the solder bumps 2 and with outer leads 3a that are thicker than the sheet thickness of the inner leads 3b and that are coated with a solder whose melting point is lower than that of the solder bumps 2 and in which protrusions 6 or holes 5 are formed between the inner leads 3b and the outer leads 3a. For example, the thickness of outer leads 3a is made thicker than the thickness of inner leads 3b, and protrusions 6 and holes 5 are formed so as to expand the width at the boundary between the outer leads 3a and the inner leads 3b. In addition, solder bumps 2 are formed of a material composed of 90% of Sn and 10% of Pb, and a lead frame 3 is coated with a solder composed of 60% of Sn and 40% of Pb.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置に関し、特にリード構造
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and particularly to a lead structure.

〔従来の技術〕[Conventional technology]

従来、この種の樹脂封止型半導体装置は、集積回路が形
成された半導体チップの入出力端子である電極パッドに
金のはんだバンプを形成し、このはんだバンプに薄い金
属板で形成されたリードフレームのリードを接続し、こ
のリードフレームに接続された半導体チップを樹脂封止
して、その外郭体を形成していた。Conventionally, this type of resin-sealed semiconductor device has been made by forming gold solder bumps on electrode pads, which are the input/output terminals of a semiconductor chip on which an integrated circuit is formed, and attaching leads formed from a thin metal plate to the solder bumps. The leads of the frame were connected, and the semiconductor chip connected to the lead frame was sealed with a resin to form its outer body.

また、この樹脂封止型半導体装置に使用されるリードフ
レームは、薄い金属板、例えば、０．０Ｑ７ｍｍの銅板
から製作されていた。さらに、樹脂外郭体より突出する
リードフレームのリードを外力より保護するために、こ
の外郭体の内部周囲にキャリアリングと称する樹脂枠が
設けられていた。Further, the lead frame used in this resin-sealed semiconductor device was made from a thin metal plate, for example, a 0.0Q7 mm copper plate. Further, in order to protect the leads of the lead frame protruding from the resin outer shell from external forces, a resin frame called a carrier ring was provided around the inside of the outer shell.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上述した従来の樹脂封止型半導体装置で
は、リードフレームの板厚が薄いので、例えば、プリン
ト回路基板に実装するときにり−ドが曲るという欠点が
ある。また、実装後にも、機械的外力により、リードが
折れたり、樹脂外郭体より脱落したりするという欠点も
ある。さらに、キャリアリングのような樹脂枠を必要と
し、このため、樹脂封止金型の構造が複雑になるばかり
か、このためにコストが上昇するといった欠点もある。However, in the above-mentioned conventional resin-sealed semiconductor device, since the lead frame is thin, there is a drawback that, for example, the lead bends when mounted on a printed circuit board. Further, even after mounting, there is a drawback that the leads may break or fall off from the resin shell due to external mechanical force. Furthermore, a resin frame such as a carrier ring is required, which not only complicates the structure of the resin sealing mold but also increases costs.

このうえ、半導体チップの電極パッドに形成されるバン
プの材質が金であるという非常に高価の金属を使用して
いる欠点もある。Furthermore, there is also the disadvantage that the material of the bumps formed on the electrode pads of the semiconductor chip is gold, which is a very expensive metal.

本発明の目的は、かかる欠点を解決した樹脂封止型半導
体装置を提供することである。An object of the present invention is to provide a resin-sealed semiconductor device that solves these drawbacks.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の樹脂封止型半導体装置は、入出力端子である電
極パッド上に形成されたはんだバンプを有する半導体チ
ップと、このはんだバンプに接続される薄い板厚の内部
リードとこの内部リードの板厚より厚い板厚であるとと
もに前記はんだバンプより低い融点のはんだで被覆され
た外部リードとをもち、かつ、前記内部リードと前記外
部リードとの間に突起あるいは穴を有するリードフレー
ムを備え構成される。The resin-sealed semiconductor device of the present invention includes a semiconductor chip having solder bumps formed on electrode pads serving as input/output terminals, a thin internal lead connected to the solder bump, and a plate of the internal lead. The lead frame has an outer lead that is thicker than the solder bump and is coated with a solder having a melting point lower than that of the solder bump, and has a protrusion or a hole between the inner lead and the outer lead. Ru.

〔実施例〕 次に、本発明について図面を参照して説明する。〔Example〕 Next, the present invention will be explained with reference to the drawings.

第１図及び第２図は本発明の一実施例を示す樹脂封止型
半導体装置の縦断面図及び横断面図である。本発明の樹
脂封止型半導体装置においては、同図に示すように、そ
のリードフレーム３の外部リード３ａの厚さを内部リー
ド３ｂより厚さより厚くし、この外部リード３ａと内部
リード３ｂの境目に幅を拡げるように突起６と穴５を設
けたことである。1 and 2 are a longitudinal sectional view and a transverse sectional view of a resin-sealed semiconductor device showing an embodiment of the present invention. In the resin-sealed semiconductor device of the present invention, as shown in the figure, the outer leads 3a of the lead frame 3 are made thicker than the inner leads 3b, and the boundary between the outer leads 3a and the inner leads 3b is The protrusion 6 and the hole 5 are provided to increase the width.

このリードフレーム３の外部リードの板厚をより厚くす
ることによって、外部リード３ａの剛性を高くし、また
、突起６及び穴６を設けることによって樹脂封止後に外
部リードが脱落しないようにしたことである。By increasing the thickness of the external leads of this lead frame 3, the rigidity of the external leads 3a is increased, and by providing projections 6 and holes 6, the external leads are prevented from falling off after resin sealing. It is.

また、はんだバンプにおいては、安価で、接続の信頼性
が高い９０％Ｓ　ｎ　−１０％ｐｂの材料で製作したこ
とである。さらに、リードフレーム３の６０％Ｓ　ｎ　
−４０％ｐｂのはんだで被覆されている。ここで、前述
のリードフレーム３の外部リード３ａの厚さを、例えば
、０．１５ｍｍとし、内部リード３ｂの厚さを、例えば
、０．０３５ｍｍとしたことである。Furthermore, the solder bumps are made of a material of 90%S n -10%PB, which is inexpensive and has high connection reliability. Furthermore, 60%S n of lead frame 3
- Coated with 40% PB solder. Here, the thickness of the external lead 3a of the lead frame 3 described above is, for example, 0.15 mm, and the thickness of the internal lead 3b is, for example, 0.035 mm.

このリードフレームの製作に関しては、例えば、０．１
５ｍｍ板厚の銅箔をプレス型により打抜くと同時に内部
リードの部分を圧延する。次に、薄く圧延された内部リ
ード部をエツチング加工法で成形し、所要の内部リード
の形状を得る。このようにして得られたリードフレーム
に電解めっき法により６０％５ｎ−４０％ｐｂのはんだ
を被覆する。Regarding the production of this lead frame, for example, 0.1
A 5 mm thick copper foil is punched out using a press die, and at the same time the inner lead portion is rolled. Next, the thinly rolled inner lead portion is formed by an etching process to obtain the desired shape of the inner lead. The lead frame thus obtained is coated with 60% 5N-40% PB solder by electrolytic plating.

このようにして得られたリードフレームを使用して組立
られた半導体装置をプリント回路基板に実装するときは
、半導体装置をプリント回路基板に搭載し、１９０℃程
度に低温で加熱し、はんだをリフローして接続できるの
で、はんだバンプは再溶融することなく、安定した接続
を維持する。When mounting a semiconductor device assembled using the lead frame thus obtained on a printed circuit board, the semiconductor device is mounted on the printed circuit board, heated at a low temperature of about 190°C, and the solder is reflowed. The solder bumps maintain a stable connection without remelting.

第３図及び第４図は本発明の他の実施例を示す樹脂封止
型半導体装置の縦断面図及び横断面図である。本発明の
他の実施例での樹脂封止型半導体装置においては、同図
に示すように、リードフレームを厚さの異なる二枚の金
属板より、内部り−ド３ｄど外部リード３Ｃとを製作し
たことである。FIG. 3 and FIG. 4 are a longitudinal cross-sectional view and a cross-sectional view of a resin-sealed semiconductor device showing another embodiment of the present invention. In a resin-sealed semiconductor device according to another embodiment of the present invention, as shown in the figure, the lead frame is made of two metal plates with different thicknesses, and the internal leads 3d and external leads 3C are connected to each other. It was manufactured.

また、外部リード３Ｃの一端は折り曲げられ、脱落防止
機構を具備している。ここで、外部リード３ｃは、板厚
が０．１５ｍｍで、その表面を６０％Ｓ　ｎ　−４０％
ｐｂのはんだで被覆する。また、内部リード３ｄは、板
厚は、０．０３５ｍｍで、その表面は９０％Ｓ　ｎ　−
１０％ｐｂのはんだで被覆されている。その他は、前述
の実施例と同じである。Further, one end of the external lead 3C is bent and provided with a mechanism to prevent falling off. Here, the external lead 3c has a plate thickness of 0.15 mm, and its surface is 60%S n -40%
Cover with pb solder. Further, the internal lead 3d has a plate thickness of 0.035 mm, and its surface is 90%S n -
It is coated with 10% PB solder. The rest is the same as the previous embodiment.

この実施例では、内部リードと外部リードとをそれぞれ
板厚の異なる銅箔をプレス加工して製作出来るので、前
述の実施例のように銅箔の一部を均一の板厚に圧延する
工程が不要になり、この実施例は、前述の実施例より製
造上有利である。In this embodiment, the internal leads and external leads can be manufactured by pressing copper foils with different thicknesses, so there is no need to roll a part of the copper foil to a uniform thickness as in the previous embodiment. This embodiment has manufacturing advantages over the previous embodiment.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、はんだバンプを成形する
はんだとプリント回路基板に実装する外部リードのはん
だとを融点の異なるはんだを用い、外部リードの板厚を
内部リードの板厚より厚くし、外部リードと内部リード
との境目に突起あるいは穴を設けることによって、外部
リードが曲がったり、脱落したりすることがない安価な
樹脂封止型半導体装置が得られるという効果がある。As explained above, the present invention uses solder for forming solder bumps and solder for external leads mounted on a printed circuit board with different melting points, and that the external leads are made thicker than the internal leads. By providing a projection or a hole at the boundary between the external lead and the internal lead, an inexpensive resin-sealed semiconductor device can be obtained in which the external lead does not bend or fall off.

【図面の簡単な説明】[Brief explanation of drawings]

第１図及び第２図は本発明の一実施例を示す樹脂封止型
半導体装置の縦断面図及び横断面図、第３図及び第４図
は本発明の他の実施例を示す樹脂封止型半導体装置の縦
断面図及び横断面図である。 １・・・半導体チップ、２・・・はんだバンプ、３・・
・リードフレーム、３ａ、３　ｃ　−外部リード、３ｂ
、３Ｃ・・・内部リード、４・・・樹脂外郭体、５・・
・穴、６・・・突起。1 and 2 are longitudinal and transverse sectional views of a resin-sealed semiconductor device showing one embodiment of the present invention, and FIGS. 3 and 4 are resin-sealed semiconductor devices showing another embodiment of the present invention. FIG. 2 is a vertical cross-sectional view and a cross-sectional view of a stop type semiconductor device. 1... Semiconductor chip, 2... Solder bump, 3...
・Lead frame, 3a, 3c - External lead, 3b
, 3C...Internal lead, 4...Resin outer shell, 5...
・Hole, 6...Protrusion.

Claims (1)

【特許請求の範囲】[Claims] 入出力端子である電極パッド上に形成されたはんだバン
プを有する半導体チップと、このはんだバンプに接続さ
れる薄い板厚の内部リードとこの内部リードの板厚より
厚い板厚であるとともに前記はんだバンプより低い融点
のはんだで被覆された外部リードとをもち、かつ、前記
内部リードと前記外部リードとの間に突起あるいは穴を
有するリードフレームを備えることを特徴とする樹脂封
止型半導体装置。A semiconductor chip having solder bumps formed on electrode pads serving as input/output terminals, an internal lead having a thin plate thickness connected to the solder bump, and a plate having a thickness thicker than that of the internal lead, and the solder bump. 1. A resin-sealed semiconductor device comprising a lead frame having an outer lead coated with a solder having a lower melting point and a protrusion or hole between the inner lead and the outer lead.
JP1205928A 1989-08-08 1989-08-08 Resin-sealed semiconductor device Expired - Lifetime JP2765083B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1205928A JP2765083B2 (en) 1989-08-08 1989-08-08 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1205928A JP2765083B2 (en) 1989-08-08 1989-08-08 Resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPH0369130A true JPH0369130A (en) 1991-03-25
JP2765083B2 JP2765083B2 (en) 1998-06-11

Family

ID=16515061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1205928A Expired - Lifetime JP2765083B2 (en) 1989-08-08 1989-08-08 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP2765083B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629149U (en) * 1991-10-15 1994-04-15 新電元工業株式会社 Resin-sealed semiconductor device
US5939776A (en) * 1996-05-17 1999-08-17 Lg Semicon Co., Ltd. Lead frame structure having non-removable dam bars for semiconductor package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629149U (en) * 1991-10-15 1994-04-15 新電元工業株式会社 Resin-sealed semiconductor device
US5939776A (en) * 1996-05-17 1999-08-17 Lg Semicon Co., Ltd. Lead frame structure having non-removable dam bars for semiconductor package

Also Published As

Publication number Publication date
JP2765083B2 (en) 1998-06-11

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