JPH037060A - Variable overcurrent protective dc-dc converter - Google Patents

Variable overcurrent protective dc-dc converter

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Publication number
JPH037060A
JPH037060A JP13980189A JP13980189A JPH037060A JP H037060 A JPH037060 A JP H037060A JP 13980189 A JP13980189 A JP 13980189A JP 13980189 A JP13980189 A JP 13980189A JP H037060 A JPH037060 A JP H037060A
Authority
JP
Japan
Prior art keywords
voltage
overcurrent
converter
circuit
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13980189A
Other languages
Japanese (ja)
Inventor
Noriyasu Terasawa
徳保 寺沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP13980189A priority Critical patent/JPH037060A/en
Publication of JPH037060A publication Critical patent/JPH037060A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To protect a load against overload by additionally providing a voltage converting circuit in a conventional circuit then decreasing/increasing output voltage from the voltage converting circuit corresponding to increase/decrease of a voltage set value and providing the output voltage as an overcurrent set value to an overcurrent limiting circuit. CONSTITUTION:A control transistor Q2 constitutes an emitter follower circuit and voltage across a resistor R3 is applied onto the base of a transistor Q2, where the voltage across the resistor R3 is approximately equal to the voltage across a resistor R5. Since approximately identical current flows through the resistors R5, R4, voltages across the resistors R5, R4 are proportional to the resistances of the resistors R5, R4. Collector side terminal of the transistor Q2 is connected with >=-terminal of an overcurrent limiting circuit 2 which provides an overcurrent set value EIS.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明はスイッチングトランジスタなどのスイッチング
手段を介し、直流電源電圧を繰返し開閉して所定の直流
電圧を出力すると共に、出力電流を所定値以下に制限す
る過電流保護機能を持つDC−DCコンバータに関する
もので、特に定電力負荷を保護し得るように制限電流値
を直流出力電圧に応じて可変する機能を備えた可変過電
流保護DC−DCコンバークに関する。 なお以下各図において同一の符号は同一もしくは相当部
分を示す。また論理もしくはレベル“High“、“L
ow″は単に“H“、“I L nと記すものとする。
The present invention relates to a DC-DC converter that outputs a predetermined DC voltage by repeatedly opening and closing a DC power supply voltage through switching means such as a switching transistor, and has an overcurrent protection function that limits the output current to a predetermined value or less. In particular, the present invention relates to a variable overcurrent protection DC-DC converter having a function of varying a limiting current value according to a DC output voltage so as to protect a constant power load. Note that in the following figures, the same reference numerals indicate the same or corresponding parts. Also, logic or level “High”, “L”
ow" is simply written as "H" and "I L n.

【従来の技術】[Conventional technology]

第3図は過電流保護機能を持つ従来のDC−DCコンバ
ータの回路例を示す。同図において01は直流電源、0
2は負荷、Qlは直流電源01を繰返しオン、オフする
ためのスイッチングトランジスタ、04はこのトランジ
スタ(1の開閉を制御する制御回路、03はこの制御回
路04の直流電源である。 またLlはトランジスタQ1によって断続された出力直
流電圧を平滑化するための平滑リアクトル、C1は同じ
く平滑コンデンサ、DlはトランジスタQ1のオフ時に
リアクトルL1の電流路となるフライホイルダイオード
、R1はこのDC−DCコンバータの出力電流■0を検
出するための電流検出抵抗である。 次に制御回路04において、lはPWM (パルス中変
調)コンパレータで、このコンパレータ1は、その+(
プラス)端子に所定周期、所定振巾の鋸歯状の高周波(
搬送波ともいう)の電圧EIOを入力すると共に、その
2つの−(マイナス)端子ニ可変の比較電圧Ell、 
 R12を入力しており、鋸歯状波電圧R100値がこ
の比較電圧Ell、 R12のうち何れか低い方の電圧
を下回る期間にはその出力を°“L”としてスイッチン
グトランジスタQ1をONさせ、逆に鋸歯状波電圧EI
Oが前記低い方の電圧を上回る期間にはその出力を“H
”としてトランジスタQ1をOFFさせる。このように
してPWMコンパレータ1の入力する比較電圧Ellま
たはR12(の何れか低い方の電圧)の増、減に応じて
、スイッチングトランジスタQ1のON時間比=(ON
時間)/ ((ON時間)+(OFF時間))= (O
N時間)/(搬送波周期)の値、従ってトランジスタQ
lの (出力(平均)電圧)/(直流電源01の電圧)の値の
それぞれ増、減が行われる。 4は電圧調節回路で電圧設定値ESとDC−DCコンバ
ータの出力電圧EOとを比較し、EOがBSに対応して
所定値となるように、つまりコンバータ出力電圧EOが
前記所定値を上回ろうとすると、この調節回路4の出力
電圧としての比較電圧Ellを下げ、逆にコンバータ出
力電圧EOが前記所定値を下回ろうとすると比較電圧E
llを上げるように、PWMコンパレータ1への入力比
較電圧Ellを可変調節する。 2は過電流制限回路で、DC−DCコンバータの出力電
流■0によって電流検出抵抗R1に生ずる電流検出電圧
EOiと過電流設定値EISに対応する所定電圧とを比
較し、前者EOiがこの所定電圧を越えると、この制限
回路2の出力電圧としてのPWMコンパレータ1への人
力比較電圧E12を“H”(入力最大値)がら“L″(
入力最小値)に変化させる。 第4図は第3図のDC−DCコンバータの出力電圧EO
対出力電流IOの特性例を示す。即ち出力電流■0が過
電流設定値EISに対応する所定の過電流制限値Isを
越えない間は、過電流制限回路2の出力する比較電圧E
12は“H”(入力最大値)のため、PWMコンパレー
タ1はこの比較電圧E12より低い電圧調節回路4の出
力比較電圧Ellと搬送波人力EIOとの比較動作をし
、コンバータ出力電圧EOは電圧設定値ESの値ESI
。 BS2に応じた定電圧特性を示す。 しかしコンバータ出力電流■0が増加して過電流制限値
ISを越えようとすると、過電流制限回路2の出力比較
電圧E12が“L”(入力最小値)に切換わり、PWM
コンパレータlはこの比較電圧E12と搬送波人力EI
Oとの比較動作に切換ゎるため、コンバータ出力電圧E
Oは0に向って急速に垂下する。このようにして電圧設
定値ESの如何にかかわらず、一定の過電流制限値Is
で保護動作が行われる。
FIG. 3 shows a circuit example of a conventional DC-DC converter having an overcurrent protection function. In the same figure, 01 is a DC power supply, 0
2 is a load, Ql is a switching transistor for repeatedly turning on and off the DC power supply 01, 04 is a control circuit that controls opening and closing of this transistor (1), 03 is a DC power supply for this control circuit 04, and Ll is a transistor Q1 is a smoothing reactor for smoothing the intermittent output DC voltage, C1 is also a smoothing capacitor, Dl is a flywheel diode that becomes the current path for reactor L1 when transistor Q1 is off, and R1 is the output of this DC-DC converter. This is a current detection resistor for detecting the current ■0.Next, in the control circuit 04, l is a PWM (pulse modulation) comparator, and this comparator 1 is connected to its +(
A sawtooth-like high frequency (
In addition to inputting the voltage EIO of the carrier wave), a variable comparison voltage Ell is input to its two - (minus) terminals.
R12 is input, and during the period when the sawtooth wave voltage R100 value is lower than the lower of the comparison voltages Ell and R12, its output is set to "L" and the switching transistor Q1 is turned on, and vice versa. Sawtooth voltage EI
During the period when O exceeds the lower voltage, its output is set to “H”.
In this way, according to the increase or decrease of the comparison voltage Ell or R12 (whichever is lower) input to the PWM comparator 1, the ON time ratio of the switching transistor Q1 = (ON
time) / ((ON time) + (OFF time)) = (O
N time)/(carrier period), hence the transistor Q
The value of (output (average) voltage)/(voltage of DC power supply 01) of l is increased and decreased, respectively. 4 is a voltage adjustment circuit that compares the voltage setting value ES and the output voltage EO of the DC-DC converter, and adjusts the voltage so that EO becomes a predetermined value corresponding to BS, that is, the converter output voltage EO exceeds the predetermined value. When the converter output voltage EO tries to fall below the predetermined value, the comparison voltage Ell as the output voltage of the adjustment circuit 4 is lowered.
The input comparison voltage Ell to the PWM comparator 1 is variably adjusted so as to increase Ell. 2 is an overcurrent limiting circuit that compares the current detection voltage EOi generated in the current detection resistor R1 due to the output current 0 of the DC-DC converter with a predetermined voltage corresponding to the overcurrent setting value EIS, and the former EOi is determined as the predetermined voltage. When the voltage exceeds the limit circuit 2, the manual comparison voltage E12 to the PWM comparator 1 as the output voltage of the limiting circuit 2 changes from "H" (maximum input value) to "L" (
input minimum value). Figure 4 shows the output voltage EO of the DC-DC converter in Figure 3.
An example of characteristics of output current IO is shown. That is, while the output current 0 does not exceed the predetermined overcurrent limit value Is corresponding to the overcurrent setting value EIS, the comparison voltage E output from the overcurrent limiter circuit 2
Since 12 is "H" (maximum input value), the PWM comparator 1 compares the output comparison voltage Ell of the voltage adjustment circuit 4, which is lower than this comparison voltage E12, with the carrier wave EIO, and the converter output voltage EO is set at the voltage setting. Value ES of value ES
. It shows constant voltage characteristics according to BS2. However, when the converter output current ■0 increases and attempts to exceed the overcurrent limit value IS, the output comparison voltage E12 of the overcurrent limiter circuit 2 switches to "L" (minimum input value), and the PWM
The comparator l is connected to this comparison voltage E12 and the carrier wave input EI.
Converter output voltage E
O rapidly drops toward 0. In this way, regardless of the voltage setting value ES, a constant overcurrent limit value Is
A protective operation is performed.

【発明が解決しようとする課題】[Problem to be solved by the invention]

しかしながら第3図のようなりC−DCコンバータで、
定電力供給を要するような負荷025例えばCRTに電
力を供給しようとする場合、第4図のように仮に電圧設
定値ESIに対しては過電流制限値がIsで適切であっ
たとしても、電圧設定値をBS2に高めたときにも過電
流制限値がIsのままであるため、負荷02を過負荷に
よって破壊する慣れがある。 そこで本発明は電圧設定値ESの増に減に応じて過電流
設定値EIS(従って過電流制限値Is)をそれぞれf
Ii=増させ得る機能を備えた可変過電流保gtDc−
DCコンバータを提供することにより前記の問題を解消
することを課題とする。
However, with a C-DC converter as shown in Figure 3,
When trying to supply power to a load that requires constant power supply, such as a CRT, as shown in Figure 4, even if the overcurrent limit value Is is appropriate for the voltage setting value ESI, the voltage Even when the set value is increased to BS2, the overcurrent limit value remains at Is, so there is a habit of destroying load 02 due to overload. Therefore, the present invention adjusts the overcurrent set value EIS (therefore, the overcurrent limit value Is) to f depending on the increase or decrease of the voltage set value ES.
Ii=variable overcurrent protection gtDc- with the function of increasing
An object of the present invention is to solve the above problem by providing a DC converter.

【課題を解決するための手段】[Means to solve the problem]

前記の課題を解決するために本発明のDC−DCコンバ
ータは、rスイッチング手段(スイッチングトランジス
タQ1など)を介し第1の直流電圧(直流電源01など
の電圧)を繰返し開閉して第2の直流電圧(出力電圧E
Oなど)を出力するDC−DCコンバータであって、 前記第2の直流電圧が第1の基準電圧(電圧設定値ES
に比例する所定電圧など)と等しくなるように前記スイ
ッチング手段の開閉の比率を制御する電圧制御手段(P
WMコンパレータ1.電圧調節回路4など)と、 前記DCDCコンバータの出力電流(IOなど)が第2
の基準電圧(過電流設定値EISなど)に対応する所定
の電流値(過電流制限値Isなど)を越えたときは、前
記スイッチング手段を開く過電流制限手段(PWMコン
パレータ1.過電流制限回路2など)と、を備えたDC
−DCコンバータにおいて、 前記第1の基準電圧が増加したときは第2の基準電圧を
減少させる制限電流可変手段(電圧変換回路3など)を
備えたjものとする。
In order to solve the above problems, the DC-DC converter of the present invention repeatedly opens and closes a first DC voltage (voltage of DC power supply 01, etc.) via r switching means (switching transistor Q1, etc.) to generate a second DC voltage. Voltage (output voltage E
A DC-DC converter that outputs a first reference voltage (voltage setting value ES, etc.), wherein the second DC voltage
Voltage control means (such as a predetermined voltage proportional to
WM comparator 1. (voltage adjustment circuit 4, etc.) and the output current (IO, etc.) of the DCDC converter is
When a predetermined current value (overcurrent limit value Is, etc.) corresponding to a reference voltage (overcurrent setting value EIS, etc.) is exceeded, overcurrent limiting means (PWM comparator 1. 2 etc.) and a DC with
- The DC converter is provided with limited current variable means (voltage conversion circuit 3, etc.) that reduces the second reference voltage when the first reference voltage increases.

【作 用】[For use]

本発明では従来回路に電圧変換回路を付加し、電圧設定
値ESの増、減に応じてそれぞれ電圧変換回路3の出力
電圧を減、増と変化させ、この出力電圧を過電流設定値
EISとして過電流制限回路2に与える。
In the present invention, a voltage conversion circuit is added to the conventional circuit, and the output voltage of the voltage conversion circuit 3 is changed to decrease or increase in response to an increase or decrease in the voltage setting value ES, and this output voltage is used as the overcurrent setting value EIS. Provided to overcurrent limit circuit 2.

【実施例】【Example】

以下第1図および第2図に基づいて本発明の詳細な説明
する。第1図は本発明の一実施例としての回路図で第3
図に対応し、第2図は第1図の出力電圧EO対出力電流
10の特性例を示す図で、第4図に対応するものである
。 第1図においては第3図に対し過電流制限回路2の入力
部に電圧設定値ESを過電流設定値EISに変換する電
圧変換回路3が付加されている。 即ちこの電圧変換回路3において制御用トランジスタQ
2はいわゆるエミッタフォロワ回路を構成しており、同
トランジスタQ2のベースには電圧設定値ESを抵抗R
2,R3で分圧してなる抵抗R3の電圧が与えられ、こ
のR3の両端電圧はトランジスタQ2のエミッタに接続
された抵抗R5の両端電圧とほぼ等しい。他方、この抵
抗R5とトランジスタQ2のコレクタに接続された抵抗
R4にはほぼ等しい電流が流れているのでこの抵抗R5
とR4の両端電圧はそれぞれの抵抗値に比例した値とな
っている。従って抵抗R4の両端電圧は電圧設定値ES
にほぼ比例した値を持つことになる。 ところでこの抵抗R4におけ条トランジスタQ2のコレ
クタ側の端子は過電流制限回路2の−(マイナス)入力
端子に接続されて、この過電流制限回路°で過電流設定
値EISを与えている。 結果として、電圧設定値BSの増、減に応じて過電流設
定値EISはそれぞれ減、増と変化することになる 第2図は第1図のDC−DCコンバータの出力電圧EO
対出力電流IOの特性例を示す。即ち電圧設定値ESを
ESIに設定したときの過電流設定値EISはE I 
31(これに対応する過電流制限値TSはl5I)の値
となって、実線のような特性(曲線)となる、同様に電
圧設定値をES2に設定したときの過電流設定値はEI
S2(これに対応する過電流制限値は132)となって
破線のような特性(曲線)となる。このように実線、破
線の各特性(曲線)における出力電力最大となる点PI
。 R2の辿る軌跡はほぼ第2図中の一点鎖線のようになる
。 実用上はこのようなりC−DCコンバータは負荷の一般
的な特性から見て例えばこの実線と破線の特性の範囲内
で使用されるというように、正常な使用範囲では出力電
圧、出力電流の極端に大きな変化は必要としないので、
第2図のような特性で定電力供給を必要とする負荷02
を過不足なく保護することが可能である。
The present invention will be explained in detail below based on FIGS. 1 and 2. Figure 1 is a circuit diagram as an embodiment of the present invention.
2 is a diagram showing an example of the characteristics of the output voltage EO versus the output current 10 in FIG. 1, and corresponds to FIG. 4. In FIG. 1, in contrast to FIG. 3, a voltage conversion circuit 3 for converting a voltage set value ES into an overcurrent set value EIS is added to the input section of the overcurrent limiting circuit 2. That is, in this voltage conversion circuit 3, the control transistor Q
2 constitutes a so-called emitter follower circuit, and the voltage setting value ES is connected to the base of the transistor Q2 by a resistor R.
A voltage across the resistor R3 is applied, which is divided by 2 and R3, and the voltage across the resistor R3 is approximately equal to the voltage across the resistor R5 connected to the emitter of the transistor Q2. On the other hand, since approximately the same current flows through this resistor R5 and the resistor R4 connected to the collector of the transistor Q2, this resistor R5
The voltages across R4 and R4 have values proportional to their respective resistance values. Therefore, the voltage across resistor R4 is the voltage setting value ES
It has a value approximately proportional to . By the way, the terminal on the collector side of the line transistor Q2 in this resistor R4 is connected to the - (minus) input terminal of the overcurrent limiting circuit 2, and the overcurrent limiting circuit provides an overcurrent set value EIS. As a result, the overcurrent set value EIS decreases and increases as the voltage set value BS increases and decreases, respectively. Figure 2 shows the output voltage EO of the DC-DC converter in Figure 1.
An example of characteristics of output current IO is shown. In other words, when the voltage setting value ES is set to ESI, the overcurrent setting value EIS is E I
31 (corresponding overcurrent limit value TS is 15I), and a characteristic (curve) like the solid line is obtained.Similarly, when the voltage setting value is set to ES2, the overcurrent setting value is EI
S2 (the corresponding overcurrent limit value is 132), resulting in a characteristic (curve) like a broken line. In this way, the point PI at which the output power is maximum in each characteristic (curve) of the solid line and the broken line
. The trajectory followed by R2 is approximately like the dashed line in FIG. In practice, this is the case.C-DC converters are used within the range of the characteristics shown by the solid and broken lines, considering the general characteristics of the load. There is no need for major changes in
Load 02 that requires constant power supply with characteristics as shown in Figure 2
It is possible to protect just the right amount.

【発明の効果】【Effect of the invention】

本発明によれば、スイッチングトランジスタQ1を介し
直流電源01の直流電圧を繰返し開閉して出力直流電圧
EOを出力するDC−DCコンバータであって、 前記出力電圧EOが電圧設定値ESに対応する所定電圧
と等しくなるように前記スイッチングトランジスタQ1
の開閉の比率を制御するPWMコンパレータ1および電
圧調節回路4と、前記DC−DCコンバータの出力電流
IOが過電流設定値EISに対応する所定の過電流制限
Isを越えたときは、前記スイッチングトランジスタQ
lを開く過電流制限回路2と、を備えたDC−DCコン
バータにおいて、 前記電圧設定値ESが増加したときは過電流設定値EI
Sを減少させる電圧変換回路3を備えることとしたので
、 定電力供給を必要とする負荷の過電流保護を適切に行う
ことができる。
According to the present invention, there is provided a DC-DC converter that repeatedly opens and closes the DC voltage of a DC power source 01 via a switching transistor Q1 to output an output DC voltage EO, the output voltage EO being a predetermined value corresponding to a voltage setting value ES. the switching transistor Q1 so that the voltage is equal to
When the output current IO of the DC-DC converter exceeds a predetermined overcurrent limit Is corresponding to the overcurrent set value EIS, the switching transistor Q
In the DC-DC converter equipped with an overcurrent limiting circuit 2 that opens the overcurrent limit circuit 2, when the voltage setting value ES increases, the overcurrent setting value EI increases.
Since the voltage conversion circuit 3 that reduces S is provided, overcurrent protection for a load that requires constant power supply can be appropriately performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例としての構成回路図、第2図
は同じく第1図のDC−DCコンバータ定値、EIS 
(EISI、EIS2):過電流設定値、Is (IS
I、l52):過電流制限値、EO:出力電圧、IO:
出力電流。 第4図は第3図のDC−DCコンバータの特性例を示す
図で、第2図に対応するものである。 OI:直流電源、02:負荷、04:制御回路、Q1ニ
スイツチングトランジスタ、1:PWMコンパレータ、
2:過電流制限回路、3:電圧変換回路、4:電圧調節
回路、ES (ESl、ES2):電圧設(EIS2) (EISI ) 第2図 牙4図
FIG. 1 is a configuration circuit diagram as an embodiment of the present invention, and FIG. 2 is the DC-DC converter constant value and EIS of FIG. 1.
(EISI, EIS2): Overcurrent setting value, Is (IS
I, l52): Overcurrent limit value, EO: Output voltage, IO:
Output current. FIG. 4 is a diagram showing an example of the characteristics of the DC-DC converter shown in FIG. 3, and corresponds to FIG. 2. OI: DC power supply, 02: Load, 04: Control circuit, Q1 switching transistor, 1: PWM comparator,
2: Overcurrent limiting circuit, 3: Voltage conversion circuit, 4: Voltage adjustment circuit, ES (ESl, ES2): Voltage setting (EIS2) (EISI) Fig. 2 Fig. 4

Claims (1)

【特許請求の範囲】 1)スイッチング手段を介し第1の直流電圧を繰返し開
閉して第2の直流電圧を出力するDC−DCコンバータ
であって、 前記第2の直流電圧が第1の基準電圧と等しくなるよう
に前記スイッチング手段の開閉の比率を制御する電圧制
御手段と、 前記DC−DCコンバータの出力電流が第2の基準電圧
に対応する所定の電流値を越えたときは、前記スイッチ
ング手段を開く過電流制限手段と、を備えたDC−DC
コンバータにおいて、 前記第1の基準電圧が増加したときは第2の基準電圧を
減少させる制限電流可変手段を備えたことを特徴とする
可変過電流保護DC−DCコンバータ。
[Scope of Claims] 1) A DC-DC converter that outputs a second DC voltage by repeatedly opening and closing a first DC voltage through a switching means, wherein the second DC voltage is a first reference voltage. voltage control means for controlling the opening/closing ratio of the switching means so as to be equal to the voltage, and when the output current of the DC-DC converter exceeds a predetermined current value corresponding to a second reference voltage, the switching means overcurrent limiting means for opening the DC-DC
A variable overcurrent protection DC-DC converter, characterized in that the converter includes variable limit current means that reduces the second reference voltage when the first reference voltage increases.
JP13980189A 1989-06-01 1989-06-01 Variable overcurrent protective dc-dc converter Pending JPH037060A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13980189A JPH037060A (en) 1989-06-01 1989-06-01 Variable overcurrent protective dc-dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13980189A JPH037060A (en) 1989-06-01 1989-06-01 Variable overcurrent protective dc-dc converter

Publications (1)

Publication Number Publication Date
JPH037060A true JPH037060A (en) 1991-01-14

Family

ID=15253751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13980189A Pending JPH037060A (en) 1989-06-01 1989-06-01 Variable overcurrent protective dc-dc converter

Country Status (1)

Country Link
JP (1) JPH037060A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001286140A (en) * 2000-03-31 2001-10-12 Densei Lambda Kk Power supply
JP2006136136A (en) * 2004-11-05 2006-05-25 Fuji Xerox Co Ltd Power supply device and method and program for output adjustment
US8833263B2 (en) 2012-01-19 2014-09-16 Hepco Slide Systems Limited Track systems

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001286140A (en) * 2000-03-31 2001-10-12 Densei Lambda Kk Power supply
JP2006136136A (en) * 2004-11-05 2006-05-25 Fuji Xerox Co Ltd Power supply device and method and program for output adjustment
US8833263B2 (en) 2012-01-19 2014-09-16 Hepco Slide Systems Limited Track systems

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