JPH0376426A - Phase locked loop circuit - Google Patents

Abstract

PURPOSE:To simplify the circuit constitution by accumulating every n-set of output signals of a sampled phase comparator, and judging whether or not the phase synchronizing state is reached by the result of accumulation, thereby outputting the control voltage of a voltage controlled oscillator. CONSTITUTION:A microprocessor 7 samples and fetches a phase error signal of a phase comparator 3 via an A/D converter 6 for a prescribed time DELTAt, every n-set of output signals of the phase comparator 3 inputted and sampled to the microprocessor 7 are accumulated and whether or not the phase locked state is reached is judged depending on the result of addition. Thus, accurate phase locking detection is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a phase synchronized circuit using a microprocessor, and particularly to a phase synchronized circuit with a simple circuit configuration used in an AFC circuit or the like.

[Conventional technology]

Conventionally, as a circuit that detects out-of-phase and performs phase synchronization,
The structure shown in the block diagram in FIG. 2 is used. In this figure, an input signal to which phase synchronization is applied and an output signal of a voltage controlled oscillator 9 are frequency-mixed by a frequency mixer 1, and a difference frequency signal between the two signals is output.

Further, the reference frequency output signal output from the reference signal oscillator 2 is applied to a phase comparator 3 and a 90° phase shifter 4.

The phase comparison circuit 3 compares the phases of the re-output signals of the frequency mixer 1 and the reference signal oscillator 3, and applies the error voltage to the analog-to-digital converter 6. In addition, another phase comparator 5
is the output signal of frequency mixer 1 and 90' phase shifter 4.
A phase comparison is made with the output signal of the reference signal oscillator 2 which has been advanced by 50 degrees, and the error voltage is converted to the analog-to-digital converter 6.
Add to.

The analog-to-digital converter 6 converts the input analog signal into a digital signal and applies it to the microprocessor 7.

The microprocessor 7 determines which of the two input signals input to the analog-to-digital converter 6 is an analog-to-digital converter.
When receiving the output information of the phase comparator 5, it detects the out-of-phase and sends out the out-of-phase synchronization signal, and when it receives the output information of the phase comparator 3, it sends out this information. Based on this, control voltage information for the voltage controlled oscillator 9 is calculated and applied to the digital-to-analog converter 8. The digital-to-analog converter 8 converts the input control voltage information into an analog value and applies it to the voltage controlled oscillator 9, thereby applying negative feedback and performing phase synchronization control.

Here, the phase synchronization and out-of-phase detection methods are performed as follows. In FIG. 3, the instantaneous phase of the output signal of the frequency mixer 1 is θ, t), and the instantaneous phase of the output signal of the reference signal oscillator 2 is θ. If the instantaneous phase of the output signal of the phase shifter 4 is θ(.+π/2), the output voltages of the phase comparator 3 and the phase comparator 5 are expressed as Ru.

V $ (t) = A15tn(θ(1) −θ01t
)) +vs Oft...(1) Vent) =A(cos(θ(1) (θ...,
+π/2))=Accos(θ32.-θ0(t))
+Vc off...(2) In equations (1) and (2), As and Ac are proportional constants, v
3゜ff+Vc. ff is each frequency phase comparator circuit A
, B is the output offset voltage.

Here, when phase synchronization is applied to the input signal, θ(1) −
θ. (1) ...(3).

Substituting equation (3) into equations (1) and (2), V3+t+ =As sin O+Vs ore =V
s ott... (4) VC (L) = Ac cos O+ V cott
=Ac + Vott... (5) As described above, in the conventional phase synchronized circuit that can detect out-of-phase, as shown in equations (2) and (4), in the case of out-of-phase, the phase comparator 5 The output signal includes a beat component, and in the case of phase synchronization, the beat component is constant.

In this way, in the conventional phase synchronization circuit, phase synchronization is detected by detecting whether the beat component of the output signal of the phase comparator 5 is constant.

Here, when comparing equations (1) and (2), the main difference between the two equations is that the beat component is expressed by a sine function or a cosine function, and the phase comparator 3 and phase comparator 5 The information value of both signals is considered to be equivalent. In reality, phase synchronization is detected using the phase comparator 3 as shown in equation (4).
This can also be realized by checking whether the beat component of the output signal is zero.

[Problem to be solved by the invention]

The conventional phase-locked circuit described above requires a 90' phase shifter 4 and a phase-locked circuit 5, resulting in a complicated circuit configuration. Furthermore, in order to accurately detect out-of-phase, fine adjustment of the 90' phase shifter 4 is required, resulting in an increase in the number of inspection steps.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a phase-locked circuit with a simplified configuration.

[Means to solve the problem]

The phase synchronized circuit of the present invention includes a voltage controlled oscillator, a frequency mixer that outputs a difference frequency signal between the output of the voltage controlled oscillator and an input signal, and a reference signal oscillator that compares the phases of the reference signal and the difference frequency signal. a phase comparator that outputs the error voltage between the two, an analog-to-digital converter that converts this error voltage into a digital value, and an analog-to-digital converter that inputs this digital value and detects out-of-phase in the system based on this digital value. a microprocessor that sends out-of-phase synchronization signals and outputs control voltage information of the voltage controlled oscillator; and a digital-to-analog converter that converts the control voltage information into an analog voltage and provides negative feedback to the voltage controlled oscillator. It is equipped with

The microprocessor is configured to cumulatively add the sampled output signals of the phase comparators every n times, determine whether or not the phase synchronization state is established based on the addition result, and output a control voltage. .

[Effect]

In this configuration, the microprocessor cumulatively adds the sampled output signals of the phase comparators every n times, determines whether the phase synchronization state is established based on the addition result, and outputs the control voltage of the voltage controlled oscillator. .

〔Example] Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block circuit diagram of one embodiment of the present invention. In the figure, an input signal for phase synchronization and an output signal of a voltage controlled oscillator 9 are frequency-mixed by a frequency mixer 1, and a difference frequency signal between the two signals is output.

Further, a reference signal oscillator 2 generates a reference frequency for performing phase comparison, and its output signal is applied to a phase comparator 3. This phase comparator 3 compares the phases of the re-output signals of the frequency mixer 1 and the reference signal oscillator 2, and converts the error voltage into an analog signal.
Add to digital converter 6. This analog-to-digital signal converter 6 converts the input signal into a digital signal and applies it to the microprocessor 7. microprocessor 7
calculates the control voltage information of the voltage controlled oscillator 9 based on the output signal of the phase comparator 3 input manually via the analog-to-digital converter 6, applies it to the digital-to-analog converter 8, and performs out-of-phase detection. Send out-of-phase synchronization signal. The control voltage output from the microprocessor 7 is converted into an analog signal by a digital-to-analog converter 8, and subjected to error phase synchronization with a voltage controlled oscillator 9.

Next, the operation of the present invention will be explained in detail with reference to FIG.

The microprocessor 7 samples and takes in the phase error signal of the phase comparator 3 at a fixed time Δt via the analog-to-digital converter 6, and determines whether or not the phase synchronization state is established based on this sampling signal.

In the state of phase synchronization, the output of the phase comparator 3 has a beat component of zero as shown in equation (4), so this can be used to determine phase synchronization. Here, the beat component of the output signal of the conventional phase comparator 5 without phase synchronization becomes a sine wave as shown in Figure 3, but the data is sampled at points A and B in the figure. In this case, there is a possibility that the phase synchronization state may be determined even though the phase is out of phase.

Therefore, here, the sampled output signals of the phase comparator 3 that are input to the microprocessor 7 are cumulatively added every n times, and it is determined whether the phase synchronization state is established based on the addition result. Specifically, in FIG. 3, the sampling data Vs<ti) are cumulatively added using the following equation.

In equation (6), X=O because Vs+ti+ =Vott (i=1.2.-,
n), which means that the period (n-1
) At Δt, the error output voltage of the phase comparator 3 is V. ff is constant, that is, it can be considered to be in a phase synchronized state.

Therefore, it is possible to perform accurate phase synchronization detection depending on whether the calculation result of equation (6) is 0 or not.

〔Effect of the invention〕

As explained above, in the present invention, in a microprocessor, the sampled output signal of the phase comparator is
Since the control voltage of the voltage controlled oscillator is output by cumulatively adding up each component and determining whether or not the phase synchronization state is achieved based on the addition result, the control voltage of the voltage controlled oscillator is output when establishing phase synchronization. A phase comparator is not required, and the circuit configuration can be simplified. Further, this eliminates the need for inspection man-hours such as fine adjustment of the 90' phase shifter. Furthermore, the number of input channels used in the analog-to-digital converter can be reduced by one, and the degree of freedom in designing the analog-to-digital interface can be improved.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram of an embodiment of the present invention, FIG. 2 is a block circuit diagram of a conventional phase synchronization circuit, and FIG. 3 is a voltage characteristic diagram showing a state in which a phase synchronization state is detected. 1... Frequency mixer, 2... Reference signal oscillator, 3.
... Phase comparator, 4... 90° phase shifter, 5... Phase comparator, 6... Analog-digital converter, 7...
Microprocessor, 8... Analog-to-digital converter, 9... Voltage controlled oscillator.

Claims (1)

[Claims] 1. A voltage controlled oscillator whose oscillation frequency is changed by a control voltage, a frequency mixer which mixes the output of this voltage controlled oscillator and an input signal and outputs a difference frequency signal between the two, and a reference signal which generates a reference signal. an oscillator, a phase comparator that compares the phases of the difference frequency signal and a reference signal and outputs an error voltage between the two, an analog-to-digital converter that converts this error voltage into a digital value, and inputs this digital value. and a microprocessor that detects out-of-phase in the system based on this digital value, sends an out-of-phase synchronization signal, and outputs control voltage information for the voltage controlled oscillator, and converts this control voltage information into an analog voltage. and a digital-to-analog converter that provides negative feedback to the voltage controlled oscillator, and the microprocessor cumulatively adds up every n sampled output signals of the phase comparator, and determines whether the phase synchronization state is established based on the addition result. 1. A phase synchronized circuit characterized in that it is configured to determine whether or not.