JPH03799B2 - - Google Patents
Info
- Publication number
- JPH03799B2 JPH03799B2 JP57069050A JP6905082A JPH03799B2 JP H03799 B2 JPH03799 B2 JP H03799B2 JP 57069050 A JP57069050 A JP 57069050A JP 6905082 A JP6905082 A JP 6905082A JP H03799 B2 JPH03799 B2 JP H03799B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- holes
- grooves
- forming
- activation layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【発明の詳細な説明】
この発明は絶縁基板上に電気回路を形成するた
めの印刷配線板の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a printed wiring board for forming an electric circuit on an insulating substrate.
従来、印刷配線板を得る方法としては銅張り積
層板からエツチングにより回路を形成するサブト
ラクト法や触媒入り絶縁基板上の所要回路部分だ
けをめつきで形成するアデイテブ法等がある。し
かし乍ら前者のサブトラクト法はエツチングによ
り溶解除去される銅の量が回路形成部として残る
銅の量に比してはるかに多く、多くの資源の無駄
使いであるばかりかエツチングレジストの形成、
エツチング等の工程が複雑であり、回路パターン
精度の均一性、細線化等において難点の多い方法
である。後者のアデイテブ法においては所要回路
部分のみをめつきすることにより回路パターンを
形成するものであり、資源の有効利用という点か
らは優れた方法であるが、絶縁基板として触媒入
りの特殊な基板が必要であること、めつき(通常
は無電解めつき)に長時間を要するためにめつき
液に対して耐久性に優れた特殊なレジストが必要
であること、又、絶縁基板上に前記レジスト層を
配線パターンに応じて形成することが必要であり
スクリーン印刷法等が用いられているが、印刷条
件によつては印刷パターンのブリツヂ、オープン
といつた不具合が発生するためにパターンの細線
化が困難である等の難点があつた。又、他の方法
としては金型を用いて絶縁基板上に凹部を形成
し、この凹部に導電性ペーストを埋め込んで回路
を形成する方法も提案されているが、この方法に
おいては同一品種の印刷配電板を大量に生産する
には優れた方法であるが、多品種の印刷配線板を
生産する場合には配線パターンに応じた金型が必
要であり好ましくない。又、導電性ペーストを埋
め込んだ場合にボイド、回路のブリツヂ等が発生
し電気的特性の劣化はさけられなかつた。 Conventional methods for obtaining printed wiring boards include the subtract method, in which circuits are formed by etching from a copper-clad laminate, and the additive method, in which only the required circuit portions are formed by plating on a catalyst-containing insulating substrate. However, in the former subtract method, the amount of copper that is dissolved and removed by etching is much larger than the amount of copper that remains as a circuit forming part, which not only wastes a lot of resources, but also reduces the formation of etching resist.
This method involves complicated steps such as etching, and has many difficulties in terms of uniformity of circuit pattern accuracy, thinning of lines, etc. In the latter additive method, a circuit pattern is formed by plating only the required circuit parts, and although it is an excellent method from the point of view of effective use of resources, it requires a special substrate containing a catalyst as an insulating substrate. Because plating (usually electroless plating) takes a long time, a special resist with excellent durability against plating solutions is required; It is necessary to form layers according to the wiring pattern, and screen printing methods are used, but depending on the printing conditions, defects such as bridging and openings in the printed pattern may occur, so the pattern must be made thinner. There were some difficulties, such as difficulty in Another method has been proposed in which a mold is used to form a recess on an insulating substrate and a conductive paste is filled in the recess to form a circuit. Although this is an excellent method for mass-producing power distribution boards, it is not preferable when producing a wide variety of printed wiring boards because it requires molds that match the wiring patterns. Furthermore, when a conductive paste is embedded, voids, circuit bridging, etc. occur, and deterioration of electrical characteristics cannot be avoided.
この発明は上記従来のものの欠点を除去するた
めになされたもので、絶縁基板上の配線部分に
溝、スルーホールを形成した後、選択的に溝、ス
ルーホールの内壁を同時に金属化し、電導層を形
成することにより、安価で高密度化が可能な信頼
性に優れた印刷配線板の製造方法を提供すること
を目的としている。 This invention was made in order to eliminate the drawbacks of the above-mentioned conventional ones. After forming grooves and through holes in the wiring part on an insulating substrate, the inner walls of the grooves and through holes are selectively metallized at the same time, and a conductive layer is formed. The purpose of the present invention is to provide a method for manufacturing a printed wiring board that is inexpensive, can be highly densified, and has excellent reliability.
以下、図により本発明の一実施例を詳細に説明
する。図において、1は絶縁基板、2,3は配線
部分の溝、スルーホール、4は活性化層、5は導
電層、6は絶縁基板1の平滑面である。 Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. In the figure, 1 is an insulating substrate, 2 and 3 are grooves and through holes in wiring portions, 4 is an activation layer, 5 is a conductive layer, and 6 is a smooth surface of the insulating substrate 1.
まず予め定められた配線パターンに従つてレー
ザービームを絶縁基板1の両面上に照射すること
により、配線パターンに対応した溝2とスルーホ
ール3を形成する(第2図参照)。次いで溝2、
スルーホール3が形成された絶縁基板1を無電解
めつきに対する活性化処理行い(第3図参照)、
洗浄を行なつて絶縁基板1上に形成された溝2、
スルーホール3の壁面のみに活性化層4を形成
(第4図参照)した後、無電解めつきを行なうこ
とにより、絶縁基板1上の溝2、スルーホール3
部分のみに選択的に導電層5を形成(第5図参
照)することにより印刷配線板7を得るものであ
る。このように本発明はレーザービームで絶縁基
板上に配線パターンに対応した溝、スルーホール
を形成することにより回路以外の絶縁基板面より
粗面化することが出来るためにレジスト等のパタ
ーン形成は不要で、選択的に導電層を形成するこ
とが可能となるものである。又、レーザービーム
を照射することにより溝とスルーホールとの同時
形成が可能となり、あるいはビーム径を小さくす
ることにより、微細なパターン形成も可能とな
る。 First, a laser beam is irradiated onto both surfaces of the insulating substrate 1 according to a predetermined wiring pattern to form grooves 2 and through holes 3 corresponding to the wiring pattern (see FIG. 2). Then groove 2,
The insulating substrate 1 in which the through holes 3 are formed is subjected to an activation treatment for electroless plating (see Fig. 3),
a groove 2 formed on the insulating substrate 1 by cleaning;
After forming the activation layer 4 only on the wall surface of the through hole 3 (see FIG. 4), electroless plating is performed to form the groove 2 on the insulating substrate 1 and the through hole 3.
A printed wiring board 7 is obtained by selectively forming a conductive layer 5 only in portions (see FIG. 5). In this way, the present invention uses a laser beam to form grooves and through-holes corresponding to the wiring pattern on the insulating substrate, making the surface of the insulating substrate rougher than the surface other than the circuit, so there is no need to form a pattern such as a resist. This makes it possible to selectively form a conductive layer. Further, by irradiating with a laser beam, it is possible to form grooves and through holes simultaneously, or by reducing the beam diameter, it is also possible to form fine patterns.
配線パターンに対応した溝、スルーホールを絶
縁基板形成上に形成する方法として前記実施例に
おいてはレーザービームを用いたが、カツター等
の機械的な切削によつても有効であり、絶縁基板
上の平滑面に対して配線部分の溝、スルーホール
の壁面が粗面化されればよい。 Although a laser beam was used in the above embodiment to form grooves and through holes corresponding to the wiring pattern on the insulating substrate, mechanical cutting with a cutter or the like is also effective. The wall surfaces of the grooves and through-holes in the wiring portion may be roughened compared to the smooth surface.
活性化処理後に洗浄により絶縁基板上の溝、ス
ルーホールの壁面のみに活性化層を形成する方法
としては水洗だけで充分であるが、酸性水溶液等
による活性化層溶解液を用いればより好ましい。
これは絶縁基板上の平滑面に比して、溝、スルー
ホールが粗面であり、活性化処理により吸着され
る触媒量が多く、洗浄されにくくなるためであ
る。又、絶縁基板面の凹凸を利用してブラツシン
グ等機械的に手段によつても前記実施例と同様な
効果が得られるものである。このように選択的に
溝、スルーホール内壁に活性化を形成することに
より従来例のようにメツキルジストをパターン状
に形成しなくても選択的に溝、スルーホール内壁
のみに導電層が形成されるものである。 As a method for forming an activation layer only on the walls of grooves and through holes on an insulating substrate by cleaning after activation treatment, washing with water is sufficient, but it is more preferable to use an activation layer dissolving solution such as an acidic aqueous solution.
This is because the grooves and through holes have rough surfaces compared to the smooth surfaces on the insulating substrate, and a large amount of catalyst is adsorbed during the activation process, making it difficult to clean. Further, the same effect as in the above embodiment can be obtained by mechanical means such as brushing using the unevenness of the surface of the insulating substrate. By selectively forming activation on the inner walls of the grooves and through-holes in this way, a conductive layer can be selectively formed only on the inner walls of the grooves and through-holes without forming metsukirsist in a pattern as in the conventional example. It is something.
本発明における絶縁基板としてはその材料を特
に限定するものではないが、ガラス繊維と樹脂等
からなる複合材料を用いる場合には、溝、スルー
ホールを形成した後、弗酸等により溝、スルーホ
ール内壁に露出したガラス繊維を選択的にエツチ
ングすることにより、導電層と溝、スルーホール
の壁面との密着力が向上し、より信頼性の高い印
刷配線板を得ることが出来る。 The material of the insulating substrate in the present invention is not particularly limited, but when using a composite material made of glass fiber and resin, etc., after forming grooves and through holes, hydrofluoric acid etc. are used to form the grooves and through holes. By selectively etching the glass fibers exposed on the inner wall, the adhesion between the conductive layer and the walls of the grooves and through-holes is improved, making it possible to obtain a more reliable printed wiring board.
以上の様に、この発明によれば絶縁基板上に配
線パターンに対応した溝、スルーホール等を描画
形成することにより溝、スルーホールの壁面を粗
面化するようにしたので、この粗面化した溝、ス
ルーホールの壁面のみに活性化層を形成すること
が可能となり、めつきレジストをパターン形成す
ることなく選択的に導電層を形成することが可能
となり、安価に高密度化が可能で、信頼性の高い
印刷配線板を得ることができる。 As described above, according to the present invention, the wall surfaces of the grooves and through holes are roughened by drawing and forming grooves, through holes, etc. corresponding to the wiring pattern on the insulating substrate. It is now possible to form an activation layer only on the walls of the grooves and through-holes, which makes it possible to selectively form a conductive layer without patterning the plating resist, making it possible to achieve high density at low cost. , a highly reliable printed wiring board can be obtained.
第1図ないし第5図は本発明の一実施例による
印刷配線板の製造方法を示す断面図である。
1……絶縁基板、2……溝、3……スルーホー
ル、4……活性化層、5……導電層、7……印刷
配線板。なお図中同一符号は同一又は相当部分を
示す。
1 to 5 are cross-sectional views showing a method of manufacturing a printed wiring board according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Groove, 3... Through hole, 4... Activation layer, 5... Conductive layer, 7... Printed wiring board. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
り絶縁基板上に配線パターンに応じて溝およびス
ルーホールを単独又は同時に描画形成する第1の
工程と、上記絶縁基板全面に活性化層を形成し機
械的にあるいは水洗または活性化層溶解液による
洗浄により上記溝およびスルーホールの内壁面以
外の上記活性化層を選択的に除去する第2の工程
と該第2の工程の処理後に上記絶縁基板にめつき
を施すことにより上記活性化された溝およびスル
ーホールの内壁面のみに導電層を選択的に形成す
る第3の工程とを備えたことを特徴とする印刷配
線板の製造方法。1. A first step of drawing and forming grooves and through-holes according to the wiring pattern on the insulating substrate individually or simultaneously by machining or laser beam irradiation, and forming an activation layer on the entire surface of the insulating substrate and mechanically or a second step of selectively removing the activation layer other than the inner wall surfaces of the grooves and through holes by washing with water or an activation layer solution; and plating the insulating substrate after the second step. and a third step of selectively forming a conductive layer only on the inner wall surfaces of the activated grooves and through-holes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6905082A JPS58186993A (en) | 1982-04-23 | 1982-04-23 | Method of producing printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6905082A JPS58186993A (en) | 1982-04-23 | 1982-04-23 | Method of producing printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58186993A JPS58186993A (en) | 1983-11-01 |
| JPH03799B2 true JPH03799B2 (en) | 1991-01-08 |
Family
ID=13391353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6905082A Granted JPS58186993A (en) | 1982-04-23 | 1982-04-23 | Method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58186993A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0630328B2 (en) * | 1987-02-17 | 1994-04-20 | 株式会社東芝 | Pin electrode fixing method on ceramics substrate |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5040465A (en) * | 1973-08-16 | 1975-04-14 | ||
| JPS5267998A (en) * | 1975-12-04 | 1977-06-06 | Fujitsu Ltd | Printing wiring method |
| CA1075825A (en) * | 1976-04-22 | 1980-04-15 | Rollin W. Mettler | Circuit board and method of making |
| JPS566497A (en) * | 1979-06-27 | 1981-01-23 | Sumitomo Electric Industries | Method of manufacturing integrated circuit |
-
1982
- 1982-04-23 JP JP6905082A patent/JPS58186993A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58186993A (en) | 1983-11-01 |
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