JPH0380338B2 - - Google Patents
Info
- Publication number
- JPH0380338B2 JPH0380338B2 JP60033183A JP3318385A JPH0380338B2 JP H0380338 B2 JPH0380338 B2 JP H0380338B2 JP 60033183 A JP60033183 A JP 60033183A JP 3318385 A JP3318385 A JP 3318385A JP H0380338 B2 JPH0380338 B2 JP H0380338B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- semiconductor device
- silicon wafer
- thermal oxide
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
Landscapes
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、半導体素子の製造方法に係わり、特
にシリコンウエハの表面に形成される熱酸化膜中
の欠陥発生を抑えた半導体素子の製造方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device that suppresses the occurrence of defects in a thermal oxide film formed on the surface of a silicon wafer. .
従来、ゲート酸化膜を形成する場合、ゲート酸
化の直前にRCA処理（文献；N.Kern and D.W.
Puotinen，“RCA Review”，31187（1970））等の
薬品による清浄を行つた後、純水洗浄を行つてい
る。この場合、純水洗浄によつて、必ず自然酸化
膜が７〜15［Å］形成されることになる。
Conventionally, when forming a gate oxide film, RCA treatment (Reference: N. Kern and DW
After cleaning with chemicals such as Puotinen, “RCA Review”, 31187 (1970)), cleaning with pure water is performed. In this case, a natural oxide film of 7 to 15 [Å] will always be formed by pure water cleaning.
一方、近年の半導体集積回路の高集積化は目覚
ましく、素子の微細化及び薄膜化に対する要求は
極めて厳しいものがある。そして、高集積回路に
用いられるゲート酸化膜の100［Å］以下を要求さ
れる場合もでている。このため、前記した自然酸
化膜のゲート酸化膜に及ぼす影響は大きい。 On the other hand, in recent years, the degree of integration of semiconductor integrated circuits has been remarkable, and demands for miniaturization and thinning of elements are extremely strict. There are also cases where gate oxide films used in highly integrated circuits are required to have a thickness of 100 Å or less. Therefore, the influence of the above-mentioned natural oxide film on the gate oxide film is large.
また、前記純水洗浄を省略し、弗酸系薬品によ
つて自然酸化膜を除去した後に直接ゲート酸化に
至る場合、シリコンウエハの表面は不飽和結合を
多く有し、極めて活性な表面となつている。その
結果、シリコンウエハの表面は汚染物質が被着し
易くなつている。従つて、このような表面上に形
成されたゲート酸化膜は、初期短絡不良を示す欠
陥が多くなつてしまう。 In addition, if the pure water cleaning is omitted and gate oxidation is performed directly after removing the natural oxide film with a hydrofluoric acid-based chemical, the surface of the silicon wafer has many unsaturated bonds and becomes an extremely active surface. ing. As a result, contaminants tend to adhere to the surface of silicon wafers. Therefore, the gate oxide film formed on such a surface has many defects indicating initial short-circuit defects.
本発明は上記の事情を考慮してなされたもの
で、その目的とするところは、熱酸化膜の形成工
程で、その目的とするところは、熱酸化膜の形成
工程でその酸化膜に取り込まれる欠陥を効果的に
低減することができ、素子特性の向上等をはかり
得る半導体素子の製造方法を提供することにあ
る。
The present invention has been made in consideration of the above circumstances, and its purpose is to provide a process for forming a thermal oxide film; An object of the present invention is to provide a method for manufacturing a semiconductor device that can effectively reduce defects and improve device characteristics.
本発明の骨子は、シリコンウエハを水素雰囲気
中で熱処理することにより、シリコンウエハ表面
の不飽和結合に水素を結合させ、熱酸化膜を形成
する際の電気伝導上の欠陥発生を抑制することに
ある。
The gist of the present invention is to heat-treat a silicon wafer in a hydrogen atmosphere to bond hydrogen to unsaturated bonds on the surface of the silicon wafer, thereby suppressing the occurrence of electrical conduction defects when forming a thermal oxide film. be.
即ち本発明は、シリコンウエハの表面に熱酸化
膜を形成する工程を含む半導体素子の製造方法に
おいて、前記熱酸化膜を形成する工程の直前に、
水素ガスを含む雰囲気中で前記シリコンウエハを
1100［℃］以上の温度で（望ましくは１分以下の
時間）熱処理するようにした方法である。 That is, the present invention provides a method for manufacturing a semiconductor device including a step of forming a thermal oxide film on the surface of a silicon wafer, in which, immediately before the step of forming the thermal oxide film,
The silicon wafer is placed in an atmosphere containing hydrogen gas.
In this method, heat treatment is performed at a temperature of 1100 [°C] or higher (preferably for a time of 1 minute or less).
本発明によれば、より確実に理想に近い状態で
シリコンウエハの表面を自然酸化膜がなく且つ不
活性な状態に制御することができるので、該ウエ
ハ上に形成する熱酸化膜の欠陥発生を低減するこ
とができ、特に100［Å］以下の薄い熱酸化膜を十
分な耐圧を持たせて作ることができる。このた
め、MOS集積回路等の信頼性向上、微細化及び
高集積化をはかることができる。また、水素ガス
はシリコンウエハの表面をエツチングすることは
ないので、熱酸化膜形成の前処理でウエハ表面が
荒れる等の不都合も生じない。
According to the present invention, it is possible to more reliably control the surface of a silicon wafer to be in an inactive state with no natural oxide film in a state close to the ideal state, thereby preventing the occurrence of defects in the thermal oxide film formed on the wafer. In particular, a thin thermal oxide film of 100 Å or less can be made with sufficient breakdown voltage. Therefore, it is possible to improve reliability, miniaturization, and high integration of MOS integrated circuits and the like. Further, since hydrogen gas does not etch the surface of the silicon wafer, there will be no inconvenience such as roughening of the wafer surface during pretreatment for forming a thermal oxide film.
〔発明の実施例〕
以下、本発明の詳細を図示の実施例によつて説
明する。[Embodiments of the Invention] Details of the present invention will be explained below with reference to illustrated embodiments.
第１図ａ〜ｅは本発明の一実施例方法に係わる
MOSキヤパシタ製造工程を示す断面図である。
まず、CZ法により形成されウエハ状に切り出さ
れた面方位100、比抵抗５〜20［Ωcm］のシリコン
ウエハを用い、1000［℃］で水素燃焼酸化を100分
間行い、第１図ａに示す如くシリコンウエハ１１
の表面に厚さ5000［Å］の熱酸化膜１２を形成し
た。 Figures 1a to 1e relate to an embodiment of the method of the present invention.
FIG. 3 is a cross-sectional view showing the MOS capacitor manufacturing process.
First, using a silicon wafer with a surface orientation of 100 and a specific resistance of 5 to 20 [Ωcm] formed by the CZ method and cut into wafer shapes, hydrogen combustion oxidation was performed at 1000 [℃] for 100 minutes, as shown in Figure 1a. Like silicon wafer 11
A thermal oxide film 12 with a thickness of 5000 [Å] was formed on the surface of the substrate.
次いで、第１図ｂに示す如く全面にレジスト１
３を塗布したのち、写真蝕刻法によりゲート酸化
膜形成領域の酸化膜１２をエツチング除去した。
その後、第１図ｃに示す如くRCAリンス処理と
水洗により上記シリコンウエハ１１を洗浄した。
このとき、ウエハ１１の露出表面には、薄い自然
酸化膜１４が形成される。 Next, as shown in FIG. 1b, resist 1 is applied to the entire surface.
After coating No. 3, the oxide film 12 in the gate oxide film formation region was etched away by photolithography.
Thereafter, the silicon wafer 11 was cleaned by RCA rinsing and water washing as shown in FIG. 1c.
At this time, a thin native oxide film 14 is formed on the exposed surface of the wafer 11.
次いで、シリコンウエハ１１の表面に、例えば
ハロゲンランプを照射し、ウエハ表面温度を1100
［℃］まで上昇させ、10％の水素を含むアルゴン
ガス中に１分間晒し、第１図ｄに示す如く前記自
然酸化膜１４を除去した。このとき、シリコンウ
エハ１１の表面の不飽和結合には水素原子が結合
されることになる。 Next, the surface of the silicon wafer 11 is irradiated with, for example, a halogen lamp, and the wafer surface temperature is increased to 1100°C.
[°C] and exposed to argon gas containing 10% hydrogen for 1 minute to remove the natural oxide film 14 as shown in FIG. 1d. At this time, hydrogen atoms are bonded to unsaturated bonds on the surface of the silicon wafer 11.
次いで、上記第１図ｄに示す工程の直後に、20
［％］の乾燥酸素を含むアルゴンガス中で900［℃］
20分間シリコンウエハ１１を酸化し、第１図ｅに
示す如くシリコンウエハ１１の表面に厚さ40［Å］
の熱酸化膜（ゲート酸化膜）１５を形成した。続
いて、多結晶シリコン膜１６をLPCCVD法によ
り約0.4［μm］形成した。さらに、例えば1000
［℃］10分間のPOCl3拡散法により、多結晶シリ
コン膜１６の抵抗を低下させた後、写真蝕刻法に
よりゲート電極パターンを形成した。 Then, immediately after the step shown in FIG. 1d above, 20
900[℃] in argon gas containing [%] dry oxygen
The silicon wafer 11 was oxidized for 20 minutes, and a thickness of 40 [Å] was formed on the surface of the silicon wafer 11 as shown in FIG. 1e.
A thermal oxide film (gate oxide film) 15 was formed. Subsequently, a polycrystalline silicon film 16 of about 0.4 [μm] was formed by the LPCCVD method. Additionally, for example 1000
After reducing the resistance of the polycrystalline silicon film 16 by POCl 3 diffusion for 10 minutes [° C.], a gate electrode pattern was formed by photolithography.
上記形成された試料の耐圧不良率を測定したと
ころ、第２図に示す如き結果が得られた。ここ
で、図中Ａは本実施例による場合、Ｂは従来の場
合である。なお、いずれの場合も、ゲート面積は
10mm2、ゲート酸化膜厚は50［Å］とした。第２図
から判るように、本実施例の場合、従来例に比し
て、酸化膜の耐圧不良率が飛躍的に改善されるこ
とが判る。 When the breakdown voltage failure rate of the sample formed above was measured, the results shown in FIG. 2 were obtained. Here, A in the figure is the case according to this embodiment, and B is the conventional case. In addition, in both cases, the gate area is
10 mm 2 , and the gate oxide film thickness was 50 [Å]. As can be seen from FIG. 2, in the case of this example, the breakdown voltage failure rate of the oxide film is dramatically improved compared to the conventional example.
このように本実施例方法によれば、シリコンウ
エハ１１の表面に形成される熱酸化膜１５の欠陥
密度を著しく低減させることができる。このた
め、半導体集積回路の高集積化に大きな効果が得
られる。例えば、ゲート酸化膜の薄膜化を容易に
し、MOS素子の動作特性向上及び信頼性の向上
が可能となる。 As described above, according to the method of this embodiment, the defect density of the thermal oxide film 15 formed on the surface of the silicon wafer 11 can be significantly reduced. Therefore, a great effect can be obtained in increasing the degree of integration of semiconductor integrated circuits. For example, it is possible to easily reduce the thickness of the gate oxide film, thereby improving the operating characteristics and reliability of the MOS element.
なお、本発明は上述した実施例方法に限定され
るものではない。例えば、希釈不活性ガスとし
て、アルゴンを用いたが、その他ネオン、ヘリウ
ム等の貴ガスは勿論、窒素等の活性度の低いガス
を用いてもよい。さらに、ゲート電極として、リ
ン添加多結晶シリコンを用いたが、Al，Mo，Ｗ
等の高融点金属若しくはそのシリサイドを用いて
もよい。また、ゲート酸化膜等の熱酸化膜形成前
の熱処理温度は1100［℃］に限るものではなく、
それ以上の温度であればよい。さらに、このとき
の処理時間は、高温熱処理による半導体ウエハへ
の種々の影響を考慮すると１分以下の短時間とす
るのが望ましい。 Note that the present invention is not limited to the method of the embodiment described above. For example, although argon was used as the diluent inert gas, other noble gases such as neon and helium, as well as gases with low activity such as nitrogen, may be used. Furthermore, although phosphorus-doped polycrystalline silicon was used as the gate electrode, Al, Mo, W
High melting point metals such as or silicides thereof may also be used. In addition, the heat treatment temperature before forming a thermal oxide film such as a gate oxide film is not limited to 1100 [℃].
Any temperature higher than that is sufficient. Further, the processing time at this time is desirably short, one minute or less, in consideration of various effects on the semiconductor wafer due to high-temperature heat treatment.
また、実施例ではMOSキヤパシタの製造に応
用したが、MOSFET及びMOS集積回路は勿論の
こと、他の熱酸化膜を有する半導体素子の製造に
適用することが可能である。その他、本発明の要
旨を逸脱しない範囲で、種々変形して実施するこ
とができる。 Further, in the embodiment, the present invention is applied to the manufacture of MOS capacitors, but it can be applied to the manufacture of not only MOSFETs and MOS integrated circuits but also other semiconductor elements having thermal oxide films. In addition, various modifications can be made without departing from the gist of the present invention.
第１図ａ〜ｅは本発明の一実施例方法に係わる
MOSキヤパシタ製造工程を示す断面図、第２図
は上記実施例の効果を説明するためのもので熱酸
化膜の耐圧不良率を示す特性図である。
１１…シリコンウエハ、１２…熱酸化膜、１３
…レジスト、１４…自然酸化膜、１５…熱酸化膜
（ゲート酸化膜）、１６…添加多結晶シリコン膜
（ゲート電極）。
Figures 1a to 1e relate to an embodiment of the method of the present invention.
FIG. 2 is a sectional view showing the manufacturing process of a MOS capacitor, and is a characteristic diagram showing the breakdown voltage failure rate of a thermal oxide film, for explaining the effects of the above embodiment. 11... Silicon wafer, 12... Thermal oxide film, 13
...Resist, 14... Natural oxide film, 15... Thermal oxide film (gate oxide film), 16... Added polycrystalline silicon film (gate electrode).
Claims (1)
工程を含む半導体素子の製造方法において、前記
熱酸化膜を形成する工程の直前に、水素ガスを含
む非酸化性雰囲気中で前記シリコンウエハを1100
［℃］以上の温度で熱処理することを特徴とする
半導体素子の製造方法。 ２ 前記熱処理の時間を、１分以下に設定したこ
とを特徴とする特許請求の範囲第１項記載の半導
体素子の製造方法。 ３ 前記熱酸化膜は、ゲート酸化膜であることを
特徴とする特許請求の範囲第１項記載の半導体素
子の製造方法。 ４ 前記熱処理するに際し、ハロゲンランプ等の
光加熱により前記シリコンウエハの表面を1100
［℃］以上の温度に加熱することを特徴とする特
許請求の範囲第１項記載の半導体素子の製造方
法。[Scope of Claims] 1. In a method for manufacturing a semiconductor device including a step of forming a thermal oxide film on the surface of a silicon wafer, immediately before the step of forming the thermal oxide film, the method is performed in a non-oxidizing atmosphere containing hydrogen gas. 1100 silicon wafers
A method for manufacturing a semiconductor device, characterized by heat treatment at a temperature of [°C] or higher. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment time is set to 1 minute or less. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the thermal oxide film is a gate oxide film. 4. When performing the heat treatment, the surface of the silicon wafer is heated at 1100° C. by light heating using a halogen lamp or the like.
2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is heated to a temperature of [° C.] or higher.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60033183A JPS61193456A (en) | 1985-02-21 | 1985-02-21 | Manufacture of semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60033183A JPS61193456A (en) | 1985-02-21 | 1985-02-21 | Manufacture of semiconductor element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61193456A JPS61193456A (en) | 1986-08-27 |
| JPH0380338B2 true JPH0380338B2 (en) | 1991-12-24 |
Family
ID=12379380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60033183A Granted JPS61193456A (en) | 1985-02-21 | 1985-02-21 | Manufacture of semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61193456A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004152965A (en) * | 2002-10-30 | 2004-05-27 | Fujitsu Ltd | Semiconductor device manufacturing method and semiconductor device |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2680482B2 (en) * | 1990-06-25 | 1997-11-19 | 株式会社東芝 | Semiconductor substrate, semiconductor substrate and semiconductor device manufacturing method, and semiconductor substrate inspection / evaluation method |
| JPH0680655B2 (en) * | 1987-03-16 | 1994-10-12 | 沖電気工業株式会社 | Insulation film formation method |
| JP2624366B2 (en) * | 1990-10-31 | 1997-06-25 | 山形日本電気株式会社 | Method for manufacturing semiconductor device |
| JPH04348524A (en) * | 1991-05-27 | 1992-12-03 | Nec Corp | Manufacture of semiconductor device |
| JP3187109B2 (en) * | 1992-01-31 | 2001-07-11 | キヤノン株式会社 | Semiconductor member and method of manufacturing the same |
| JP4467096B2 (en) | 1998-09-14 | 2010-05-26 | Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 | Silicon single crystal manufacturing method and semiconductor forming wafer |
| KR100720659B1 (en) | 1999-08-27 | 2007-05-21 | 사무코 테크시부 가부시키가이샤 | Silicon wafer, its manufacturing method, evaluation method of silicon wafer |
| JP2004087960A (en) * | 2002-08-28 | 2004-03-18 | Fujitsu Ltd | Method for manufacturing semiconductor device |
| TWI265217B (en) * | 2002-11-14 | 2006-11-01 | Komatsu Denshi Kinzoku Kk | Method and device for manufacturing silicon wafer, method for manufacturing silicon single crystal, and device for pulling up silicon single crystal |
| US7014704B2 (en) | 2003-06-06 | 2006-03-21 | Sumitomo Mitsubishi Silicon Corporation | Method for growing silicon single crystal |
| WO2005014898A1 (en) | 2003-08-12 | 2005-02-17 | Shin-Etsu Handotai Co.,Ltd. | Process for producing wafer |
| JP6157809B2 (en) * | 2012-07-19 | 2017-07-05 | 株式会社Ｓｃｒｅｅｎホールディングス | Substrate processing method |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5091272A (en) * | 1973-12-12 | 1975-07-21 | ||
| JPS51115299A (en) * | 1975-04-03 | 1976-10-09 | Mitsubishi Electric Corp | Formation process of silicon oxide film |
| JPS51147250A (en) * | 1975-06-13 | 1976-12-17 | Fujitsu Ltd | Treatment method of semiconductor substrate |
| IN145547B (en) * | 1976-01-12 | 1978-11-04 | Rca Corp |
-
1985
- 1985-02-21 JP JP60033183A patent/JPS61193456A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004152965A (en) * | 2002-10-30 | 2004-05-27 | Fujitsu Ltd | Semiconductor device manufacturing method and semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61193456A (en) | 1986-08-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |