JPH0382434U - - Google Patents

Info

Publication number
JPH0382434U
JPH0382434U JP14298989U JP14298989U JPH0382434U JP H0382434 U JPH0382434 U JP H0382434U JP 14298989 U JP14298989 U JP 14298989U JP 14298989 U JP14298989 U JP 14298989U JP H0382434 U JPH0382434 U JP H0382434U
Authority
JP
Japan
Prior art keywords
write address
address signal
generation circuit
signal generation
image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14298989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14298989U priority Critical patent/JPH0382434U/ja
Publication of JPH0382434U publication Critical patent/JPH0382434U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案によるビデオプリンタ装置の画
像記憶回路の一実施例における書込みアドレス信
号発生回路を示すブロツク図、第2図はビデオプ
リンタ装置の全体構成を示すブロツク図、第3図
は上記実施例についての入力画像、記憶画像及び
印画画像を示す説明図、第4図は第1図の各部タ
イミングチヤートである。 20……書込みアドレス信号発生回路、21…
…タイミング信号発生回路、22……書込みアド
レス信号生成回路、30,31……スイツチ回路
、32,34……D型フリツプフロツプ回路、3
3……ナンド回路、35……アンド回路。
FIG. 1 is a block diagram showing a write address signal generation circuit in an embodiment of the image storage circuit of a video printer device according to the present invention, FIG. 2 is a block diagram showing the overall configuration of the video printer device, and FIG. 3 is a block diagram showing the above-described implementation. An explanatory diagram showing an input image, a stored image, and a printed image for an example, and FIG. 4 is a timing chart of each part of FIG. 1. 20...Write address signal generation circuit, 21...
...Timing signal generation circuit, 22...Write address signal generation circuit, 30, 31...Switch circuit, 32, 34...D-type flip-flop circuit, 3
3...NAND circuit, 35...AND circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 印画する画像を記憶するものであつて、印
画が終了する前には記憶画像が繰返し読み出され
てデイスプレイに与えられるビデオプリンタ装置
の画像記憶回路において、 縮小印画を行なうために入力画像を記憶する場
合に、書込みアドレス信号発生回路からの書込み
アドレス信号の周期を長くして入力画像を縮小し
て記憶するようにしたことを特徴とするビデオプ
リンタ装置の画像記憶回路。 (2) 上記書込みアドレス信号発生回路が、書込
みアドレス信号生成回路とタイミング信号発生回
路とからなり、上記タイミング信号発生回路が縮
小率に応じて水平同期信号及びクロツク信号を間
引いて上記書込みアドレス信号生成回路に与え、
上記書込みアドレス信号生成回路が間引かれた水
平同期信号及びクロツク信号に基づいて書込みア
ドレス信号を変化させることを特徴とする請求項
第1項に記載のビデオプリンタ装置の画像記憶回
路。
[Claims for Utility Model Registration] (1) An image storage circuit of a video printer that stores an image to be printed, and in which the stored image is repeatedly read out and displayed on a display before printing is completed, A video printer device characterized in that when an input image is stored for reduction printing, the period of a write address signal from a write address signal generation circuit is lengthened to reduce and store the input image. Image memory circuit. (2) The write address signal generation circuit includes a write address signal generation circuit and a timing signal generation circuit, and the timing signal generation circuit generates the write address signal by thinning out the horizontal synchronization signal and the clock signal according to the reduction rate. give to the circuit,
2. The image storage circuit for a video printer apparatus according to claim 1, wherein said write address signal generation circuit changes the write address signal based on a thinned out horizontal synchronizing signal and a clock signal.
JP14298989U 1989-12-11 1989-12-11 Pending JPH0382434U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14298989U JPH0382434U (en) 1989-12-11 1989-12-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14298989U JPH0382434U (en) 1989-12-11 1989-12-11

Publications (1)

Publication Number Publication Date
JPH0382434U true JPH0382434U (en) 1991-08-22

Family

ID=31689791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14298989U Pending JPH0382434U (en) 1989-12-11 1989-12-11

Country Status (1)

Country Link
JP (1) JPH0382434U (en)

Similar Documents

Publication Publication Date Title
JPS6338724B2 (en)
JP2745603B2 (en) Workstation display controller
JPS6246945U (en)
JPS614991U (en) Synchronous signal generation circuit
JPH0397291U (en)
JPS6138473B2 (en)
JPS60140989U (en) Character display device
JPS60104877U (en) image display device
JPS63163067U (en)
JPS63178896U (en)
JPH02273788A (en) image storage device
JPS5958388U (en) parent-child electric clock
JPS58108473U (en) Speed sense display device
JPH02124153U (en)
JPH0412053U (en)
JPH02128483U (en)
JPH01266591A (en) image display device
JPS58157385U (en) CRT display device
JPS6144974U (en) image memory device
JPH0418894U (en)
JPS58108493U (en) image control device
JPS60161393U (en) display device
JPS63133771U (en)
JPH0334791Y2 (en)
JPS63564U (en)