JPH0384994A - Multilayer printed-circuit board - Google Patents
Multilayer printed-circuit boardInfo
- Publication number
- JPH0384994A JPH0384994A JP22212789A JP22212789A JPH0384994A JP H0384994 A JPH0384994 A JP H0384994A JP 22212789 A JP22212789 A JP 22212789A JP 22212789 A JP22212789 A JP 22212789A JP H0384994 A JPH0384994 A JP H0384994A
- Authority
- JP
- Japan
- Prior art keywords
- inner layer
- circuit patterns
- multilayer printed
- holes
- patterns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は、多層プリント配線板に係り、特に内層バイア
ーホール乃至ブラインドスルホールを有する多層プリン
ト配線板の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a multilayer printed wiring board, and particularly to an improvement of a multilayer printed wiring board having inner layer via holes or blind through holes.
(従来の技術)
電子機器類の小型化や高機能化などに対応して、回路構
成の高密度化乃至回路部分の小型化を目的として、多層
プリント配線板が実用に供されている。すなわち、絶縁
体層を介して内層回路パターンを多段的に配設一体化す
るとともに、外表面回路パターンを一体的に設けて複雑
な回路を構成して成る多層プリント配線板が、広く各種
の電子機器に使用されている。ところで、この種の多層
プリント配線板においては、成る内層回路パターン同士
を、もしくは成る内層回路パターンと外層回路パターン
とを電気的に接続する場合が往々ある。しかして、前記
内層回路パターン同士、もしくは内層回路パターンと外
層回路パターンとの電気的な接続は次のように行われて
いる。すなわち、先ず所要の内層回路板の所定の領域に
ドリル加工やレーザ加工により、所要の内層バイアーホ
ール(ブラインドスルホール)を穿設し、この内層バイ
アーホール内壁面に、化学めっきや電気めっきを施し回
路パターン間の導体接続を行なう。(Prior Art) In response to the miniaturization and higher functionality of electronic devices, multilayer printed wiring boards have been put into practical use for the purpose of increasing the density of circuit configurations and miniaturizing circuit parts. In other words, multilayer printed wiring boards are widely used in a variety of electronic devices, in which inner layer circuit patterns are arranged and integrated in multiple stages via insulating layers, and outer surface circuit patterns are integrated to form complex circuits. used in equipment. Incidentally, in this type of multilayer printed wiring board, inner layer circuit patterns are often electrically connected to each other, or inner layer circuit patterns and outer layer circuit patterns are electrically connected to each other. Electrical connections between the inner layer circuit patterns or between the inner layer circuit patterns and the outer layer circuit patterns are performed as follows. That is, first, the required inner layer via hole (blind through hole) is drilled in a predetermined area of the inner layer circuit board by drilling or laser processing, and the inner wall surface of the inner layer via hole is coated with chemical plating or electroplating to form the circuit. Make conductor connections between patterns.
しかる後、前記内層バイアーホールを設けた内層回路板
を含め所要の内層回路板および外層回路板を、プリプレ
グ層を介して重ね合せ、加圧成形して多層プリント配線
板を得た後、他の所定領域にドリル加工やレーザ加工に
より、所要のスルホールを穿設し、このスルホール内壁
面に、化学めっきや電気めっきを施し、たとえば外層回
路パターン同士もしくは外層回路パターンと他の内層回
路パターンとの接続を行なっている。Thereafter, the necessary inner layer circuit boards and outer layer circuit boards, including the inner layer circuit board provided with the inner layer via holes, are stacked on top of each other with prepreg layers interposed therebetween and pressure-molded to obtain a multilayer printed wiring board. A required through hole is drilled in a predetermined area by drilling or laser processing, and chemical plating or electroplating is applied to the inner wall surface of the through hole to connect outer layer circuit patterns to each other or to connect an outer layer circuit pattern to another inner layer circuit pattern. is being carried out.
第4図は従来の内層回路パターン間を電気的に接続する
内層バイアーホールを有する多層プリント配線板1の要
部断面図で、2は内層回路パターン3a、3b間を電気
的に接続する内層バイアーホール、4は外層回路パター
ン5a、 5b間を電気的に接続するスルホール、3c
は他の内層回路パターン、6は回路パターン間を電気的
に絶縁する絶縁層をそれぞれ示す。FIG. 4 is a sectional view of a main part of a conventional multilayer printed wiring board 1 having inner layer via holes for electrically connecting between inner layer circuit patterns, and 2 is an inner layer via hole for electrically connecting between inner layer circuit patterns 3a and 3b. A hole 4 is a through hole 3c that electrically connects between the outer layer circuit patterns 5a and 5b.
6 indicates another inner layer circuit pattern, and 6 indicates an insulating layer that electrically insulates between the circuit patterns.
(9!明が解決しようとする課題)
しかし、上記内層バイアーホールを有する多層プリント
配線板には次のような不都合がある。(Problem to be solved by 9! Ming) However, the multilayer printed wiring board having the above-mentioned inner layer via hole has the following disadvantages.
すなわち、多層的に配設される回路パターン(内層およ
び外層回路パターン)間を電気的に接続するため、上記
所要の内層バイアーホールおよびスルホールをそれぞれ
別の位置に形設する必要がある。つまり、内層バイアー
ホールおよびスルホールを穿設する領域を各別に必要と
し、このため回路パターンのレイアウトが制限される・
とともに、配線密度(回路パターン密度)の向上も図り
得ないと言う問題がある。That is, in order to electrically connect circuit patterns (inner layer and outer layer circuit patterns) arranged in multiple layers, it is necessary to form the required inner layer via holes and through holes at different positions. In other words, separate areas are required for drilling inner layer via holes and through holes, which limits the layout of the circuit pattern.
Additionally, there is a problem in that it is impossible to improve the wiring density (circuit pattern density).
本発明は、上記事情に対処して回路パターンの設計自由
度を高く選び得、また回路パターン密度も高め得る多層
プリント配線板を提供するものである。The present invention addresses the above-mentioned circumstances and provides a multilayer printed wiring board that allows a high degree of freedom in designing circuit patterns and increases circuit pattern density.
(課題を解決するための手段)
本発明は、内層回路パターン間を電気的に接続する内層
バイアーホールを有する多層プリント配線板であって、
前記内層回路パターンの外層側の回路パターン間を電気
的に接続するスルホールが前記内層バイアーホール領域
内に同軸的に形設されて成ることを特徴とする。(Means for Solving the Problems) The present invention is a multilayer printed wiring board having inner layer via holes that electrically connect inner layer circuit patterns,
A through hole for electrically connecting the circuit patterns on the outer layer side of the inner layer circuit pattern is formed coaxially within the inner layer via hole region.
(作 用)
本発明によれば、所定の内層回路パターン間を接続する
内層バイアーホール領域内を利用し、この領域内に同軸
的に前記内層回路パターン間を電気的に接続するスルホ
ールが形設される。つまり、内層バイアーホールおよび
スルホールを、所定領域に同軸的に設けであるため、回
路パターンの形設乃至形成可能な領域も広くなり、回路
パターンのレイアウト自由度や配線密度の向上なども容
易に図り得ることになる。(Function) According to the present invention, an inner layer via hole region that connects predetermined inner layer circuit patterns is utilized, and a through hole that electrically connects the inner layer circuit patterns is formed coaxially within this region. be done. In other words, since the inner layer via holes and through holes are provided coaxially in a predetermined area, the area in which circuit patterns can be formed is widened, and it is easy to improve the flexibility of circuit pattern layout and wiring density. You will get it.
(実施例)
以下、第1図乃至第3図を参照して、本発明の詳細な説
明する。第1図は本発明に係る多層プリント配線板1の
要部構成を断面的に示したもので、2は内層回路パター
ン3a、3b間を電気的に接続する内層バイアーホール
、4は外層回路パターン5a、 5b間を電気的に接続
するスルホール、3Cは他の内層回路パターン、6は回
路パターン間を電気的に絶縁する絶縁層をそれぞれ示す
。つまり、本発明に係る多層プリント配線板1において
は、所要の内層回路パターン8a、3b間を電気的に接
続する内層バイアーホール2と、前記内層回路パターン
3a、3bの外側に配設された回路パターンたとえば外
層回路パターン5a、5b間を電気的に接続するスルホ
ール4とを同軸的に形設した構造を備えている。(Example) The present invention will be described in detail below with reference to FIGS. 1 to 3. FIG. 1 is a cross-sectional view showing the main structure of a multilayer printed wiring board 1 according to the present invention, in which 2 is an inner layer via hole that electrically connects inner layer circuit patterns 3a and 3b, and 4 is an outer layer circuit pattern. A through hole electrically connects between 5a and 5b, 3C indicates another inner layer circuit pattern, and 6 indicates an insulating layer electrically insulating between the circuit patterns. That is, in the multilayer printed wiring board 1 according to the present invention, the inner layer via hole 2 electrically connects the required inner layer circuit patterns 8a, 3b, and the circuit arranged outside the inner layer circuit patterns 3a, 3b. It has a structure in which patterns such as through holes 4 for electrically connecting the outer layer circuit patterns 5a and 5b are coaxially formed.
しかして、上記構成の多層プリント配線板は、たとえば
次のようにして製造し得る。先ず第2図に断面的に示す
ような、厚さ 0.2mmの絶縁層6′の両面に厚さ1
8μ−の銅箔を張合せて成る内層回路板用素材を用意し
、所要の領域に内層バイアーホール用の孔4aを穿設す
る。次いで、前記穿設した内層バイアーホール用の孔4
a内を洗浄してから、前記銅箔について、フォトエツチ
ング処理を施し、第2図に断面的に示すような所要の内
層回路パターン8a、 3bを形成する一方、上記内層
バイア−ホール用孔4a内壁面に、たとえば化学めっき
法などにより導電体層を被着形成して所要の内層バイア
ーホールを具備させる。しかる後、第3図に断面的に示
す如く、上記内層回路パターン3a、 3b間を内層バ
イアーホール2で電気的に接続して成る内層回路素板1
a、他の内層回路素板1bおよび外層回路パターン形成
用の銅箔7を、それらの間にプリプレグ層8を介在させ
て積層し、加圧成形を施して多層プリント配線板を得る
。なお、前記内層回路素板1a、他の内層回路素板ib
および外層回路パターン形成用の銅箔7を、それらの間
にプリプレグ層8を介在させて積層するに当っては、予
め内層回路素板1aの外側に位置する回路パターン5a
、56間の接続用スルホール4を形設する位置が、前記
内層回路素板1aの内層バイアーホール2に対し同軸的
な位置関係を保持するように設定する。かくして得た多
層プリント配線板の両面銅箔7について、所要のスルホ
ール接続用の孔を穿設する一方、選択的なフォトエツチ
ング処理を施し外層回路パターン5aを形成する。次い
で、前記穿設、形成したスルホール接続孔内壁面に、要
すればたとえば化学めっき法などにより導電体層を被着
形成して所要のスルホール接続4を行うことにより所望
の多層プリント配線板を得ることができる。つまり、前
記スルホール接続4は、内壁面に化学めっき法などによ
り導電体層を被着形成して行う代りに、たとえばリード
線を用いて行ってもよく、その場合はスルホール接続用
の孔の径も 0.51以下程度で足りさらに好ましい結
果が得られる。The multilayer printed wiring board having the above structure can be manufactured, for example, as follows. First, as shown cross-sectionally in FIG.
A material for an inner layer circuit board made by pasting 8μ copper foil is prepared, and holes 4a for inner layer via holes are bored in required areas. Next, the hole 4 for the inner layer via hole that has been drilled is
After cleaning the inside of the copper foil, the copper foil is photoetched to form the required inner layer circuit patterns 8a and 3b as shown in cross section in FIG. A conductive layer is formed on the inner wall surface by, for example, chemical plating to provide necessary inner layer via holes. Thereafter, as shown in cross section in FIG. 3, an inner layer circuit board 1 is formed by electrically connecting the inner layer circuit patterns 3a and 3b with the inner layer via holes 2.
a. Another inner layer circuit board 1b and a copper foil 7 for forming an outer layer circuit pattern are laminated with a prepreg layer 8 interposed therebetween, and pressure molded to obtain a multilayer printed wiring board. Note that the inner layer circuit board 1a and the other inner layer circuit board ib
When laminating the copper foil 7 for forming the outer layer circuit pattern with the prepreg layer 8 interposed therebetween, the circuit pattern 5a located outside the inner layer circuit board 1a is prepared in advance.
, 56 is set so as to maintain a coaxial positional relationship with the inner layer via hole 2 of the inner layer circuit board 1a. The double-sided copper foil 7 of the multilayer printed wiring board thus obtained is drilled with holes for necessary through-hole connections, and selectively photoetched to form an outer layer circuit pattern 5a. Next, a desired multilayer printed wiring board is obtained by depositing a conductive layer on the inner wall surface of the through-hole connection hole that has been drilled and formed, if necessary, by, for example, chemical plating, and making the required through-hole connection 4. be able to. That is, instead of forming the conductive layer on the inner wall surface by chemical plating or the like, the through-hole connection 4 may be made using a lead wire, and in that case, the diameter of the hole for through-hole connection may be A value of about 0.51 or less is sufficient, and even more preferable results can be obtained.
[発明の効果]
本発明によれば、所定の内層回路パターン間を電気的に
接続する内層バイアーホールの領域内に、その外側に位
置する回路パターン間の電気的な接続を行うスルホール
が同軸的にで穿設、形成される。つまり、所要の回路パ
ターン間を接続する導電体層が2重スルホールの形で形
成具備している。[Effects of the Invention] According to the present invention, within the area of an inner layer via hole that electrically connects between predetermined inner layer circuit patterns, a through hole that electrically connects between circuit patterns located outside thereof is coaxial. It is drilled and formed in. In other words, the conductor layer that connects the required circuit patterns is formed in the form of double through holes.
このように所要の回路パターン間の接続が2重スルホー
ルの形で行われ、このための所要領域を低減できるため
、回路パターン形成密度やレイアウトの自由度向上に寄
与し得る。In this way, connections between required circuit patterns are made in the form of double through holes, and the area required for this can be reduced, which can contribute to improved circuit pattern formation density and freedom in layout.
第1図は本発明に係る多層ブ、リント配線板の要部構成
例を示す断面図、第2図は本発明に係る多層プリント配
線板を構成する内層バイアーホールを有するの内層回路
素板の断面図、第3図は本発明に係る多層プリント配線
板を製造する態様を模式的に示した断面図、第4図は従
来の多層プリン
ト配線板の要部構成を示す断面図である。
1・・・・・・・・・多層プリント配線板la、lb・
・・内層回路素板
2・・・・・・・・・内層バイアーホール8a、3b・
・・内層バイアーホールで接続された内層回路パターン
3c・・・・・・・・・他の内層回路パターン4・・・
・・・・・・スルホール
5a、5b・・・外層回路パターン
6・・・・・・・・・絶縁層
7・・・・・・・・・銅箔
8・・・・・・・・・プリプレグ層FIG. 1 is a sectional view showing an example of the main part configuration of a multilayer printed wiring board according to the present invention, and FIG. 2 is a sectional view of an inner layer circuit board having inner layer via holes constituting the multilayer printed wiring board according to the present invention. FIG. 3 is a cross-sectional view schematically showing a mode of manufacturing a multilayer printed wiring board according to the present invention, and FIG. 4 is a cross-sectional view showing the main structure of a conventional multilayer printed wiring board. 1...Multilayer printed wiring board la, lb.
...Inner layer circuit board 2...Inner layer via holes 8a, 3b.
...Inner layer circuit pattern 3c connected by inner layer via hole...Other inner layer circuit pattern 4...
...Through holes 5a, 5b...Outer layer circuit pattern 6...Insulating layer 7...Copper foil 8... prepreg layer
Claims (1)
ホールを有する多層プリント配線板であって、前記内層
回路パターンの外層側の回路パターン間を電気的に接続
するスルホールが前記内層バイアーホール領域内に同軸
的に形設されて成ることを特徴とする多層プリント配線
板。A multilayer printed wiring board having an inner layer via hole that electrically connects between inner layer circuit patterns, wherein a through hole that electrically connects between the circuit patterns on the outer layer side of the inner layer circuit pattern is coaxial within the inner layer via hole region. A multilayer printed wiring board characterized in that it is formed by
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22212789A JPH0384994A (en) | 1989-08-28 | 1989-08-28 | Multilayer printed-circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22212789A JPH0384994A (en) | 1989-08-28 | 1989-08-28 | Multilayer printed-circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0384994A true JPH0384994A (en) | 1991-04-10 |
Family
ID=16777589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22212789A Pending JPH0384994A (en) | 1989-08-28 | 1989-08-28 | Multilayer printed-circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0384994A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006223726A (en) * | 2005-02-21 | 2006-08-31 | Tokai Univ | Medical pillow |
-
1989
- 1989-08-28 JP JP22212789A patent/JPH0384994A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006223726A (en) * | 2005-02-21 | 2006-08-31 | Tokai Univ | Medical pillow |
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