JPH0385646U - - Google Patents
Info
- Publication number
- JPH0385646U JPH0385646U JP1989148003U JP14800389U JPH0385646U JP H0385646 U JPH0385646 U JP H0385646U JP 1989148003 U JP1989148003 U JP 1989148003U JP 14800389 U JP14800389 U JP 14800389U JP H0385646 U JPH0385646 U JP H0385646U
- Authority
- JP
- Japan
- Prior art keywords
- package body
- semiconductor chip
- semiconductor device
- electrode
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07553—Controlling the environment, e.g. atmosphere composition or temperature changes in shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａ，ｂは本考案の一実施例を示す斜視図
及びＡ−Ａ′線断面図である。 １……半導体チツプ、２……パツケージ本体、
３……内部リード、４……外部リード、５……電
極パツド。
及びＡ−Ａ′線断面図である。 １……半導体チツプ、２……パツケージ本体、
３……内部リード、４……外部リード、５……電
極パツド。
Claims (1)
- パツケージ本体の側面又は下面に導出した外部
リードを有する半導体装置において、半導体チツ
プを搭載した前記パツケージ本体と、前記パツケ
ージ本体の上面に露出させて設け且つ前記半導体
チツプの電極と電気的に接続した電極パツドとを
備えたことを特徴とする半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989148003U JPH0385646U (ja) | 1989-12-21 | 1989-12-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989148003U JPH0385646U (ja) | 1989-12-21 | 1989-12-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0385646U true JPH0385646U (ja) | 1991-08-29 |
Family
ID=31694471
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989148003U Pending JPH0385646U (ja) | 1989-12-21 | 1989-12-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0385646U (ja) |
-
1989
- 1989-12-21 JP JP1989148003U patent/JPH0385646U/ja active Pending