JPH0386432U - - Google Patents

Info

Publication number
JPH0386432U
JPH0386432U JP14876989U JP14876989U JPH0386432U JP H0386432 U JPH0386432 U JP H0386432U JP 14876989 U JP14876989 U JP 14876989U JP 14876989 U JP14876989 U JP 14876989U JP H0386432 U JPH0386432 U JP H0386432U
Authority
JP
Japan
Prior art keywords
input
control circuit
reset
circuit
reset signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14876989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14876989U priority Critical patent/JPH0386432U/ja
Publication of JPH0386432U publication Critical patent/JPH0386432U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の好適な実施例を示し、第1図は装
置全体の概略的なブロツク図、第2図は通電時と
停電時におけるリセツト信号吸収回路の出力端の
電圧状態を示す説明図である。 1……リセツト回路、2……制御回路、4……
リセツト信号吸収回路、5……メモリ、6……電
池、7……スイツチング回路。
The figures show a preferred embodiment of the present invention, with Figure 1 being a schematic block diagram of the entire device, and Figure 2 being an explanatory diagram showing the voltage state at the output end of the reset signal absorption circuit during power on and during power outage. be. 1...Reset circuit, 2...Control circuit, 4...
Reset signal absorption circuit, 5...memory, 6...battery, 7...switching circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 停電時にメモリ及び制御回路を外部電池でバツ
クアツプする装置に使用され、電源投入時とウオ
ツチドツグリトリガ信号が入力しない時に、前記
制御回路に対してリセツト信号を出力するリセツ
ト回路において、停電時に前記制御回路にリセツ
ト信号が入力することを阻止する入力阻止手段を
設けたことを特徴とするリセツト回路。
A reset circuit is used in a device that backs up the memory and control circuit with an external battery in the event of a power outage, and outputs a reset signal to the control circuit when the power is turned on and when no watchdog trigger signal is input. 1. A reset circuit comprising input blocking means for blocking a reset signal from being input to the control circuit.
JP14876989U 1989-12-25 1989-12-25 Pending JPH0386432U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14876989U JPH0386432U (en) 1989-12-25 1989-12-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14876989U JPH0386432U (en) 1989-12-25 1989-12-25

Publications (1)

Publication Number Publication Date
JPH0386432U true JPH0386432U (en) 1991-09-02

Family

ID=31695203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14876989U Pending JPH0386432U (en) 1989-12-25 1989-12-25

Country Status (1)

Country Link
JP (1) JPH0386432U (en)

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