JPH0398520U - - Google Patents
Info
- Publication number
- JPH0398520U JPH0398520U JP782190U JP782190U JPH0398520U JP H0398520 U JPH0398520 U JP H0398520U JP 782190 U JP782190 U JP 782190U JP 782190 U JP782190 U JP 782190U JP H0398520 U JPH0398520 U JP H0398520U
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- signal
- input
- control signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図は本考案の一実施例の回路構成図、第２
図は本考案の一実施例の特性図、第３図は本考案
の他の実施例の回路構成図、第４図は従来の一例
の回路図、第５図は従来の一例の特性図である。
１……入力端子、２……出力端子、３……制御
端子、４……２ゲートＦＥＴ、５……バイアス端
子、６……帰還回路。
Figure 1 is a circuit configuration diagram of one embodiment of the present invention, Figure 2 is a circuit diagram of an embodiment of the present invention.
The figure is a characteristic diagram of one embodiment of the present invention, Figure 3 is a circuit configuration diagram of another embodiment of the present invention, Figure 4 is a circuit diagram of a conventional example, and Figure 5 is a characteristic diagram of a conventional example. be. 1...Input terminal, 2...Output terminal, 3...Control terminal, 4...2 gate FET, 5...Bias terminal, 6...Feedback circuit.
Claims (1)
信号により整流素子の順方向電流を制御すること
により入力信号の減衰量を制御して、該出力信号
レベルを一定に保持する自動利得制御回路におい
て、 前記制御信号が入力端子に入力され、前記制御
信号に対する前記入力信号の減衰量の特性がリニ
アになるように前記整流素子への順方向電流を制
御する制御回路と、 前記制御回路の前記制御信号の入力端子に帰還
をかける帰還回路とを具備してなる自動利得制御
回路。[Claims for Utility Model Registration] The amount of attenuation of the input signal is controlled by controlling the forward current of the rectifying element using a control signal whose level changes according to the output signal level, and the output signal level is maintained constant. In the automatic gain control circuit, the control signal is input to an input terminal, and a control circuit that controls a forward current to the rectifier so that the attenuation characteristic of the input signal with respect to the control signal is linear; An automatic gain control circuit comprising: a feedback circuit that applies feedback to an input terminal of the control signal of the control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990007821U JPH0724808Y2 (en) | 1990-01-30 | 1990-01-30 | Automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990007821U JPH0724808Y2 (en) | 1990-01-30 | 1990-01-30 | Automatic gain control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0398520U true JPH0398520U (en) | 1991-10-14 |
| JPH0724808Y2 JPH0724808Y2 (en) | 1995-06-05 |
Family
ID=31511475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990007821U Expired - Fee Related JPH0724808Y2 (en) | 1990-01-30 | 1990-01-30 | Automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0724808Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4836755U (en) * | 1971-09-07 | 1973-05-02 | ||
| JPS6331621U (en) * | 1986-08-15 | 1988-03-01 |
-
1990
- 1990-01-30 JP JP1990007821U patent/JPH0724808Y2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4836755U (en) * | 1971-09-07 | 1973-05-02 | ||
| JPS6331621U (en) * | 1986-08-15 | 1988-03-01 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0724808Y2 (en) | 1995-06-05 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |