JPH0398520U - - Google Patents

Info

Publication number
JPH0398520U
JPH0398520U JP782190U JP782190U JPH0398520U JP H0398520 U JPH0398520 U JP H0398520U JP 782190 U JP782190 U JP 782190U JP 782190 U JP782190 U JP 782190U JP H0398520 U JPH0398520 U JP H0398520U
Authority
JP
Japan
Prior art keywords
control circuit
signal
input
control signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP782190U
Other languages
English (en)
Other versions
JPH0724808Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990007821U priority Critical patent/JPH0724808Y2/ja
Publication of JPH0398520U publication Critical patent/JPH0398520U/ja
Application granted granted Critical
Publication of JPH0724808Y2 publication Critical patent/JPH0724808Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例の回路構成図、第２
図は本考案の一実施例の特性図、第３図は本考案
の他の実施例の回路構成図、第４図は従来の一例
の回路図、第５図は従来の一例の特性図である。 １……入力端子、２……出力端子、３……制御
端子、４……２ゲートＦＥＴ、５……バイアス端
子、６……帰還回路。

Claims (1)

  1. 【実用新案登録請求の範囲】 出力信号レベルに応じてレベルが変化する制御
    信号により整流素子の順方向電流を制御すること
    により入力信号の減衰量を制御して、該出力信号
    レベルを一定に保持する自動利得制御回路におい
    て、 前記制御信号が入力端子に入力され、前記制御
    信号に対する前記入力信号の減衰量の特性がリニ
    アになるように前記整流素子への順方向電流を制
    御する制御回路と、 前記制御回路の前記制御信号の入力端子に帰還
    をかける帰還回路とを具備してなる自動利得制御
    回路。
JP1990007821U 1990-01-30 1990-01-30 自動利得制御回路 Expired - Fee Related JPH0724808Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990007821U JPH0724808Y2 (ja) 1990-01-30 1990-01-30 自動利得制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990007821U JPH0724808Y2 (ja) 1990-01-30 1990-01-30 自動利得制御回路

Publications (2)

Publication Number Publication Date
JPH0398520U true JPH0398520U (ja) 1991-10-14
JPH0724808Y2 JPH0724808Y2 (ja) 1995-06-05

Family

ID=31511475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990007821U Expired - Fee Related JPH0724808Y2 (ja) 1990-01-30 1990-01-30 自動利得制御回路

Country Status (1)

Country Link
JP (1) JPH0724808Y2 (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4836755U (ja) * 1971-09-07 1973-05-02
JPS6331621U (ja) * 1986-08-15 1988-03-01

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4836755U (ja) * 1971-09-07 1973-05-02
JPS6331621U (ja) * 1986-08-15 1988-03-01

Also Published As

Publication number Publication date
JPH0724808Y2 (ja) 1995-06-05

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