JPH0399450A - Semiconductor test device - Google Patents

Abstract

PURPOSE:To enable the measurement of the characteristics of two or more wafers at the same time with a single LSI tester by a method wherein two or more wafer chucks are provided onto the same stage, and two or more probe cards are provided to a test head corresponding to the wafer chucks. CONSTITUTION:A semiconductor test device is composed of an LSI tester 1, a test head connected to the LSI 1 through a signal cable 2, and a prober main body 5 connected to the an LSI tester 1 through an XY coordinates prober tester I/F cable 4. The prober main body 5 is provided with a prober control 6, a stage 9 movable in both an X and Y direction through a common X axis rail 7 and a common Y axis rail 8, and a positioning camera 11. A separate X axis rail 15 and a separate Y axis rail 16, which enable two or more rotatable wafer chucks 10 and 10' to move in an X direction and a Y direction respectively, and provided onto the stage 9 on the prober main body 9, and probe cards 13 and 13' are provided onto the test head 3 corresponding to the wafer chucks 10 and 10'.

Description

[Detailed Description of the Invention] [Summary] Regarding a semiconductor testing device used for testing the characteristics of semiconductor devices, the purpose of the present invention is to enable simultaneous measurement of multiple wafers with one tester. and a test head that brings a probe needle into contact with a wafer placed on a stage portion of the prober main body;
In a semiconductor testing device comprising the test head and an LSI tester connected by a signal cable, a plurality of wafer chucks are provided on the stage portion, each of which can place a wafer and adjust its position in the X, Y directions, and rotational direction. In addition, the test head is provided with a probe card corresponding to each of the wafer chucks, and one LSI
The tester is configured so that characteristics of multiple wafers can be measured simultaneously.

[Industrial application field]

The present invention relates to a semiconductor testing device used for testing the characteristics of semiconductor devices.

[Conventional technology]

FIG. 3 is a diagram showing a conventional semiconductor testing device.

This consists of an LSI tester 1, a test head 3 connected to the LSI tester 1 with a signal cable 2, and an XY coordinate
The prober main body 5 is connected to a prober tester I/F cable 4, and the prober main body 5 includes a prober control section 6, an x-axis circumferential rail 7, and a Y-axis circumferential rail 8 for movement in the X and Y directions. The test head 3 includes a stage part 9, a wafer chuck 10 provided on the stage part, and a positioning camera 11.
2 has a probe card 13 implanted therein. Then, the probe needles 12 are brought into contact with required electrodes of the semiconductor chip formed on the wafer 14 placed on the wafer chuck 10, and the characteristics of the semiconductor chip are measured by the LSI tester 1.

[Problem to be solved by the invention]

In the conventional semiconductor test equipment described above, when simultaneously measuring a large number of semiconductor chips formed on one wafer,
If the board is an N board, the power supply VDD as shown in Figure 4.
Since they are common, it is not possible to measure the characteristics of chips A and B unless their GNDs are separated by a relay 15. For this reason, when measuring chip A or B, the relay 15 is turned on, resulting in poor characteristics due to the capacitance and resistance of its contacts, causing a decrease in yield.

Therefore, in such a case, there is a problem in that in order to measure characteristics with good quality, it is necessary to use several probers and a multi-station tester.

SUMMARY OF THE INVENTION In view of the above-mentioned conventional problems, it is an object of the present invention to provide a semiconductor testing device that can simultaneously measure a plurality of wafers with one tester.

[Means to solve the problem]

In order to achieve the above object, the semiconductor testing device of the present invention includes a prober body 5, a test head 3 that brings the probe needle 12 into contact with the wafer 14 placed on the stage portion 9 of the prober body 5, and a In a semiconductor testing apparatus consisting of a head 3 and an LSI tester 1 connected by a signal cable 2, a wafer is placed on each of the stage parts 9 and X is applied.

A plurality of wafer chucks 10.10' whose positions can be adjusted in the Y direction and the rotational direction are provided, and the test head 3 is provided with probe cards 13.13' corresponding to each of the wafer chucks 10.10', 1 LS
The I tester 1 is characterized in that the characteristics of a plurality of wafers 14, 14' can be measured simultaneously.

[For production]

Multiple wafer chucks 10.10 on the same stage section 9
A plurality of probe cards 13.13 are provided on the test head 3 corresponding to the wafer chuck 10.10'.
' By providing wafer chuck 1o, xo'U
Since the chucks are separated but on the same stage, each chuck 10.10' can perform the same operation, so 1
The characteristics of a plurality of wafers 14, 14' can be measured simultaneously with the LSI tester 1.

〔Example〕

FIG. 1 is a diagram showing an embodiment of the present invention.

This embodiment consists of an LSI tester 1, a test head 3 connected to the LSI tester 1 with a signal cable 2, and a prober main body 5 connected with an xY coordinate/prober tester I/F cable 4. The prober main body 5 includes a prober control section 6 and a stage section 9 that can move in the X and Y directions using a common X-axis circumferential rail 7 and a common Y-axis circumferential rail 8.
and a positioning camera 11 are similar to the conventional example explained in FIG.
wafer chuck 10.10' and said chuck 10.10
The test head 3 is provided with an individual X-axis circumferential rail 15 and an individual Y-axis circumferential rail 16 that can move the evaporator chuck 10 and 16 in the X and Y directions, respectively.
Probe cards 13 and 13' were provided in response to '.

In this embodiment configured in this way, for example, the LSI tester 1 has a test channel with 128 pins (another 256 pins, 5
12 bins etc.), the test channels can be connected to multiple (two in the figure) probe cards 13.1.
1 to 64 on one probe card 13.
65 to 128 to the other probe card 13'.
By allocating the bins and connecting them to the probe needles 12, the LSI tester 1 can detect pins 1 to 64 = pins 65 to 128, such as pin 1 = 65 bins, pin 2 = 66 bins, etc. It is possible to output the same signal and measure the characteristics of two wafers 14, 14' at the same time.

The blow μ at the time of measurement is as shown in Fig. 2.
．． 14' for that chip #1. The stage section 9 moves in the X-axis and Y-axis so as to measure #2...#N, and the X/Y coordinates at that time are the same as those of the wafers 14 and 14' (because the stage section moves). Note that the positioning of each wafer 14, 14' is performed in advance using the camera 11.
With reference to the reference position of
0' and position it. LSI tester 1 is X
/Y coordinate is received from the xY coordinator 17 of the prober control unit 6, and it is possible to know which chip is currently being measured, and the measurement status of each wafer 14, 14' can be known at the same time as each measurement. can.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to simultaneously measure multiple wafers with the same characteristics as a single measurement using one LSI tester, and it is possible to efficiently perform characteristic tests on semiconductor devices. It becomes possible. Another advantage is that when a plurality of wafers under different process conditions are used as an experimental lot, comparative measurements can be easily made.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a wafer measurement order according to an embodiment of the present invention, FIG. 3 is a diagram showing a conventional semiconductor testing device, and FIG. 4 is a diagram showing a conventional semiconductor testing device. FIG. 2 is a diagram for explaining a problem to be solved. In the figure, 1 is the LSI tester, 2 is the signal cable, 3 is the test head, 4 is the xY coordinate/prober tester I/F cable knob, 5 is the prober body, 6 is the prober control section, 7 is the common X-axis peripheral rail, 8 is the Common Y-axis circumferential rail, 9 is stage section, 10.10' is wafer chuck, 11 is camera, 12 is probe needle, 13 is probe card, 14.14' is wafer, 15 is individual X-axis circumferential rail, 16 is Individual Y-axis circumferential rails; 17 indicates an X/Y coordinator;

Claims (1)

[Claims] 1. A test head (3) that brings a probe needle (12) into contact with a prober body (5) and a wafer (14) placed on a stage portion (9) of the prober body (5). and the LS connected to the test head (3) and the signal cable (2).
In a semiconductor testing device consisting of an I tester (1), a wafer is placed on each of the stage parts (9) and
, a plurality of wafer chucks (10, 10') whose positions can be adjusted in the Y direction and the rotational direction are provided, and the test head (3) is equipped with the wafer chucks (10, 10').
Probe cards (13, 13') corresponding to each
is installed, and one LSI tester (1) can test multiple wafers (
14. A semiconductor testing device characterized by being capable of simultaneously measuring the characteristics of 14 and 14').