JPH0410084B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a sample and hold circuit suitable for a motor rotation control system and the like.

[Prior art] An input signal is sampled sequentially and the sampled signal is held for each sampling period.
So-called sample-and-hold circuits are widely used in automatic control systems and the like.

FIG. 1 is a block diagram showing the basic configuration of a motor rotation speed control system using a sample and hold circuit, in which 1 is the motor, 2 is an amplifier circuit, 3 is a waveform shaping circuit, 4 is a sample and hold circuit, and 5 is a 6 is a motor drive circuit, and 7 is a motor control circuit.

In the figure, a sample and hold circuit 4 constitutes a motor control circuit 7 together with a waveform shaping circuit 3 and an amplifier circuit 5.

Next, the operation of this control system will be explained.

The rotational speed of the motor 1 is detected by an appropriate rotational speed detection means as a signal having a frequency proportional to the rotational speed, and after being amplified by the amplifier circuit 2, the signal is sent to the waveform shaping circuit of the motor control circuit 7. 3 as the rotation speed detection signal a, and after being appropriately shaped, is input to the sample hold circuit 4.

The sample and hold circuit 4 converts the period of the input rotational speed detection signal a into a voltage value and samples and holds this to form a sample and hold signal e that is inversely proportional to the rotational speed of the motor. The signal e is amplified by the output amplification circuit 5 and is applied to the motor drive circuit 6 as a motor control signal g, thereby controlling the motor 1 to rotate at a constant speed.

FIG. 2 is a circuit diagram showing an example of the sample and hold circuit 4 in FIG. 1, in which 8 and 9 are switches, 10 and 11 are constant current sources, 12 is a capacitor,
13 is a transistor, 14 is a resistor, 15 is an amplifier circuit, 16 is a resistor, 17 is a transistor, 18 is a capacitor, and 19 is a constant voltage power supply, and parts corresponding to those in FIG. 1 are given the same reference numerals.

FIG. 3 is a waveform diagram showing signals at various parts in FIG. 2, and signals corresponding to those in FIG. 2 are given the same symbols. Note that in FIGS. 1 and 2, signals corresponding to each other are also given the same reference numerals.

In FIG. 2, a series circuit consisting of a constant current source 10 and a capacitor 12 is connected to a constant voltage power source 19. A transistor 13 is connected in parallel to the capacitor 12 , and its base terminal is connected to the waveform shaping circuit 3 via a resistor 14 . An amplifier circuit 15 is connected to the connection point between the constant current source 10 and the capacitor 12, and its output terminal is connected via a resistor 16 to the base terminal of a transistor 17 and a switch 8 connected to the ground terminal. There is. The collector terminal of the transistor 17 is connected to the constant voltage power supply 19, and the emitter terminal is connected to the series circuit of the switch 9 and the constant current source 11, and the capacitor 1.
8 and are connected to the output amplification circuit 5, respectively.

Next, the operation of this technology will be explained.

In FIGS. 2 and 3, the waveform shaping circuit 3 is
A sampling pulse b that coincides with the rise of the rotational speed detection signal a and a reset pulse c that is slightly delayed from this are output. The reset pulse c is input to the base terminal of the transistor 13, which is turned on at each input to discharge the capacitor 12 charged during each reset pulse period.
The charging voltage of the capacitor 12 is determined by the reset pulse c
It becomes a sawtooth wave signal d that is reset with a period of
Its amplitude is proportional to the period of the reset pulse c, that is, the period of the rotational speed detection signal a.

On the other hand, the sampling pulse b output from the waveform shaping circuit 3 turns off the switch 8 when applying the pulse b, disconnects the base terminal of the transistor 17 from the ground, and at the same time turns on the switch 9. During this time, a sawtooth wave signal d is applied as an input signal f to the base terminal of the transistor 17 via the amplifier circuit 15 and the resistor 16, and the capacitor 18 is charged and discharged according to the emitter output of the transistor 17 which is proportional to the applied voltage. Ru. When the application period of sampling pulse b ends, switches 8 and 9 return to off and on states, respectively, and transistor 17 becomes off, so capacitor 1
The voltage No. 8 is held until the next sampling pulse is applied.

Therefore, the sawtooth wave signal d is sampled sequentially for each input period of the sampling pulse b, is held by the capacitor 18, becomes the sample-and-hold signal e, and is outputted as the motor control signal g via the output amplifier circuit 5. be done.

The motor control signal g obtained in this way is
The amplitude of the sawtooth wave signal d at the time of sampling is proportional to the period of the rotational speed detection signal a, and is inversely proportional to the rotational speed of the motor 1, so this motor control signal g Control can be performed such that the rotation of the motor 1 is constant.

Now, in this type of technology, if we consider a case where the load is large, such as when the motor is started, the rotation speed of the motor 1 is slow, so the period of the rotation speed detection signal a is long, and the period of the sample hold signal e is
The voltage increases almost to its maximum voltage. The voltage at this time is approximately (V ₁ - V _BE ), where the voltage of the constant voltage power supply 19 is V ₁ and the forward voltage between the base and emitter of the transistor 17 is V _BE . 17 emitter terminals.

Therefore, during the period when the switch 8 is in the on state, that is, during the non-sampling period, the base terminal of the transistor 17 is at the ground potential, so there is a maximum voltage (V ₁
A reverse voltage of −V _BE ) will be applied.

Normally, the reverse breakdown voltage of a transistor is specified, so if this is V _BR , then V _BR (V ₁ −
_VBE ). That is, the voltage V ₁ of the constant voltage power supply 19 cannot be made larger than (V _BR +V _BE ).

If you want to increase the voltage V ₁ of the constant voltage power supply 19, you will need to use a transistor with a large V _BR or change the basic configuration of the sample and hold circuit, but in either case, consider the cost and effort involved. And it's not a good idea.

[Purpose of the invention]

An object of the present invention is to eliminate the drawbacks of the above-mentioned technology, to avoid using transistors with particularly high reverse breakdown voltages, and to increase the number of circuit elements as much as possible, even if the power supply voltage is increased. The object of the present invention is to provide a sample and hold circuit that operates without any problems.

[Summary of the invention]

In order to achieve this object, the present invention connects a switching element to the base terminal of the transistor via a resistor, and further connects a reference voltage source via a diode, and The base terminal is grounded via the resistor and the switching element, and a constant forward voltage is applied by the reference voltage source to reduce the reverse voltage between the base and emitter of the transistor, and ,
During the application period of the sampling pulse, when the input signal supplied to the base terminal of the transistor is at a predetermined level or higher, the diode is turned off, so that the reference voltage source does not affect the sampling operation. The points are distinctive.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 4 is a block diagram showing an embodiment of the sample and hold circuit according to the present invention, in which 20 is a reference voltage source, 21 is a diode, 22 and 23 are resistors, and the parts corresponding to those in FIG. 2 are the same. Some explanations will be omitted by adding symbols.

FIG. 5 is a waveform diagram showing signals at various parts in FIG. 4, and signals corresponding to those in FIG. 4 are given the same reference numerals.

In this embodiment, the base terminal of the transistor 17 is connected to the switch 8 via the resistor 23, and the reference voltage source 2 is connected via the resistor 22 and the diode 21.
0, which is different from the technique shown in Figure 2, but the sampling operation is
The technology and principle shown in the diagram remain unchanged.

However, the reference voltage source 20 and the diode 2
1. By adding the resistors 22 and 23, even if the switch 8 is on during the non-sampling period, the input signal f at the base terminal of the transistor 17
As shown in Figure 5, is not the ground potential,
A constant forward voltage is applied to the base terminal of the transistor 17. That is, when the switch 8 is on, current flows from the reference voltage source 20 through the diode 21, the resistors 22 and 23, and the switch 8, so that the base voltage of the transistor 17
V _{B is} expressed as _{V B =} [ _{V 2} −
V _F ]・R ₂ /(R ₁ + R ₂ ). Therefore, during the non-sampling period, the base of transistor 17
The reverse voltage generated between the emitter and the emitter is reduced by the base voltage V _B compared to the conventional example shown in FIG _.
, the voltage of the constant voltage power supply 19 decreases by the amount of the decrease described above.
Can increase V ₁ .

By the way, during the sampling period when the switch 8 is off, the transistor 17 has
As the input signal f, the output voltage of the amplifier circuit 15 via the resistors 16 and 23, that is, the voltage corresponding to the amplitude of the sawtooth wave signal d that changes according to the period of the rotational speed detection signal is applied. However, unless this voltage becomes less than the voltage V ₂ of the reference voltage source 20, the diode 21 becomes reverse biased and remains off, so the reference voltage source 20 does not affect the operation of the sample-and-hold circuit in any way. .

However, when the voltage applied from the amplifier circuit 15 becomes lower than the voltage V ₂ of the reference voltage source 20, the diode 21 is turned on, and the base voltage V _B of the transistor 17 is approximately equal to the voltage V ₂ of the reference voltage source 20. Therefore, the base voltage
The sample-and-hold signal e, which depends on V _B , is also fixed almost constant.

That is, the sample-and-hold circuit 4 in the embodiment shown in FIG. 4 has non-linear input/output characteristics such that its output becomes approximately constant when the signal to be sampled exceeds a predetermined level.

However, in general, in automatic control systems,
Since it is sufficient that the input/output characteristics have linearity within the desired control operating range, the input/output characteristics of the sample and hold circuit used in such automatic control systems are also required in the automatic control system. There is no problem as long as it has linearity within the desired control operation range.

The motor control system usually has the following structure as shown in Fig. 6.
If f ₀ is the predetermined rotational frequency of the motor, then f ₀ ±Δf
The range is defined as the control variable range, and when the motor rotation speed increases beyond this range, the motor control circuit 7
The motor control signal g (FIG. 1) is fixed at the lowest potential, and as it becomes lower, the motor control signal g is fixed at the highest potential. That is, the frequency of the rotational speed detection signal a is
Within the range of f ₀ ±Δf, the voltage of the motor control signal g changes according to the frequency of the rotational speed detection signal a, but
Outside the above range, the voltage of the motor control signal g is fixed, thereby providing highly sensitive and stable motor speed control. For this reason, in the conventional technology shown in FIG.
Although it has an amplitude of V ₁ , the speed control range actually used is (1/2V ₁ ±ΔV). Taking into account the above points, the present invention is designed to fix the base potential of the transistor 7 when the switch 8 is in the on state.

In order for the reference voltage source 20 to have no influence on the motor speed controllable range, the reference voltage source 20 must be set so that (1/2V ₁ −ΔV)≧(V ₂ −V _F −V _BE ) is satisfied. It is only necessary to set a voltage V ₂ , and when the switch 8 is turned on for such voltage V ₂ , the capacitor 18
When the emitter voltage of the transistor 17 due to the maximum voltage is (V ₁ −V _BE ), the base voltage of the transistor 17 due to the reference voltage source 20 is (V ₂ −V _F )·R ₂ /R ₁ +R ₂ ). Therefore, the resistance values R 1 and R ₂ of resistors 22 and ₂₃ are adjusted so that V _BR ≧ (V ₁ − V _BE ) − (V ₂ − V _F ) ・R ₂ /R ₁ + R ₂
By setting
V ₁ can be increased by (V ₂ −V _F )·R ₂ /(R ₁ +R ₂ ), and the same characteristics can be obtained over a wide power supply voltage range without changing the basic configuration.

〔Effect of the invention〕

As explained above, according to the present invention, a reference voltage source, a diode, and a resistor are simply used, without using a transistor with a particularly high reverse breakdown voltage, and without changing the basic configuration of the existing sample-and-hold circuit. By simply adding , it is possible to provide an excellent sample and hold circuit that can operate without problems over a wide range of power supply voltages and eliminates the drawbacks of the conventional technology.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the basic configuration of the motor rotation speed control system, Fig. 2 is a circuit diagram showing an example of the continuation of the sample hold circuit in Fig. 1, and Fig. 3 is a circuit diagram showing the basic configuration of the motor rotation speed control system.
4 is a circuit diagram showing an embodiment of the sample and hold circuit according to the present invention; FIG. 5 is a waveform diagram showing signals of each part in FIG. 4;
FIG. 6 is a characteristic diagram showing the control variable range in the motor rotation speed control system. 8...Switch, 17...Transistor, 18
... Capacitor, 20 ... Reference voltage source, 21 ...
Diode, 22, 23...resistance.

Claims (1)

[Claims] 1. A first switch, a series circuit of a constant current source, and a capacitor are connected in parallel to the emitter of the transistor, and a second switch is connected to the base of the transistor and an input signal is supplied to the transistor. , the input signal is supplied to the capacitor when the transistor is turned on and off in response to the first and second switches being turned on and off depending on the presence or absence of a sampling pulse, and the input signal is supplied to the capacitor. In the sample-and-hold circuit that holds a corresponding voltage in the capacitor, a first resistor is connected between the base of the transistor and the second switch, and a second resistor, a diode, and a reference voltage are connected to the base of the transistor. 1. A sample and hold circuit, characterized in that a series circuit is connected to a source to supply a predetermined forward voltage to the base of the transistor when there is no sampling pulse.