JPH04103154A - Semiconductor device, manufacture thereof, and mounting method thereof - Google Patents

Abstract

PURPOSE:To enable a semiconductor device to be improved in solderability and mounting properties by a method wherein a narrow part is provided to a part of a lead where leads are cut off. CONSTITUTION:A narrow part 8 is provided to the tip of a lead 6, and the narrow parts 8 constitutes a surface treated layer 12. The top end face of the leads 6 vertical to the longitudinal direction of the leads 6 enable the lower face of the surface treated layer 12 to be exposed. Furthermore, the narrow part 8 is provided to a part of a lead frame 4 where the lead 6 is cut off. In succession, the surface treated layer 12 is provided to the lead 6 of the lead frame 4, and the lead 6 is cut off at the narrow part 8. Furthermore, the narrow part 8 is provided to a part of the lead frame 4 where the lead 6 is cut off, the surface treated layer 12 is formed on the lead frame 4. The lead 6 is cut off at the narrow part 8. By this setup, When a semiconductor device 9 provided with leads 6 is mounted on a prescribed board by soldering, the surface treated layer 12 is brought into contact with solder, so that the semiconductor device can be improved in solderability.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a lead frame in which leads are cut after soldering, the purpose of the manufacturing method is to improve soldering performance and mounting performance, and to produce leads with a surface treatment layer formed on the surface. In a semiconductor device having a semiconductor device, a narrow part is provided at the tip of the lead, the narrow part is formed with the surface treatment layer, and the lead end surface perpendicular to the longitudinal direction of the lead is formed with the surface treatment layer. The bottom side should be exposed.

[Industrial application field]

The present invention relates to a method for manufacturing a lead frame, and more particularly to a method for manufacturing a lead frame in which leads are cut after soldering.

In recent years, there has been a trend toward increased number of bins and miniaturization of semiconductor devices, and more advanced mounting technology is required.

For this reason, various types of mounting equipment have been provided, but it is no longer possible to cope with high-density mounting simply by improving the mounting equipment.

Therefore, it is desired to improve the mounting efficiency of semiconductor devices from the viewpoint of lead structure.

An example of a semiconductor device 1 using a lead frame manufactured by the method is shown. In the figure, 2 indicates the semiconductor device body, and 3 indicates a plurality of leads.

Conventionally, to manufacture a lead frame, first a plate-shaped base material is pressed to form a lead frame of a predetermined shape.
After a semiconductor chip is placed on this lead frame, transfer molding is performed and resin sealing is performed. Next, the lead part extending outward from the mold part (in this state,
In addition, the solder-plated lead portion (which is connected to the outer frame) is soldered, and finally the soldered lead portion is cut from the outer frame. Note that in this cutting process, the lead portion is cut using a cutter while being fixed with a fixing jig, so the cut is a vertical cut (indicated by diagonal lines) as shown in the enlarged view of Fig. 8. becomes.

[Conventional technology]

FIG. 7 shows the conventional manufacturing of a lead frame [problem to be solved by the invention] As mentioned above, lead cutting is performed after solder plating, so the lead cut surface is in a state where no solder plating has been performed. becomes. Further, the area of the cut surface is equal to the cross-sectional area of the lead, resulting in a large area. On the other hand, lead frames are generally made of a material with poor solder wettability, such as FeNi. Therefore, in the conventional lead frame manufacturing method, a large area with poor solder wettability remains at the lead tip (lead cutting part), resulting in poor soldering properties and, as a result, the quality of semiconductor devices deteriorates. There was a problem in that the ease of implementation deteriorated.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a semiconductor device, a method for manufacturing the same, and a method for mounting the same, which improve solderability and mounting performance.

[Means to solve the problem]

In order to solve the above problems, in the method of the present invention, in a semiconductor device having a surface treatment layer 12 formed on the surface or having a lead 6, a narrow part 8 is provided at the tip of the lead 6, and the narrow part 8 is provided at the tip of the lead 6. The portion 8 is characterized in that the surface treatment layer 12 is formed thereon, and the lead end face perpendicular to the longitudinal direction of the lead 6 has a structure in which the lower surface of the surface treatment layer 12 is exposed.

Furthermore, a step of forming a narrow width portion 8 at the lead cutting position of the lead frame 4, a step of forming a surface treatment layer 12 on at least the lead portion 6 of the lead frame 4, and a step of cutting the lead at the narrow width portion 8. It is characterized by having the following.

The method further includes a step of forming a narrow width portion 8 at the lead cutting position of the lead frame 4, a step of forming a surface treatment layer 12 on the lead frame 4, and a step of cutting the lead at the narrow width portion 8. , when the semiconductor device 9 having the leads 6 is mounted on a predetermined substrate by soldering, the surface treatment layer 12 and the solder come into contact with each other, thereby improving the soldering performance. be.

[Function] According to each of the inventions having the above configuration, a narrow portion is formed at the lead cutting position, so that the cutting area after cutting the lead becomes smaller than the cross-sectional area of the lead. That is, since the area of the portion with poor solder wettability can be reduced, the soldering properties can be improved, and accordingly, the mounting efficiency of the semiconductor device can also be improved.

〔Example〕

Next, one embodiment of the method of the present invention will be described.

FIG. 1 shows a lead frame 4 manufactured by the method of the present invention.
It shows. The lead frame 4 shown in the figure is, for example, a 0.2 mm thick Fe-Ni plate punched out by press working, and has guide holes 5. A plurality of lead portions 61 are formed with die bonding (not shown) and the like.

Further, each of the plurality of lead portions 6 is formed with a narrow portion 8, which is a feature of the present invention. 20. The narrow portion 8 can be formed by only slightly changing the mold used during the above-mentioned press working. Therefore, forming the narrow portion 8 is easy;
This can be done simultaneously with the formation of other components.

20 The narrow portion 8 is shown enlarged in FIG. As shown in the figure, the narrow portion 8 has a structure in which a semicircular notch is formed from both sides thereof. Further, the formation position of the narrow width portion 8 is selected to be a position where the lead will be cut in a lead cutting process to be performed later.

Semiconductor chips are disposed on the lead frame 4 in a die-bonding manner using a well-known method, and after wire bonding is performed between the inner end of each lead portion and the semiconductor chip, transfer molding is performed using epoxy resin or the like. The semiconductor chip is sealed with resin (the part that has undergone this transfer molding is called the semiconductor device body).

Lead frame 4 after performing the above transfer molding
is shown in Figure 3. As shown in the figure, in the state after transfer molding is performed, each lead portion 6 is rolled outward from the four sides of the semiconductor device body 9, and an outer frame 7 is rolled outward from the four sides of the semiconductor device body 9.
It has a well-positioned configuration. Subsequently, the lead frame 4 is subjected to a solder plating process to form a surface treatment layer 12.
(details in FIG. 5) are formed. This solder plating process is performed, for example, by a solder dip process.

Note that this surface treatment layer 12 may be silver plated instead of solder plating, and the surface treatment layer 12 does not necessarily need to be formed on the entire lead frame 4, but may be formed on at least the lead portion 6. Bye. More specifically, the surface treatment layer 12 may be formed only on the lower surface of the lead end surface perpendicular to the longitudinal direction of the lead portion 6.

Through this treatment, a surface treatment layer 12 made of solder is formed on the surfaces of the lead portion 6 and frame body 7 rolled from the four side surfaces of the semiconductor device body 9. At this time, the solder is applied to the entire circumference of the lead portion 6, so that solder plating is applied to the inside of the semicircular cutout portion of the narrow width portion 8.

When this solder plating process is completed, a lead cutting process is subsequently performed, and the outer frame 7 is separated.

At this time, since the lead cutting position is the same as the formation position of the narrow width part 8 as described above, the lead cutting process is performed at the formation position of the narrow width part 8 (the lead part that has been removed from the outer frame 7 is (simply called lead 6). Incidentally, during this lead cutting process, the connecting portions 10 that maintain the pitch of each adjacent lead 6 are also removed.

Subsequently, this lead 6 is subjected to a bending process to form a semiconductor device.

A portion of the semiconductor device 11 formed as described above is shown in an enlarged scale in FIG. 4, and the vicinity of the tip of the lead 6 is shown in an enlarged scale in FIG.

As shown in each figure, since the lead is cut at the narrow width portion 8, the cut area is smaller than the cross-sectional area of the lead 6, and the surface treatment layer 12 is relatively formed. The area is larger. That is, the area of the solder-plated portion with good solder wettability becomes large, and conversely, the exposed area of the lead 6 material (Fe--Ni) with poor solder wettability becomes narrow. Further, the tip portions of the leads 6 are soldered in order to mount the semiconductor device 11 on a circuit board (not shown). Thereby, the soldering properties between the leads 6 and the circuit board can be improved. At this time, the soldering properties between the leads 6 and the circuit board are particularly affected by the lower surface of the lead 6, and naturally the surface treatment layer 12 is also formed on this lower surface. In addition, with the above configuration, the soldering performance is improved even when the pitch of each lead 6 is small, so the soldering process can be performed reliably, and the mounting performance of the semiconductor device 11 is also improved. can be done.

Note that the shape of the narrow portion is not limited to the shape shown in FIG. 2, but may be, for example, as shown in FIG. 6. A curved portion is formed from both sides of the beam 6 having the shape shown in FIG. 6(A). In addition, the shape shown in FIG. 6B is one in which triangular notches are formed from both sides of the lead 6. Further, in FIG. 8 (C), a circular hole is formed in the lead 6. As described above, any shape that can reduce the cross-sectional area of the lead 6 at the lead cutting position can produce the effects of the present application. Therefore, instead of forming a notch, the narrow portion may be formed by plastically deforming the lead by press working.

〔Effect of the invention〕

As described above, according to the present invention, since a narrow portion is formed at the lead cutting position, the cutting area after cutting the lead is smaller than the cross-sectional area of the lead, and therefore, the area with poor solder wettability is reduced. Since the area can be reduced, the soldering properties can be improved, and the mounting efficiency of the semiconductor device can also be improved accordingly.

[Brief Description of the Drawings] Fig. 1 is a diagram showing a lead frame manufactured by an embodiment of the method of the present invention, Fig. 2 is an enlarged view of the narrow part, and Fig. 3 is a diagram showing the main body of the semiconductor device. FIG. 4 is an enlarged view of a part of the manufactured semiconductor device; FIG. 5 is an enlarged view of the lead tip of FIG. 4; FIG. 7 and 8 are diagrams illustrating an example of a modified example of the narrow width portion. FIGS. 7 and 8 are diagrams for explaining an example of a conventional lead frame manufacturing method. In the figure, 4 is a lead frame, 6 is a lead (lead part), 8 is a narrow width part, 9 is a semiconductor device main body, 11 is a semiconductor device, and 12 is a surface treatment layer. Figure 1 Figure 2

Claims (3)

[Claims] (1) Lead (6) with a surface treatment layer (12) formed on its surface.
), a narrow portion (8) is provided at the tip of the lead (6), the surface treatment layer (12) is formed on the narrow portion (8), and the lead (6) The lead end surface perpendicular to the longitudinal direction of
A semiconductor device characterized in that a lower surface of the surface treatment layer (12) is exposed. (2) forming a narrow width portion (8) at the lead cutting position of the lead frame (4); and forming a surface treatment layer (12) on at least the lead portion (6) of the lead frame (4). , the narrow part (8)
A method for manufacturing a semiconductor device, comprising the step of cutting leads in a step. (3) forming a narrow width portion (8) at the lead cutting position of the lead frame (4); forming a surface treatment layer (12) on the lead frame (4); and forming the narrow width portion (8) on the lead frame (4). ), and when the semiconductor device (9) having the leads (6) is mounted on a predetermined board by soldering, the surface treatment layer (12) and the solder come into contact with each other. A semiconductor device mounting method characterized by improving solderability.