JPH04106981A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent crack of a protective film without loss of reduction in size or high integration by increasing the width of a conductive film opposed to a first semiconductor region larger than that of a region opposed to a second semiconductor region of the conductive film. CONSTITUTION:A conductive film 4 is annularly formed near the edge of a semiconductor substrate 1. The corners H1, H2, H3, H4 of the outer peripheral end of the film 4 protrude outside from the outer peripheral end of a film 2 to be electrically connected to an n<+> type region 9. The film 4 is extended toward the center of the substrate 1 over a boundary 11 of an n-type region 7 exposed on one main surface of the substrate 1 and the region 9, and its inner edge 14 is opposed to the region 7 through the film 2. An interval, i.e., a width L2 between the sides G1-G4 of the outer edge of the film 4 and linear parts C1-C4 of the boundary 11 is smaller than the interval, i.e., a width L1 of the edge 14 of the film 4 and the linear part of the boundary 11.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device having an equipotential ring or field plate.

[Prior Art] There is a semiconductor device in which an equipotential ring is formed on the outer periphery of a pn junction or a Schottky barrier. For example, JP-A-56-11
Japanese Patent No. 2752 discloses a transistor device having an equipotential resistor. The equipotential ring fixes the potential of the insulating film in the vicinity of the second ring, and as a result stabilizes the peripheral breakdown voltage of the pn junction and the Schottky barrier.

[Problem to be Solved by the Invention] By the way, it has been found that when heat stress is frequently applied to two types of semiconductor devices, cracks occur in the protective film covering the upper surface of the equipotential link. It has been confirmed that the second crack can be prevented to some extent by separating the equipotential links from the edges of the semiconductor substrate, and that such a design is practical in terms of miniaturization or high integration of semiconductor substrates. Not on point. A similar problem occurs when a field plate is formed on the outer peripheral side of a semiconductor substrate.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor device having an equipotential ring or field plate that can prevent cracks in the protective film without impairing miniaturization or high integration.

[Means for Solving the Problems] To achieve the above object, the present invention will be described with reference to the reference numerals in the drawings showing the embodiments. , a conductive film 4 constituting an equipotential ring or a field plate, and a protective film 5, and the semiconductor substrate 1 has a first semiconductor region of one conductivity type exposed on one of the two main surfaces. 7, and the first
a second semiconductor region 9 formed in an annular shape on the edge side of the semiconductor substrate 1 so as to adjoin and surround the semiconductor region 7 of the semiconductor substrate 1; The semiconductor substrate 1 is arranged so as to cover the surfaces of the first semiconductor region 7 and the second semiconductor region 9 over the interface 11 between the first semiconductor region 7 and the second semiconductor region 9 exposed on the surface. The outer peripheral edge of the insulating film 2 extends substantially parallel to the side of the one main surface of the semiconductor substrate 1 at a predetermined distance. It has a linear portion and a corner portion formed such that the shortest distance between the corner portion of the one main surface is larger than the distance between the side portion and the linear portions E1 to E4, The conductive film 4 has a first portion disposed on the insulating film 2 and a second portion connected to the second semiconductor region 9, and is formed in an annular shape, The second portion of the conductive film 4 is connected to the second semiconductor region 9 between the corner of the semiconductor substrate 1 and the corner of the insulating film 2, and is The width L1 of the first portion of the conductive film 4 facing the first semiconductor region 7 is equal to the width L1 of the first portion of the conductive film 4 facing the first semiconductor region 7.
The first portion is formed to be larger than the width L2 of the region facing the semiconductor region 9, and the protective film 5 covers the insulating film 2 and the conductive film 4. The present invention relates to a semiconductor device characterized by being formed.

Note that it is desirable that the second portion of the conductive film 4 is formed so as not to extend outside the rectangle formed by the linear portions E1 to E4 of the insulating film 2 and their virtual extensions.

Further, the present invention is suitable for a semiconductor device having a means for forming a rectifying barrier such as a pn junction or a Schottky barrier.

[Function] The corner portions F1 to F4 of the insulating film 2 of the present invention are formed so as to be spaced apart from the corner portions B1 to B4 of the semiconductor substrate 1. Therefore, it becomes possible to easily connect the conductive film 4 to the second semiconductor region 9 outside the corner portions Fl to F4 of the insulating film 2. The conductive film 4 is not connected to the annular second semiconductor region 9 in an annular manner but only at the corners of the semiconductor substrate 1 .

Furthermore, since the width L1 of the region of the conductive film 4 facing the first semiconductor region 7 is larger than the width L2 of the region facing the second semiconductor region 9, even if B2 is reduced, However, it is possible to obtain equipotential links or field plates that function effectively.

Furthermore, by reducing B2, the distance between the conductive film 4 and the edge of the semiconductor substrate 1 becomes larger, which reduces the stress on the protective film 2 based on the conductive film 4 that occurs when thermal stress is applied. , this crack can be prevented.

If the shape of the conductive film 4 is determined as shown in claim 2,
The distance from the edge of the semiconductor substrate 1 to the edge of the conductive film 4 increases over the entire region.

[Embodiment] Hereinafter, a pn junction diode according to an embodiment of the present invention shown in FIGS. 1 to 5 will be described.

As shown in FIG. 2, this pn junction diode consists of a semiconductor substrate 1 made of a silicon semiconductor, an insulating film 2 made of a silicon oxide film formed on one main surface of the semiconductor substrate 1, and an insulating film 2 made of a silicon oxide film formed on one main surface of the semiconductor substrate 1. An anode electrode 3 made of aluminum formed on the main surface, a conductive film 4 made of polysilicon (polycrystalline silicon) formed on one main surface of the semiconductor substrate 1, and a semiconductor substrate 1 so as to cover these. a protective film 5 formed on one main surface of the semiconductor substrate 1; and a cathode electrode 6 made of nickel formed on the other main surface of the semiconductor substrate 1.
and has.

The semiconductor substrate 1 has an n shadow region (first semiconductor region) 7 exposed on its upper surface or one main surface of the semiconductor substrate 1, and an n shadow region (first semiconductor region) 7 exposed on its upper surface or one main surface of the semiconductor substrate 1. an n-shape region 8 adjacent to and surrounded by the shadow region 7;
a first n-shaped region (second semiconductor region) 9 adjacent to the outer circumferential side of the semiconductor substrate 1; The second n
It has a ten-shaped area 10.

As is clear from FIG. 4 showing one main surface of the semiconductor substrate 1, the semiconductor substrate 1 has a substantially square planar shape, and the first n-domain region 9 is located at the edge of the semiconductor substrate 1. It is formed in a ring shape along the

An n-shaped region 8 arranged at the center of the semiconductor body 1 is adjacent to and surrounded by an n-shaded region 7. The n-shaded region 7 includes an n-shaped region 8 and a first n-shaped region 9 on one main surface of the semiconductor substrate 1.
It is exposed in an annular shape between and adjacent to the lower surface of these. One main surface of the semiconductor substrate 1 has four sides Al, A2, A3, A4 and 4 as shown in FIG.
It has three corner portions Bl, B2, B3, and B4. On one main surface of the semiconductor substrate 1, the interface 11 between the n-shaded region 7 and the first n-shape region 9 is not formed in a square shape to match the edge of the semiconductor substrate 1, but has rounded corners. The four straight portions C1, C2, C3, and C have a straight shape and extend parallel to the four sides A1 to A4 of the semiconductor substrate 1.
4 and the four arcuate portions D1, D2, D3,
It has D4. Note that the arcuate portions D1 to D4 are located inside a quadrangle surrounded by the four linear portions 01 to C4 and their extensions.

The n-type region 8, the first and second n-type regions 9.10 are formed by performing normal impurity diffusion in the n-shaded region 7 of the starting base material, and the first and second n-type regions 9.10 are Shape area 9.1
The impurity concentration of 0 is higher than the impurity concentration of n shadow region 7.

As is particularly clear from FIG. 5, the insulating film 2 is formed in an annular shape so as to cover the entirety of the n-shaded region 7 exposed on one main surface of the semiconductor substrate 1, and its outer peripheral edge is formed on the semiconductor substrate 1.
It is located on the upper surface of the first n-domain region 9 across the interface 11 between the n-shade region 7 exposed on one main surface of the semiconductor substrate 1 and the first n-domain region 9, and its inner peripheral edge is located on the upper surface of the first n-domain region 9. It is located on the upper surface of the p-shaped region 8 across the interface 12 between the p-shaped region 8 and the n-shaded region 7 exposed on one main surface, that is, the p-n junction. Further, the insulating film 2 is used as a diffusion mask for forming the n-domain region 9, and the outer peripheral edge of the insulating film 2 is in the n-shape when viewed from one main surface side of the semiconductor substrate 1. It is formed along the interface 11 between the region 7 and the first n-domain region 9 . As a result, the outer peripheral edge of the insulating film 2 is located at the side A1 of the edge of the semiconductor substrate 1.
~ Straight line parts EL, E2, H3, H4 parallel to A4,
It has arcuate corner portions Fl, F2, H3, and H4 between these. Note that the arcuate corner portion Fl-F at the outer peripheral end of the insulating film 2
4 is bent along the arcuate portions D1 to D4 of the interface 11. On one main surface of the semiconductor substrate 1, the p-shaped region 8 is exposed in the opening 13 formed inside the insulating film 2,
A first n-type region 9 is exposed outside the insulating film 2.

Note that the insulating film 2 is formed by normal thermal oxidation.

A conductive film 4, which is indicated by diagonal lines in FIG. 1 for explanatory purposes, is formed in an annular shape near the edge of the semiconductor substrate 1. The outer peripheral edge of the conductive film 4 is parallel to the sides A1 to A4 of the semiconductor substrate 1.
It has four sides G1, G2, G3, and G4, and is a quadrilateral. Therefore, the distance between the outer peripheral edge of the conductive film 4 and the edge of the semiconductor substrate 1 is substantially uniform over the entire circumference of the conductive film 4. Most of the side portions G1 to G4 of the conductive film 4 are located slightly inside the linear portions E1 to E4 at the outer peripheral edge of the insulating film 2. The outer peripheral end of the insulating film 2 or the arcuate corner portion Fl
-F4, whereas the outer peripheral end of the conductive film 4 does not have an arc-shaped portion, the corner H1 of the outer peripheral end of the conductive film 4,
H2, H3, and H4 protrude outward from the outer peripheral edge of the insulating film 2 and are electrically connected to the first n+-shaped region 9. Further, the conductive film 4 extends toward the center of the semiconductor substrate 1 beyond the interface 11 between the n-shaded region 7 exposed on one main surface of the semiconductor substrate 1 and the first n-domain region 9. This inner edge 14 faces the n-shaded area 7 via the insulation 11!2. As is clear from FIGS. 1 and 3, the distance between the side portions G1-G4 of the outer edge of the conductive film 4 and the linear portions 01-C4 of the interface 11, ie, the width L2, is sexual membrane 4
is smaller than the distance between the inner edge 14 and the linear portions 01 to C4 of the interface 11, that is, the width Ll.

The conductive film 4 forms an equipotential ring that is spaced apart from and surrounds the interface between the p-shaped region 8 and the n-shaded region 7, that is, the p-n junction 12, when viewed in plan, and has a field plate effect of the anode electrode 3, which will be described later. This helps improve the peripheral breakdown voltage of the pn junction. The conductive film 4 is made of polysilicon, and is doped with phosphorus to sufficiently increase its conductivity.
It makes a low resistance connection with the 10-shaped region 9, has a sufficiently high effect of fixing the potential of the insulating film 2 in the vicinity, and functions well as an equipotential ring.

The anode electrode 3, which is illustrated with diagonal lines in FIG. 1 for explanatory purposes, is electrically connected to the p-shaped region 8 through the opening 13 shown in FIG. It functions as a field plate facing the n shadow area. Note that the anode electrode 3 and the conductive film 4 are electrically separated from each other. Further, the cathode electrode 6 is formed on substantially the entire lower surface side of the semiconductor substrate l.

The protective film 5 shown in FIGS. 2 and 3 is made of a silicon oxide film doped with phosphorus, and covers the outer peripheral side of the anode electrode 3, the insulating film 2, the conductive film 4, and the first n-doped region. Coat the surface of 9. The outer peripheral edge of the protective film 5 is located slightly inside the edge of the semiconductor substrate 1, and the outer peripheral part of the first n+-shaped region 9 is narrowly exposed outside the protective film 5.

According to the above pn junction diode, the following effects can be obtained.

(1) Since the configuration is such that only the corners H1 to H4 of the conductive film 4 are connected to the first n-domain region 9, the width of the conductive film 4 is reduced, and the area of the conductive film 4 is reduced. I can do it.

Therefore, the influence of thermal expansion of the conductive film 4 on the protective film 5 is alleviated, cracking of the protective film 5 is prevented, and a highly reliable semiconductor device can be provided.

(2) The area of the conductive film 4 can be reduced without reducing the width of the conductive film 4 extending toward the n-shaded region 7 side.

Therefore, the conductive film 4 functions well as an equipotential link despite having a small area.

(3) Conductive film 4 or anode electrode 3 or cathode electrode 6
Since it is made of polysilicon whose linear expansion coefficient is closer to that of the protective film 5 and the semiconductor substrate 1 than the metal film forming the conductive film 4, the protective film The influence of thermal expansion of the conductive film 4 on the conductive film 5 can be more effectively alleviated.

(4) Since the anode electrode 3 disposed at the center of the semiconductor substrate 1, where cracks in the protective film 5 are less likely to occur, is made of aluminum, good ohmic contact can be made between the anode electrode 3 and the p-shaped region 9. Of course, this does not cause any cracks in the protective film 5.

(5) Linear portions E1 to E4 of the four outer peripheral edges of the insulating film 2 facing the four side portions Al-A4 of the edge of the semiconductor substrate 1 when viewed in plan from the conductive H4 and their extension lines and the side portions G1 to G4 of the outer peripheral edge of the conductive film 4 are located near the interface 11 between the n-shaded region 7 and the first n-decade region 9. , the semiconductor substrate 1 is becoming smaller.

[Other Embodiments] FIGS. 8 and 9 show a portion of a triac having a field plate according to another embodiment of the present invention, corresponding to FIGS. 2 and 3. The semiconductor substrate 20 of this triac includes an n-shade region 21, a p-shade region 22, and a p-shade region 2.
3, an n-shaded area 24, and an n-shaded area 25, and has a rectangular planar shape. A gate electrode 26 made of AI is connected to the n shadow region 24, a main electrode 27 is connected to the n shadow region 25 and the p shadow region 22, and a gate electrode 26 made of AI is connected to the p shadow region 22.
A field plate 29 consisting of I is connected, and a field plate 28 is also connected to the p shadow area 23.

Since it has a planar structure, a p-shade region 22 is arranged on the surface of the base body 21 so as to annularly surround the n-shade region 21 . A pn junction between the n-shaded region 21 and the p-shaded region 22 on the surface of the base body 21 is covered with a silicon oxide film 30, and a field plate 29 is provided on this. Note that the field plate 29 is connected to the p shadow region 22 at the four corners of the rectangular surface of the base body 21 as shown in FIG. As shown in the figure, it is not connected to the p shadow area 22. This field plate 2] is covered with a phosphorus-doped silicon oxide film 31. To explain the correspondence between the triacs in FIGS. 8 and 9 and the claims and diodes in FIGS. 1 to 5,
The n shadow region 21 corresponds to the first semiconductor region or the n shadow region 7, the p shadow region 22 corresponds to the second semiconductor region or the n+ decagonal region 9, the silicon oxide film 30 corresponds to the insulation M2, and the silicon oxide film 30 corresponds to the insulation M2. The silicon oxide film 31 corresponds to the protective film 5.

[Modifications] The present invention is not limited to the above-described embodiments, and, for example, the following modifications are possible.

(1) Arc-shaped corner portions F1 to F4 at the outer peripheral end of the insulating film 2 in the portion facing the corner portion Bl-B4 of the edge of the semiconductor substrate 1
By making the insulating film 2 linear, the outer peripheral edge of the insulating film 2 can be made into a polygonal shape such as an octagon or a hexagon as a whole. In short, the corners of the insulating film 2 may be cut into the shape shown below.

(2) The present invention can be applied to a Schottky barrier diode as shown in FIGS. 6 and 7. In FIGS. 6 and 7 showing parts corresponding to FIGS. 2 and 3, parts common to those in FIGS. 2 and 3 are given the same reference numerals, and their explanations will be omitted. In FIGS. 6 and 7, a p+ type area 8a having a guard ring configuration is provided in place of the p 10 type area 8 in FIGS. 2 and 3, and a Schottky barrier electrode 3 is provided in an n shadow area 7 surrounded by this. is connected.

Since the other parts are the same as those in FIGS. 2 and 3, the same effects can be obtained. Note that the present invention can of course be applied to bipolar transistors, insulated cat FETs, silices, and the like.

(3) The outer peripheral edge of the conductive film 4 in the portion facing the corner of the edge of the semiconductor substrate 1 is an extension of the outer peripheral edge of the insulating film 2 in the portion facing the side portion of the edge of the semiconductor substrate 1 or It may be located closer to the edge of the semiconductor substrate 1 than that. However, in order to effectively alleviate the influence of thermal stress on the protective film 5, it is recommended that the outer peripheral edge of the conductive film 4 be located closer to the center of the semiconductor substrate 1 than on the above-mentioned extension as in the embodiment. good. In this case, a curved portion or a taper may be formed at the outer peripheral end of the conductive film 4 facing the corner of the edge of the semiconductor substrate 1.

(4) The conductive film 4 may be connected only to the 0 corner of the n+ 10-shaped region corresponding to one or more selected corners Bl-B4 of the semiconductor substrate 1.

[Effects of the Invention] As described above, according to the present invention, it is possible to improve the reliability of a semiconductor device that has an equipotential ring or field plate and whose upper surface is covered with a protective film.

[Brief explanation of drawings]

FIG. 1 is a plan view showing a pn junction diode according to an embodiment of the present invention before a protective film is formed, and FIG.
3 is a sectional view taken along the line m-m in FIG. FIG. 6 is a cross-sectional view showing a modified Schottky barrier diode corresponding to FIG. 2; FIG. 7 is a plan view showing the Schottky barrier diode of FIG. 8 is a sectional view showing a part of a triac according to another embodiment of the present invention in a portion corresponding to FIG. 2, and FIG. 9 is a sectional view showing the triac of FIG. FIG. DESCRIPTION OF SYMBOLS 1... Semiconductor base, 2... Insulating film, 3... Anode electrode, 4... Conductive film, 5... Protective film, 6... Cathode electrode, 7... N shadow region, 8...p-decade region,
9...First n-decade region.

Claims (1)

[Scope of Claims] [1] A semiconductor substrate (1) having a substantially rectangular planar shape, an insulating film (2), a conductive film (4) constituting an equipotential ring or field plate, and a protective film ( 5), wherein the semiconductor substrate (1) has a first surface exposed on one main surface of the semiconductor substrate (1).
and a semiconductor region (7) on the edge side of the semiconductor substrate (1) so as to be exposed on the one main surface and adjacently surround the first semiconductor region (7) on the one main surface. a second semiconductor region (9) formed in an annular shape, and the insulating film (2) connects the first semiconductor region (7) exposed on one main surface of the semiconductor substrate (1); of the semiconductor substrate (1) so as to span the interface (11) of the second semiconductor region (9) and cover the surfaces of the first semiconductor region (7) and the second semiconductor region (9). is formed on the one main surface, and the outer peripheral edge of the insulating film (2) is substantially parallel to the side of the one main surface of the semiconductor substrate (1) with a predetermined distance. An extending linear portion and a corner portion formed such that the shortest distance between the corner portion of the one main surface is larger than the distance between the side portion and the linear portion (E1 to E4). The conductive film (4) has a first portion disposed on the insulating film (2) and the second semiconductor region (
9), and the second portion of the conductive film (4) is connected to the corner of the semiconductor substrate (1) and the insulating film. connected to the second semiconductor region (9) between the corner portion of the film (2), and the first portion of the first portion of the conductive film (4) when viewed in plan Width (L) of the region facing the semiconductor region (7)
1) is the second portion of the first portion of the conductive film (4).
The first portion is formed to be larger than the width (L2) of the region facing the semiconductor region (9), and the protective film (5) is formed between the insulating film (2) and the conductive film. sexual membrane (
4) A semiconductor device characterized in that it is formed so as to cover. [2] The second portion of the conductive film (4) does not extend outside the rectangle formed by the linear portions (E1 to E4) of the insulating film (2) and their extensions. 2. The semiconductor device according to claim 1, wherein the semiconductor device is formed as follows. [3] Further, an electrode (3) is provided inside the conductive film (4).
3. The semiconductor device according to claim 1, further comprising a rectifying barrier forming means having: ).