JPH04114401A - Chip type variable electronic part - Google Patents

Chip type variable electronic part

Info

Publication number
JPH04114401A
JPH04114401A JP2235158A JP23515890A JPH04114401A JP H04114401 A JPH04114401 A JP H04114401A JP 2235158 A JP2235158 A JP 2235158A JP 23515890 A JP23515890 A JP 23515890A JP H04114401 A JPH04114401 A JP H04114401A
Authority
JP
Japan
Prior art keywords
insulating substrate
side edge
electrodes
chip
ceramic material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2235158A
Other languages
Japanese (ja)
Other versions
JP2788107B2 (en
Inventor
Tamotsu Yoshimura
吉村 保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2235158A priority Critical patent/JP2788107B2/en
Publication of JPH04114401A publication Critical patent/JPH04114401A/en
Application granted granted Critical
Publication of JP2788107B2 publication Critical patent/JP2788107B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE:To prevent occurrence of defective mounting of an electronic part caused by the bridge-like expansion of solder without lowering mounting density by a method wherein a variable rotor is provided on the upper surface of a chip-like insulated substrate in a freely rotatable manner, a notched part is provided on the corner parts on both ends of the side edge of the insulated substrate, and two electrodes are formed thereon. CONSTITUTION:A through hole 11 is perforated almost at the center part of chip-shaped insulated substrate 10, a resistance film 12 is formed on the upper surface of the substrate 10 concentrically with the through hole 11, and both ends 12a of the film 12 are extended toward one side edge 10a of the insulated substrate 10. A hollow shaft 14, on which a terminal plate 15 is integrally connected to the lower end, is inserted into the through hole 11, a rotor 13 is fixed to the upper end in a freely rotatable manner. An almost circular notched part 10c is formed on the corner parts of both ends of one side edge 10a of the insulated substrate 10, and an electrode 16, which is in continuity to both ends 12a and 12a of the resistance film 12, is formed on the above-mentioned notched parts. The resistor, the side face electrode films 16c and the terminal plate 15 on the other side edge 10b are attached to the circuit of each printed substrate by soldering.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、抵抗値を可変にしたチップ型可変抵抗器のよ
うに、チップ状の絶縁基板の上面に可変用ロータを回転
自在に設ける一方、前記絶縁基板の一側縁に、2つの電
極を形成して成るチップ型可変電子部品の改良に関する
ものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to a chip-type variable resistor with variable resistance, in which a variable rotor is rotatably provided on the top surface of a chip-shaped insulating substrate. This invention relates to an improvement in a chip-type variable electronic component in which two electrodes are formed on one side edge of the insulating substrate.

〔従来の技術〕[Conventional technology]

一般に、チップ型可変抵抗器は、例えば特開平2−13
7201号公報に記載され、且つ、第10図及び第11
図に示すように、略中心箇所に貫通孔2を穿設したセラ
ミック製のチップ状絶縁基板1の上面に、前記貫通孔2
と同心状に抵抗膜3を形成し、該抵抗膜3の一端と他端
とを、各々絶縁基板1の一側縁1aに突設した電極用突
起4に向けて延出し、該抵抗膜3の両端を、前記電極用
突起4に形成した電極5に各々電気的に導通する一方、
絶縁基板1の上面に、前記貫通孔2に挿入した中空軸6
を介して金属板製のロータ7を回転自在に設け、該ロー
タフに造形した摺動部7aを前記抵抗膜3に接当し、更
に、前記中空軸6を介して摺動子7aに導通した中心電
極8を、絶縁基板1の他側面に露出した構成になってい
る。
In general, chip type variable resistors are, for example,
7201, and also shown in FIGS. 10 and 11.
As shown in the figure, a through hole 2 is formed on the upper surface of a ceramic chip-shaped insulating substrate 1 having a through hole 2 formed approximately at the center.
A resistive film 3 is formed concentrically with the resistive film 3, and one end and the other end of the resistive film 3 are respectively extended toward electrode protrusions 4 protruding from one side edge 1a of the insulating substrate 1. both ends of which are electrically connected to the electrodes 5 formed on the electrode protrusion 4,
A hollow shaft 6 inserted into the through hole 2 is disposed on the upper surface of the insulating substrate 1.
A rotor 7 made of a metal plate was provided rotatably through the rotor, and the rotor-shaped sliding portion 7a was brought into contact with the resistive film 3, and the rotor 7 was electrically connected to the slider 7a through the hollow shaft 6. The center electrode 8 is exposed on the other side of the insulating substrate 1.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところが、従来のように絶縁基板1の一側縁1aに突設
した両電極用突起4に各々電極5を形成した構成である
と、この両電極5が、絶縁基板1の一側縁1aから大き
く突出した形態になることに加えて、この種のチップ抵
抗器における絶縁基板1の一辺の寸法は極く小さいこと
より、両電極5間の間隔寸法も極く小さいものとなるた
め、絶縁基板1における一側縁1aの両電極5をプリン
ト基板等の回路に半田付けすることにより、抵抗器をプ
リント基板等に装着するに際して、両電極5に対する半
田9がブリッジ状に繋がってしまって、プリント基板等
への抵抗器の装着不良が多発すると言う問題があった。
However, in the conventional configuration in which the electrodes 5 are formed on both electrode protrusions 4 protruding from one side edge 1a of the insulating substrate 1, the two electrodes 5 do not extend from the one side edge 1a of the insulating substrate 1. In addition to having a large protruding shape, the size of one side of the insulating substrate 1 in this type of chip resistor is extremely small, so the distance between both electrodes 5 is also extremely small. By soldering both electrodes 5 on one side edge 1a of 1 to a circuit such as a printed circuit board, when the resistor is mounted on a printed circuit board etc., the solder 9 for both electrodes 5 is connected in a bridge shape, and the printed circuit board is connected. There was a problem in that the resistors were often incorrectly attached to the board or the like.

この問題に対しては、絶縁基板lにおける一側縁1aの
長さ寸法を長くして、両電極5間の間隔寸法りを大きく
すれば良いと考えられるが、かくすると、抵抗器が大型
化するため、プリント基板等の実装密度が低下すること
になり、得策でない。
To solve this problem, it may be possible to increase the length of one side edge 1a of the insulating substrate l and increase the distance between the two electrodes 5, but this would increase the size of the resistor. Therefore, the mounting density of printed circuit boards and the like will be reduced, which is not a good idea.

本発明は、このように絶縁基板の一側縁に2つの電極を
形成したチップ型可変電子部品において、2つの電極に
対する半田かブリッジ状に繋がってしまうことを、電子
部品を大型化することなく防止できるようにすることを
目的とするものである。
The present invention solves the problem of a chip-type variable electronic component in which two electrodes are formed on one side edge of an insulating substrate, without increasing the size of the electronic component. The purpose is to make it possible to prevent this.

〔課題を解決するための手段〕[Means to solve the problem]

この目的を達成するため本発明は、チップ状の絶縁基板
の上面に可変用ロータを回転自在に設ける一方、前記絶
縁基板の一側縁に、2つの電極を形成して成るチップ型
可変電子部品において、前記絶縁基板の一側縁における
両端の隅角部に各々切り欠き部を設けて、この両切り欠
き部に前記両電極を形成する構成にした。
To achieve this object, the present invention provides a chip-type variable electronic component in which a variable rotor is rotatably provided on the upper surface of a chip-shaped insulating substrate, and two electrodes are formed on one side edge of the insulating substrate. In this method, notches are provided at the corners of both ends of one side edge of the insulating substrate, and both electrodes are formed in the notches.

〔発明の作用・効果〕[Action/effect of the invention]

このように、両電極を切り欠き部に形成したことにより
、両電極は、絶縁基板の一側縁から突出しないか、或い
は、絶縁基板の一側縁からの突出量が小さい状態になり
、しかも、切り欠き部が絶縁基板の一側縁における両端
の箇所に形成されていることにより、絶縁基板の一側縁
の長さ寸法を太き(することなく、両電極の間の間隔寸
法を拡大することができるから、電子部品を、絶縁基板
の一側縁における両電極をプリント基板等の回路に半田
付けすることにより、プリント基板等に装着するに際し
て、両電極に対する半田がブリッジ状に繋がってしまう
ことを、絶縁基板の大型化を招来することなく、確実に
防止できることになる。
By forming both electrodes in the notch in this way, both electrodes do not protrude from one side edge of the insulating substrate, or the amount of protrusion from one side edge of the insulating substrate is small. By forming the notch at both ends of one side edge of the insulating substrate, it is possible to increase the length of one side edge of the insulating substrate (without making it thicker) and increase the distance between both electrodes. Therefore, by soldering both electrodes on one side edge of an insulating substrate to a circuit such as a printed circuit board, when an electronic component is mounted on a printed circuit board, etc., the solder for both electrodes is connected in a bridge shape. This can be reliably prevented from being stored away without increasing the size of the insulating substrate.

従って本発明によれば、プリント基板等にチップ型可変
電子部品を装着するに際して、絶縁基板の一側縁におけ
る2つの電極に対する半田がブリッジ状に繋がることに
起因して電子部品の装着不良が発生することを、プリン
ト基板等の実装密度を低下させることなく、確実に防止
できる効果を有する。
Therefore, according to the present invention, when mounting a chip-type variable electronic component on a printed circuit board, etc., a mounting failure of the electronic component occurs due to the solder for two electrodes on one side edge of the insulating substrate being connected in a bridge shape. This has the effect of reliably preventing this from occurring without reducing the mounting density of the printed circuit board or the like.

〔実施例〕〔Example〕

次に、本発明の実施例を、前記と同様のチップ型可変抵
抗器に適用した場合の図面(第1〜5図)に基づいて説
明すると、図において符号10は、セラミックにて平面
視略矩形に形成したチップ状の絶縁基板を示し、該絶縁
基板lOの略中心箇所に貫通孔11を穿設して、絶縁基
板lOの上面に、前記貫通孔11と同心円状に抵抗膜1
2を形成し、該抵抗膜12の両端12aを、絶縁基板1
0の一側縁10aに向けて延長する。
Next, an embodiment of the present invention will be described based on drawings (Figs. 1 to 5) in which the present invention is applied to a chip type variable resistor similar to the above. A chip-shaped insulating substrate formed in a rectangular shape is shown, a through hole 11 is bored approximately at the center of the insulating substrate 10, and a resistive film 1 is formed on the upper surface of the insulating substrate 10 concentrically with the through hole 11.
2, and both ends 12a of the resistive film 12 are connected to the insulating substrate 1.
0 toward one side edge 10a.

前記絶縁基板10の上面に、金属板にて上向き開口の略
椀形に形成して成るロータ13を配設する一方、前記絶
縁基板lOの貫通孔11に、下端に端子板15を一体的
に連接した中空軸14を挿入し、該中空軸14の上端に
前記ロータ13を被嵌したのち、中空軸14の上端をか
しめることにより、ロータ13を絶縁基板lOに対して
回転自在に取り付けする。
A rotor 13 made of a metal plate and formed into a substantially bowl shape with an upward opening is disposed on the upper surface of the insulating substrate 10, while a terminal plate 15 is integrally provided at the lower end of the through hole 11 of the insulating substrate IO. After inserting the connected hollow shaft 14 and fitting the rotor 13 onto the upper end of the hollow shaft 14, the rotor 13 is rotatably attached to the insulating substrate IO by caulking the upper end of the hollow shaft 14. .

前記ロータ13には、前記抵抗膜12に接当する摺動部
13aと、当該ロータ13を回転操作するドライバエ具
に対する上向き開口の係合溝13bとが、各々ロータ1
3を構成する金属板の切り起こしにて形成されており、
他方、前記端子板】5は、絶縁基板IOにおける他側縁
10bの側面に露出させている。
The rotor 13 has a sliding portion 13a that comes into contact with the resistive film 12, and an upwardly opening engagement groove 13b for a driver tool that rotates the rotor 13.
It is formed by cutting and bending the metal plate that makes up 3.
On the other hand, the terminal plate 5 is exposed on the side surface of the other side edge 10b of the insulating substrate IO.

そして、前記絶縁基板IOの外周部のうち前記−側縁1
0aの両端に位置した2つの隅角部に、各々平面視にお
いて略円弧状の切り欠き部10cを形成して、これら両
切り欠き部10cの箇所に、前記抵抗膜12の一端1.
2 aと他端12aとに導通する電極16を形成するの
である。
Then, the negative side edge 1 of the outer peripheral portion of the insulating substrate IO
Notches 10c each having a substantially arc shape in a plan view are formed at two corner portions located at both ends of the resistive film 12, and one end 1.
2a and the other end 12a are formed.

すなわち、前記両電極16は、前記絶縁基板工0の上面
のうち前記両切り欠き部10cの箇所に)13成した1
−市電極膜16aと、絶縁基板1. (]の千゛而の・
)も両切り欠き部10cの箇所に形成[、た下面電極膜
1.6 bと、前記両切り欠き部1(]Cの側面に前記
J−而面極膜16;コと下面電極膜16bとを導通ずる
ように形成(、た側面電極膜1(icとで構成さt’l
ている3、 以Hの構成において、この抵抗器は、絶縁基板10の一
側縁における両電極16の側面電極膜16cと、他側縁
1011:lにおける端子板15とを、各々プリント基
板の回路にf BE付けすることにより、プリント基板
に装着(実装)される。
That is, both the electrodes 16 are formed at the positions of the notches 10c on the upper surface of the insulating substrate 0.
- City electrode film 16a and insulating substrate 1. () of thousands of
) is also formed at the location of both notches 10c, and the J-metal electrode film 16b is formed on the side surface of both notches 1()C. The side electrode film 1 (IC) is formed so as to be electrically conductive.
3. In the configuration of H below, this resistor connects the side electrode films 16c of both electrodes 16 on one side edge of the insulating substrate 10 and the terminal plate 15 on the other side edge 1011:1 of the printed circuit board. By attaching fBE to the circuit, it is mounted (mounted) on a printed circuit board.

この場合、抵抗膜12に対する両電極16を、絶縁基板
10にお+′jる・側縁10aの両端に設けた切り欠き
部10cに形成しまたことにより、両電極16は、絶縁
基板10の一側縁10aから突出しないか、或いは2絶
縁基板1.0の一側縁10aからの突出寸法が小さい状
態になり、しかも、両切り欠き部1()cが絶縁基板1
0における一側縁10aの両端に形成されていることに
より、絶縁基板10の一側縁10aの長さ寸法が従来と
同じてあっても、両電極I6間の間隔=1−法Sを人き
くすることかできるから、両電極16をプリント基板等
の回路に半ロコイス」けするに際して、当該両電極16
に対する半田17かブリッジ状に繋がることを、絶縁基
板10を大型化することなく、確実に防■1、できるの
である。
In this case, both electrodes 16 for the resistive film 12 are formed in notches 10c provided at both ends of the side edges 10a of the insulating substrate 10, so that both electrodes 16 are connected to the insulating substrate 10. Either the two insulating substrates 1.0 do not protrude from the one side edge 10a, or the two insulating substrates 1.0 protrude from the one side edge 10a to a small extent, and both notches 1()c do not protrude from the one side edge 10a.
0, even if the length dimension of the one side edge 10a of the insulating substrate 10 is the same as the conventional one, the distance between both electrodes I6 = 1-modulus S can be reduced Therefore, when attaching both electrodes 16 to a circuit such as a printed circuit board, the electrodes 16 can be
It is possible to reliably prevent the solder 17 from forming a bridge-like connection without increasing the size of the insulating substrate 10.

なお、前記抵抗膜12及び両電極16を備えた絶縁基板
10は、セラミック素材板Aから、第6〜11図に示す
ような工程を経て製造することかできる。
The insulating substrate 10 provided with the resistive film 12 and both electrodes 16 can be manufactured from the ceramic material plate A through the steps shown in FIGS. 6 to 11.

すなわち、前記セラミック素材板Aは、多数個(実施例
では10個)の絶縁基板10を切り欠き部10cが外向
きになるように1列に並べて成る1列セラミック素材板
A1の複数枚(実施例では3枚・)を、これら複数枚の
各ゴー列セラミック素材板A、の各絶縁基板10におけ
る一側縁10aの箇所において一体的に連結された形態
に構成されており、該セラミック素材板Aの両端部には
、位置決め用のノツチA2.A、を備えた耳片A4゜A
、が一体的に連接され、且つ、前記各絶縁基板10の相
斤間、及び各絶縁基板IOと両耳片7〜4A、との間に
は、ブレーク用の横筋目線B1及び縦筋「]線B、か設
けられている。
That is, the ceramic material plate A is made up of a plurality of single-row ceramic material plates A1 (in the example, 10 insulating substrates 10) arranged in a row with the cutout portions 10c facing outward. In the example, three ceramic material plates A) are integrally connected at one side edge 10a of each insulating substrate 10 of the plurality of ceramic material plates A. At both ends of A, there are positioning notches A2. Ear piece A4゜A with A.
, are integrally connected, and there is a horizontal line line B1 and a vertical line for breaking between the two sides of each insulating substrate 10 and between each insulating substrate IO and both ear pieces 7 to 4A. Line B is provided.

ぞこで、先ず、第7図に示すように、−枚のセラミック
素材板Aにおける各絶縁基板10の」−面のうち両切り
欠き部1f)cの箇所に、導電性ベースI・をスクリー
ン印刷にて塗着することにより、各絶縁基板10におけ
る両電極16の上面電極膜1、、6 aを形成したのち
、−枚のセラミック素材板Aにおける各絶縁基板10の
下面のうち両切り欠き部1. Oeの箇所に、導電性ペ
ーストをスクリーン印刷にて塗着することにより、各絶
縁基板10における両電極16の下面電極膜16bを形
成し。
First, as shown in FIG. 7, conductive bases I. After forming the upper surface electrode films 1, 6a of both electrodes 16 on each insulating substrate 10 by coating with .. The lower surface electrode film 16b of both electrodes 16 on each insulating substrate 10 is formed by applying a conductive paste to the location Oe by screen printing.

(先に下面電極膜16bを形成しても良い)、次いで、
第8図に示すように、−枚のセラミック素材板Aにおけ
る各絶縁基板10の上面に、抵抗膜用ペーストをスクリ
ーン印刷にて塗着することにより、各絶縁基板10に抵
抗膜I2を形成する。
(The lower surface electrode film 16b may be formed first), then,
As shown in FIG. 8, a resistance film I2 is formed on each insulating substrate 10 by applying a resistive film paste to the upper surface of each insulating substrate 10 in the - number of ceramic material plates A by screen printing. .

次いで、この−枚のセラミック素材板Aを、第9図に示
すように、三枚の各1列セラミック素材板A1ごとに、
横筋[J線B1に沿ってブレークする1、 そして、第1O図及び第11図に示すように、各1列セ
ラミック素材板A1における各絶縁基板11〕の切り欠
き部10eに嵌まるよう外周面を断面円弧状に形成して
成る多数枚(実施例では11枚)の円盤19を、当該各
円盤19の下端が導電性ペースト槽20に浸漬した状態
で一定方向に回転するように設け、これら各円盤19の
外周部に向けて、前記各1列セラミック素材板AIを、
クランプ21付きの往復動機構にて往復動じ、各絶縁基
板10における切り欠き部1Oeを各円盤19の外周部
に被嵌したのち後退させて、円盤19の外周面に付着し
た導電性ペースト21を各切り欠き部10eの側面に塗
着することにより、各絶縁基板10における電極16の
側面電極16cを形成する。
Next, as shown in FIG. 9, these - ceramic material plates A are divided into three ceramic material plates A1 in each row, as shown in FIG.
The outer circumferential surface is fitted into the notch 10e of the horizontal stripe [1 that breaks along the J line B1, and each insulating substrate 11 in each row of ceramic material plates A1, as shown in FIGS. 1O and 11]. A large number of disks 19 (11 disks in the embodiment) each having an arcuate cross section are provided so as to rotate in a fixed direction with the lower end of each disk 19 immersed in the conductive paste tank 20. Each row of ceramic material plates AI is placed toward the outer periphery of each disk 19,
A reciprocating mechanism equipped with a clamp 21 moves back and forth to fit the notch 1Oe in each insulating substrate 10 onto the outer periphery of each disc 19, and then retreats to remove the conductive paste 21 attached to the outer periphery of the disc 19. The side electrodes 16c of the electrodes 16 on each insulating substrate 10 are formed by coating the side surfaces of each notch 10e.

この場合、1列セラミック素材板AIを構成する一方の
列の各絶縁基板10と他方の列の各絶縁基板10とにお
ける両切り欠き部10cの側面に側面電極膜16cを形
成するには、例えば、往復動機構を挟んだ両側に円盤1
9群を配設して、1列セラミック素材板A1を一方の円
盤19群に移動させることにより、一方の列の各絶縁基
板10における切り欠き部1. Ocの側面に側面電極
膜16cを形成し、次いで、1列セラミック素材板Aを
他方の円盤19群に向けて移動させることにより、他方
の列の各絶縁基板10における切り欠き部10cの側面
に側面電極膜16cを形成するか、或いは、往復動機構
の一方の側のみに円盤19群を設けて、1列セラミック
素材板A1における一方の列の各絶縁基板10の切り欠
き部10cに側面電極膜16cを形成してから、1列セ
ラミック素材板A、をその軸線回りに180°回転し、
これを円盤19群に向けて移動させることにより、他方
の列の絶縁基板10の切り欠き部10cに側面電極膜1
6cを形成するかすれば良い。
In this case, in order to form side electrode films 16c on the side surfaces of both notches 10c of each insulating substrate 10 in one row and each insulating substrate 10 in the other row constituting one row of ceramic material plates AI, for example, Discs 1 on both sides of the reciprocating mechanism
By arranging 9 groups and moving one row of ceramic material plates A1 to one group of disks 19, the notches 1 in each insulating substrate 10 of one row are formed. By forming a side electrode film 16c on the side surface of the Oc, and then moving one row of ceramic material plates A toward the other group of disks 19, a side electrode film 16c is formed on the side surface of the notch 10c in each insulating substrate 10 of the other row. A side electrode film 16c is formed, or a group of disks 19 is provided on only one side of the reciprocating mechanism, and a side electrode is formed in the cutout portion 10c of each insulating substrate 10 in one row of the one row ceramic material plate A1. After forming the film 16c, one row of ceramic material plates A is rotated 180° around its axis,
By moving this toward the group of disks 19, the side electrode film 1 is placed in the notch 10c of the insulating substrate 10 in the other row.
All you have to do is form 6c.

このようにして各絶縁基板10に電極I6と抵抗膜12
とを形成したら、各1列セラミック素材板A1を、横筋
目線B1に沿って1列にブレークしたのち、各−列のセ
ラミック素材板を縦筋目線B2に沿ってブレークして、
絶縁基板1oの単体に分離する。
In this way, the electrode I6 and the resistive film 12 are attached to each insulating substrate 10.
After forming, each row of ceramic material plates A1 is broken into one row along the horizontal line of sight B1, and then each row of ceramic material plates is broken along the vertical line of sight B2.
The insulating substrate 1o is separated into individual pieces.

なお、−枚のセラミック素材板Aの状態で、上面電極膜
16aと下面電極膜16b及び抵抗膜12を形成してか
ら、−枚のセラミック素材板Aを一列のセラミック素材
板にブレークし、この−列のセラミック素材板ごとに側
面電極膜16cを形成するようにしても良い。
In addition, after forming the upper surface electrode film 16a, the lower surface electrode film 16b, and the resistance film 12 on the - ceramic material plates A, the - ceramic material plates A are broken into a row of ceramic material plates. - The side electrode film 16c may be formed for each row of ceramic material plates.

この製造工程において、従来の絶縁基板のように一側縁
から電極用突起4を突設した形態であると、相隣接した
1列セラミック素材板A、は、絶縁基板1における電極
用突起4の箇所において互いに連結されているに過ぎな
いため、相隣接した1列セラミック素材板A1の連結強
度が弱く、セラミック素材板Aを大型化することが困難
になるが、本願発明のように、側面電極膜16cを各絶
縁基板10における隅角部の切り欠き部10cに形成す
ると、相隣接した1列セラミック素材板Aが、各絶縁基
板]0における一側縁10aの箇所で長い範囲で連結さ
れることにより、1列セラミック素材板A1の相互の連
結強度を向上できるから、セラミック素材板Aを大型化
、換言すると、−回の工程で製造できる絶縁基板10の
個数を増大して、絶縁基板10の製造能率を向上するこ
とができる。
In this manufacturing process, if the electrode protrusion 4 is provided protruding from one side edge as in the conventional insulating substrate, the adjacent rows of ceramic material plates A will be removed from the electrode protrusion 4 on the insulating substrate 1. Since they are only connected to each other at certain points, the connection strength between the adjacent rows of ceramic material plates A1 is weak, making it difficult to increase the size of the ceramic material plates A1. When the film 16c is formed in the corner notch 10c of each insulating substrate 10, the adjacent rows of ceramic material plates A are connected over a long range at one side edge 10a of each insulating substrate 10. As a result, the mutual connection strength of the ceramic material plates A1 in one row can be improved, so the size of the ceramic material plates A can be increased, in other words, the number of insulating substrates 10 that can be manufactured in - times of steps can be increased, and the number of insulating substrates 10 can be increased. manufacturing efficiency can be improved.

上記の実施例は、絶縁基板における切り欠き部を平面視
で略円弧状に形成した場合であったが、本発明における
切り欠き部は、平面視で直線状に形成するとか、或いは
平面視でL字状に形成するなど、他の形態であっても良
いことは言うまでもない。
In the above embodiment, the notch in the insulating substrate was formed in a substantially arc shape in plan view, but the notch in the present invention may be formed in a straight line in plan view, or may be formed in a straight line in plan view. It goes without saying that other shapes such as an L-shape may also be used.

また、本発明は、チップ型可変抵抗器のみならず、チッ
プ型可変コンデンサのように、絶縁基板の一側縁に2つ
の電極を形成した他のチップ型可変式電子部品にも適用
できることは言うまでもない。
It goes without saying that the present invention can be applied not only to chip-type variable resistors but also to other chip-type variable electronic components such as chip-type variable capacitors in which two electrodes are formed on one side edge of an insulating substrate. stomach.

【図面の簡単な説明】[Brief explanation of drawings]

第1〜5図は本発明の実施例を示し、第1図はチップ型
可変抵抗器の平面図、第2図は第1図の左側面図、第3
図は第1図の底面図、第4図は第1図のIV−IV視断
面図、第5図は第1図の■−V視一部断面図、第6図、
第7図、第8図、第9図。 第1O図及び第11図は絶縁基板の製造工程を示す図、
第12図は従来技術を示す平面図、第13図は第12図
のxm−xm視断面図である。 10・・・・絶縁基板、loa・・・・−側縁、10c
・・・・切り欠き部、11・・・・貫通孔、12・・・
・抵抗膜、13・・・・ロータ、13a・・・・摺動部
、14・・・・中空軸、15・・・・端子板、I6・・
・・電極、I6a・・・・上面電極膜、16b・・・・
下面電極膜、L6C・・・・側面電極膜、17半田、工
8・・・・導電性ペースト槽、19・・・・転移用円盤
、A・・・・セラミック素材板。 特許出願人     ローム株式会社 代理 代理 人    弁理士  6井 焼失 人    弁理士  東野 正
1 to 5 show embodiments of the present invention, FIG. 1 is a plan view of a chip type variable resistor, FIG. 2 is a left side view of FIG. 1, and FIG.
The figure is a bottom view of Fig. 1, Fig. 4 is a sectional view taken along IV-IV of Fig. 1, Fig. 5 is a partial sectional view taken along ■-V of Fig. 1, Fig. 6,
Figures 7, 8, and 9. FIG. 1O and FIG. 11 are diagrams showing the manufacturing process of the insulating substrate,
FIG. 12 is a plan view showing the prior art, and FIG. 13 is a sectional view taken along line xm-xm in FIG. 10...Insulating substrate, loa...-side edge, 10c
...Notch, 11...Through hole, 12...
・Resistance film, 13...Rotor, 13a...Sliding part, 14...Hollow shaft, 15...Terminal board, I6...
...Electrode, I6a...Top electrode film, 16b...
Bottom electrode film, L6C...side electrode film, 17 solder, work 8... conductive paste tank, 19... transfer disk, A... ceramic material plate. Patent Applicant: ROHM Co., Ltd. Agent Patent Attorney: 6 I Burned Patent Attorney: Tadashi Higashino

Claims (1)

【特許請求の範囲】[Claims] (1).チップ状の絶縁基板の上面に可変用ロータを回
転自在に設ける一方、前記絶縁基板の一側縁に、2つの
電極を形成して成るチップ型可変電子部品において、前
記絶縁基板の一側縁における両端の隅角部に各々切り欠
き部を設けて、この両切り欠き部に前記両電極を形成し
たことを特徴とするチップ型可変電子部品。
(1). In a chip-type variable electronic component, a variable rotor is rotatably provided on the upper surface of a chip-shaped insulating substrate, and two electrodes are formed on one side edge of the insulating substrate. 1. A chip-type variable electronic component, characterized in that notches are provided at the corners of both ends, and the electrodes are formed in both the notches.
JP2235158A 1990-09-04 1990-09-04 Manufacturing method of chip type variable resistor Expired - Fee Related JP2788107B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2235158A JP2788107B2 (en) 1990-09-04 1990-09-04 Manufacturing method of chip type variable resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2235158A JP2788107B2 (en) 1990-09-04 1990-09-04 Manufacturing method of chip type variable resistor

Publications (2)

Publication Number Publication Date
JPH04114401A true JPH04114401A (en) 1992-04-15
JP2788107B2 JP2788107B2 (en) 1998-08-20

Family

ID=16981912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2235158A Expired - Fee Related JP2788107B2 (en) 1990-09-04 1990-09-04 Manufacturing method of chip type variable resistor

Country Status (1)

Country Link
JP (1) JP2788107B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0732905U (en) * 1993-11-29 1995-06-16 京セラ株式会社 Semi-fixed resistor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0176002U (en) * 1987-11-11 1989-05-23
JPH01112004U (en) * 1988-11-22 1989-07-27

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0176002U (en) * 1987-11-11 1989-05-23
JPH01112004U (en) * 1988-11-22 1989-07-27

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0732905U (en) * 1993-11-29 1995-06-16 京セラ株式会社 Semi-fixed resistor

Also Published As

Publication number Publication date
JP2788107B2 (en) 1998-08-20

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