JPH0412557Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a keyboard information processing device for an electronic musical instrument that detects the on/off state of a keyboard switch of the electronic musical instrument and assigns or deletes a channel to a key switch signal.

Conventionally, keyboard circuits of electronic musical instruments have been improved by digital technology in recent years, and the key switch is scanned in a time-division manner to extract the on-off state of the key switch as a time-division key signal of "1" and "0". A method of allocating channels has been proposed. Furthermore, a method has been proposed in which the key switches are divided into several blocks and each block is time-divisionally scanned to detect the key switches in the on state and to allocate channels.

However, all of these conventional methods require a key switch scanning circuit, and among the conventional methods, the latter method of dividing the key switch into blocks has been improved to shorten the scanning time; The logic circuit becomes complicated and adjustment is quite troublesome. Furthermore, if you try to detect information such as automatic performance, it becomes extremely complicated. Furthermore, when it is desired to expand the number of keys or channels, or to change various functions, the configuration of the keyboard information processing device inevitably becomes larger, more complex, and more expensive to accommodate the expansion or change. .

The present invention is intended to improve the above-mentioned drawbacks, and its purpose is to provide a keyboard information processing device for an electronic musical instrument that has a simple configuration without using a key switch scanning circuit and has a high degree of freedom in expansion and modification. .

In order to achieve the above object, the keyboard information processing device of the present invention includes a plurality of key blocks each consisting of a plurality of key switches, key switch means from which key information indicating the current state of the key switch is read out for each key block, and a plurality of channels. channel register means for storing assigned key information; a CPU for detecting the state of the key switch of the key switch means and performing assignment to the channel register means; storage means for storing a processing program for the CPU; temporary storage means for temporarily storing key information as old key information, and in the processing program of the storage means, the
The CPU compares the key information for each key block read from the key switch means with the old key information of the corresponding key block temporarily stored in the temporary storage means, and if the comparison results match, the next key information in the key switch means is reads the key information of the key block, and if they do not match, detects a changed key in the key block, and assigns or erases the key information to the channel register means in accordance with the changed key. , the key information of the next key block is read out after the key information is stored at the address of the old key information stored in the temporary storage means.

The present invention will be described in detail below with reference to examples.

FIG. 1 is a schematic explanatory diagram showing the configuration of an embodiment of the present invention.

In the figure, a key switch circuit 1 includes a plurality of key blocks each consisting of a plurality of key switches.
The key on/off information for each keyblock is collectively addressed by the addressing circuit 2, and the keyblock information is sent to the common bus 7 via the gate circuit 3 in synchronization with the addressing signal. These key block information are sent to the random access memory (RAM) of the storage circuit 5 via the common bus 7.
Further, the program stored in the fixed memory (ROM) area is read out and the information processing unit (CPU) 4 is operated through the common bus. That is, the CPU 4 takes in new block information from the key switch circuit 1 via the common bus 7, compares it with the old key block information written in the RAM area of the memory circuit 5, and determines the key signal whose key state has changed. Channel assignment or deletion is performed as necessary.
Then, new key data is written into the channel register 6 corresponding to each channel. In the above case, in addition to the gate circuit 3, the memory circuit 5 and the channel register 6 are each assigned an address and designated by the addressing circuit 2.

FIG. 2 is a detailed explanatory diagram of the key switch circuit 1 and gate circuit 3 of FIG. 1.

The number of key switches in an electronic musical instrument is as few as several dozen, and as many as several hundred, and these are divided into m blocks of n keys each. At this time, n is CPU4
Determined by the number of bits. In this example, n=12
As a result, one octave corresponds to one block, and the block code and octave code are partially matched to facilitate the conversion from block code to octave code, which will be described later. However, it is not necessary to set n to 12. . Note that in this example
As the CPU 4, a 12-bit microcomputer such as TLCS-12A manufactured by Toshiba Corporation was used.

As shown in FIG. 2, the key switches 11 are divided into 12 blocks, and an address is assigned to each block. In the figure, for example, addresses 4080, 4081, and 4082 are assigned. A "1" level signal is applied from the addressing circuit 2 to the address specified by the key switch information read command, for example address 4080, via line _l1 , and this signal is applied to the common bar 11-1 of the key switch 11. At this time, the key switch 11 of the block is turned on and the line _l2 is connected to the common line _l3 via the diode 12, and the common line _l3 is connected to the bus bar _l4 via the 3-state gate circuit 14. The 3-state gate circuit 14 outputs the OR circuit 13 when any one of the blocks is designated for reading.
Opened by addressing signals via.

That is, each bit at each address <4080>, <4081>, and <4082> corresponds to the key switch 11, and is read out to the CPU 4 by a read command. In this example, 3 octaves 36
Although the key is shown in the diagram, there are many more blocks,
Needless to say, this can be applied to the number of keys.

Figure 3 shows the information processing unit (CPU) of the embodiment of this invention.
4 is a flowchart showing the operation of step 4. This will be explained below with reference to FIG.

In FIG. 1, the key information of each block is sequentially read out by specifying the address corresponding to each block and is given to the CPU ₄ via the bus bar l4. This CPU 4 compares the key information (hereinafter referred to as old key information) corresponding to the same block in the memory circuit 5 with the key information from the gate circuit 3 (hereinafter referred to as new key information), and if they match, The next block address (+1) is read. The above procedure is shown in the program loops . . . in FIG. 3. If they do not match, move on to the next program. That is, an exclusive OR (EX-OR) is calculated for each bit of the new key information and the old key information, and bits in which the key information has changed are detected (). Then, the octave code and note code to which the changed key belongs are calculated from the changed bit and the address code of the block and are temporarily stored (). Next, by checking the above change bits in the new key information,
An on-off bit is detected that identifies a key switch change ().

Then, the new key information is transferred to the address in the RAM area where the old key information was stored (). This on/off bit key code (octave code, note code) is written to a vacant address when the key is on by the channel assignment program, and when the key is off, the code of the channel having the corresponding key code is erased ().

Note that this channel assignment program is the same as that of Japanese Patent Application No. 13684/1984 ``Channel Allocation Circuit for Electronic Musical Instruments''. When the channel allocation program is finished, reading of the next program starts again.

As explained above, the new key information from the key switch circuit is compared with the old key information corresponding to the same block stored in the storage device, and a channel is assigned or deleted for the key signal whose key state has changed. For example, by using a microcomputer as the information processing section, the configuration can be simplified and miniaturized. Moreover, a low-cost keyboard processing device can be obtained. Furthermore, even if the number of keys or channels is expanded, it is very easy to modify the information processing unit, and since addresses are assigned to key switches, it is also possible to selectively read out only a specific switch using a program. It is also possible to change. This means that in automatic performance, for example, only the part that determines the arpeggio of an accompaniment chord can be read out with priority, and the same thing can be applied to other effects as well.

[Brief explanation of the drawing]

Fig. 1 is a schematic explanatory diagram showing the configuration of an embodiment of the present invention, Fig. 2 is a detailed explanatory diagram of the main part of the embodiment of Fig. 1, and Fig. 3 is an operation of the main part of the embodiment of Fig. 1. In the figure, 1 is a key switch circuit, 2 is an addressing circuit, 3 is a gate circuit, 4 is an information processing section, 5 is a storage circuit, and 6 is a channel register.

Claims (1)

[Claims for Utility Model Registration] Key switch means that includes a plurality of key blocks each consisting of a plurality of key switches, from which key information indicating the current state of the key switch is read out for each key block, and a channel that stores assigned key information of a plurality of channels. register means; a CPU for detecting the key switch state of the key switch means and assigning it to the channel register means; a storage means for storing a processing program for the CPU; and storing key information of the key switch means as old key information. and a temporary storage means for temporarily storing the
The CPU compares the key information for each key block read from the key switch means with the old key information of the corresponding key block temporarily stored in the temporary storage means, and if the comparison results match, the next key information in the key switch means is reads the key information of the key block, and if they do not match, detects a changed key in the key block, and assigns or erases the key information to the channel register means in accordance with the changed key. A keyboard information processing device for an electronic musical instrument, characterized in that, after the key information is stored in the address of the old key information stored in the temporary storage means, a process of reading out the key information of the next key block is performed.