JPH04125929A - Insulating film forming method of semiconductor device and semiconductor device - Google Patents
Insulating film forming method of semiconductor device and semiconductor deviceInfo
- Publication number
- JPH04125929A JPH04125929A JP2246501A JP24650190A JPH04125929A JP H04125929 A JPH04125929 A JP H04125929A JP 2246501 A JP2246501 A JP 2246501A JP 24650190 A JP24650190 A JP 24650190A JP H04125929 A JPH04125929 A JP H04125929A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- insulating film
- resin
- interlayer insulating
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Silicon Polymers (AREA)
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Polymers With Sulfur, Phosphorus Or Metals In The Main Chain (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
半導体集積回路の多層配線を構成する層間絶縁膜に関し
、
耐熱性が優れ、誘電率が少なく、耐クラツク性能の優れ
た層間絶縁膜を実用化することを目的とし、
層間絶縁膜として次の一般式(1)、 (2)および(
3)で表される構造単位をもち、平均分子量が5×10
2〜3X10’の有機硅硼素樹脂を用いることを特徴と
して半導体装置の絶縁膜形成方法を構成する。[Detailed Description of the Invention] [Summary] The purpose of the present invention is to commercialize an interlayer insulating film that has excellent heat resistance, low dielectric constant, and excellent crack resistance regarding interlayer insulating films that constitute multilayer wiring of semiconductor integrated circuits. The following general formulas (1), (2) and (
3) has a structural unit represented by
A method for forming an insulating film of a semiconductor device is characterized by using a 2 to 3×10′ organic borosilicate resin.
(RSi03zz) −(BO3/□> l、−−−−
−−−−−−一・・・−・−(1)(R3i(h/z)
m (PO5/□)。 −・(2)(RS
i037□) −(BO3/□) fi(PO5/2)
o………−−(3)ニーで、Rは炭素数が1〜6のアル
キル基。(RSi03zz) −(BO3/□> l, -----
---------1...--(1) (R3i(h/z)
m (PO5/□). -・(2)(RS
i037□) -(BO3/□) fi(PO5/2)
o......-(3) Ni, and R is an alkyl group having 1 to 6 carbon atoms.
またはフルオロアルキル基、
manは60〜99 : 40〜1
m:oは60〜99 : 40〜1
m:n:oは60〜99 : 20〜0.5:20〜0
.5
〔産業上の利用分野〕
本発明は半導体集積回路の多層配線を構成する層間絶縁
膜とこれを用いた半導体装置に関する。or fluoroalkyl group, man is 60-99: 40-1 m:o is 60-99: 40-1 m:n:o is 60-99: 20-0.5: 20-0
.. 5 [Industrial Application Field] The present invention relates to an interlayer insulating film constituting multilayer wiring of a semiconductor integrated circuit and a semiconductor device using the same.
本発明に係る層間絶縁膜はLSIやVLSIなど集積度
の高い半導体装置を形成する際に多層化に伴う段差の平
坦性が優れるのは勿論、誘電率が少なく、耐熱性、耐酸
素プラズマ性、耐クラツク性も優れている。The interlayer insulating film according to the present invention not only has excellent flatness of steps caused by multilayering when forming highly integrated semiconductor devices such as LSI and VLSI, but also has low dielectric constant, heat resistance, oxygen plasma resistance, It also has excellent crack resistance.
そのため、この絶縁膜の使用により信頬性の高い半導体
装置を実現することができる。Therefore, by using this insulating film, a semiconductor device with high reliability can be realized.
半導体装置は集積度が向上してLSIやVLSIが実用
化されているが、これは単位素子の小形化により実現さ
れており、そのため配線の最小線幅がサブミクロン(S
ub−micron)のパターンが用いられている。The degree of integration of semiconductor devices has improved and LSI and VLSI have been put into practical use, but this has been achieved by miniaturizing unit elements, and as a result, the minimum line width of wiring has become submicron (S).
ub-micron) pattern is used.
一方、配線の微細化による電気容量の減少を防ぐために
配線パターンの厚さは6000人〜1μmと高(する必
要があり、そのため段差は益々大きくなる(頃向にある
。On the other hand, in order to prevent a decrease in capacitance due to miniaturization of wiring, the thickness of the wiring pattern needs to be as high as 6,000 to 1 μm, and as a result, the difference in level becomes larger and larger.
このため、多層配線を形成する上で、優れた平坦性が得
られる層間絶縁膜が必要になっている。For this reason, there is a need for an interlayer insulating film that can provide excellent flatness when forming multilayer wiring.
また、情報処理の高速化により信号の周波数はGHzに
まで及んでいるが、このように高速な信号を処理する半
導体装置の絶縁膜は、信号の伝播遅延時間(τ)を低減
するため、関係式(4)から明らかなように誘電率の小
さな材料を用いて形成する必要がある。In addition, as information processing speeds up, signal frequencies have reached GHz, and the insulating films of semiconductor devices that process such high-speed signals are required to reduce the signal propagation delay time (τ). As is clear from equation (4), it is necessary to use a material with a small dielectric constant.
τ=ε112/c−−−−−−−・−−−−−・・−・
(4)こ\で、
εは絶縁膜の誘電率、
Cは光の速度、
従来、層間絶縁膜の材料としては無機絶縁材料や有機高
分子材料が使用されてきた。τ=ε112/c−−−−−−−・−−−−−・・−・
(4) Here, ε is the dielectric constant of the insulating film, and C is the speed of light. Conventionally, inorganic insulating materials and organic polymer materials have been used as materials for interlayer insulating films.
すなわち、二酸化硅素(SiOz) +窒化硅素(St
Ja”) 、燐珪酸ガラス(略称PSG)などの無機材
料は気相成長法(略称CVD法)などを用いて形成され
ているが、CVD法による場合は絶縁膜が薄く、下地と
相似形に形成されるために、基板面の凹凸がそのま一再
現され、この上に形成される配線の断線や絶縁不良の原
因となる。That is, silicon dioxide (SiOz) + silicon nitride (St
Inorganic materials such as phosphorus silicate glass (PSG) are formed using a vapor phase growth method (abbreviated as CVD method), but when using the CVD method, the insulating film is thin and has a similar shape to the underlying layer. Because of this, the unevenness on the substrate surface is reproduced exactly as it is, causing disconnection and poor insulation of the wiring formed thereon.
また、無機材料は一般に誘電率が大きいと云う問題があ
る。Another problem is that inorganic materials generally have a large dielectric constant.
また、ポリイミド、シリコーン樹脂などの有機高分子材
料はスピンコード法などにより形成されており、基板面
の平坦化には有効であるが、塗布後に加熱硬化させる際
に400℃程度の温度でポリイミド系の樹脂は酸化や熱
分解を生じ、また、膜の歪みによりクランクが生じると
云う問題がある。In addition, organic polymer materials such as polyimide and silicone resin are formed by a spin-coding method, which is effective for flattening the substrate surface, but polyimide There is a problem in that the resin in the film undergoes oxidation and thermal decomposition, and cranks occur due to distortion of the film.
また、シリコーン樹脂は硬化反応による膜の内部歪みと
熱衝撃とによって5000Å以下の薄膜でもクラックが
生じると云う問題がある。Furthermore, silicone resins have the problem that cracks occur even in thin films of 5000 Å or less due to internal distortion of the film due to the curing reaction and thermal shock.
発明者等はこれらの問題を解決する方法として(5)式
または(6)式で表される構造単位をもち、平均分子量
が5×102〜lXl0’の有機硅硼素樹脂または有機
燐硅硼素樹脂を使用することを提案している。In order to solve these problems, the inventors have developed an organic silica borosilicate resin or an organic phosphorus borosilicate resin that has a structural unit represented by the formula (5) or (6) and has an average molecular weight of 5 x 102 to 1X10'. is proposed to use.
(SiO4z□) −(BO3/□)lI−−−−−・
−・−・・−−−−−・(5)(SiOa/z) p
(BO3/り q(PO5/2) r−−−−−−(6
)こ\で、
m:nは99:1〜40 : 60
p :q :r =70〜30 : 15〜40
: 15〜40これらの樹脂の特徴は、
■ 耐熱性が優れていること、
■ 酸素プラズマ耐性に優れていること、■ 耐クラツ
ク性が優れていること、
である。(SiO4z□) −(BO3/□)lI−−−−・
−・−・・−−−−−・(5) (SiOa/z) p
(BO3/ri q(PO5/2) r------(6
) where m:n is 99:1~40:60 p:q:r=70~30:15~40
: 15-40 The characteristics of these resins are: (1) excellent heat resistance; (2) excellent oxygen plasma resistance; (2) excellent crack resistance.
すなわち、これらの樹脂をスピンコードして後熱処理し
て得られる絶縁層は比較的軟らかいガラス質の材料であ
り、また有機成分を含まないために0□雰囲気中で熱処
理しても酸化による歪みが発生しないと云う特徴がある
。In other words, the insulating layer obtained by spin-coding and post-heat-treating these resins is a relatively soft glassy material, and since it does not contain organic components, there is no distortion due to oxidation even when heat-treated in a 0□ atmosphere. There is a characteristic that it does not occur.
また、従来の無機材料と較べ、比較的低温で溶融するた
め、硬化する際に発生する内部歪みを軽減することがで
きる。Furthermore, since it melts at a relatively low temperature compared to conventional inorganic materials, it is possible to reduce internal distortion that occurs during curing.
従って、これらの樹脂を層間絶縁膜として使用すると3
μ−程度の厚さまでクラックの発生がなく使用すること
ができる。Therefore, if these resins are used as an interlayer insulation film, 3
It can be used up to a thickness of approximately μ-thickness without cracking.
然し、半導体装置に伝播する信号の高速化に対応し、信
号の伝播遅延時間を低減するためには層間絶縁膜形成材
料の誘電率を更に低下することが必要であり、またに吸
湿による誘電率の変動を抑制することが必要であった。However, in order to cope with the increase in the speed of signals propagating to semiconductor devices and to reduce the signal propagation delay time, it is necessary to further lower the dielectric constant of the interlayer insulating film forming material. It was necessary to suppress fluctuations in
先に記したように、発明者等は耐熱性と02プラズマ耐
性に優れると共に耐クランク性にも優れた材料として上
記(5)式または(6)式で表される構造単位をもち、
平均分子量が5×102〜lXl0’の有機硅硼素樹脂
または有機燐硅硼素樹脂を使用することを提案している
。As mentioned above, the inventors have a structural unit represented by the above formula (5) or (6) as a material that has excellent heat resistance and 02 plasma resistance as well as excellent crank resistance.
It is proposed to use an organosilicon or organophosphorus borosilicon resin having an average molecular weight of 5 x 102 to 1X10'.
これらの樹脂は誘電率が4〜5であり、SiO□やSi
3N4などの無機材料に較べれば小さいもの\、高速信
号の増幅やスイッチングに使用する半導体装置としては
更に誘電率が少なく、かつ耐クラツク性の優れた材料を
用いて層間絶縁膜を形成することが望ましく、この実用
化が要望されていた。These resins have a dielectric constant of 4 to 5, and are similar to SiO□ and Si.
Although it is small compared to inorganic materials such as 3N4, for semiconductor devices used for high-speed signal amplification and switching, it is possible to form an interlayer insulating film using a material with an even lower dielectric constant and excellent crack resistance. This is desirable, and its practical application has been desired.
上記の課題は層間絶縁膜として次の一般式(1)。 The above problem is solved by the following general formula (1) as an interlayer insulating film.
(2)および(3)で表される構造単位をもち、平均分
子量が5X102〜3X10’の有機硅硼素樹脂、有機
燐硅素樹脂あるいは有機燐硅硼素樹脂を用いることを特
徴として半導体装置の絶縁膜を形成することにより解決
することができる。An insulating film for a semiconductor device characterized by using an organic silica borosilicate resin, an organic phosphorus silica resin, or an organic phosphorus borosilicate resin having the structural units represented by (2) and (3) and having an average molecular weight of 5X102 to 3X10'. This can be solved by forming .
(R5i(hzz) −(BOszz) 、1−−−−
−−−−−−−−−−− (1)(RSiO+z□)
−(PO5/□)。 −・・−−−一一一凹一曲−(2
)(R5i03zz) −(BO+zz) 11(PO
s/z) o −−−−−−−(3)ニーで、Rは炭素
数が1〜6のアルキル基。(R5i(hzz) -(BOszz) , 1----
−−−−−−−−−−− (1) (RSiO+z□)
-(PO5/□). −・・−−−111 concave one song−(2
)(R5i03zz) -(BO+zz) 11(PO
s/z) o ----------(3) where R is an alkyl group having 1 to 6 carbon atoms.
またはフルオロアルキル基、
m:nは60〜99:40〜1
mhoは60〜99 : 40〜1
m : n : oは60〜99 : 20〜0.5:
20〜0.5
C作用〕
本発明は誘電率値が少ない層間絶縁膜形成材料を実用化
する方法として発明者等が先に提案している有機硅硼素
樹脂、有機燐硅素樹脂あるいは有機燐硅硼素樹脂におい
て構造単位である5i04y□をR31(hz□ (但
し、Rは炭素数が1〜6のアルキル基、またはフルオロ
アルキル基)に変えるものである。or fluoroalkyl group, m:n is 60-99:40-1 mho is 60-99:40-1 m:n:o is 60-99:20-0.5:
20 to 0.5 C action] The present invention uses organic borosilicon resin, organic phosphorus silicon resin, or organic phosphorus silica resin, which the inventors have previously proposed as a method to put into practical use an interlayer insulating film forming material with a small dielectric constant value. In the boron resin, the structural unit 5i04y□ is changed to R31(hz□ (where R is an alkyl group having 1 to 6 carbon atoms or a fluoroalkyl group).
すなわち、高周波用半導体装置を構成する絶縁膜の必要
条件は、
■ 耐熱性が優れていること、
■ 0□プラズマ耐性に優れていること、■ 構成材料
の誘電率が小さいこと、
■ 平坦性が優れていること、
■ 耐クラツク性が優れていること、
であり、先に発明者等が提案している材料は■。In other words, the necessary conditions for an insulating film that constitutes a high-frequency semiconductor device are: ■ excellent heat resistance, ■ excellent plasma resistance, ■ low dielectric constant of the constituent materials, and ■ flatness. ■It has excellent crack resistance, and the material previously proposed by the inventors is ■.
■および■を満足している。■ and ■ are satisfied.
一方、本発明は■と■の特性を実用に差支えない範囲で
犠牲とすることにより■の条件を満たすものである。On the other hand, the present invention satisfies the condition (2) by sacrificing the characteristics (2) and (2) to a practical extent.
すなわち、■の耐熱性について云えば、Si半導体デバ
イスの製造において半導体素子に加わる温度は最高で4
50℃であり、化合物半導体デバイスの場合は更に低い
。In other words, regarding the heat resistance (2), the temperature applied to the semiconductor element during the manufacture of Si semiconductor devices is at most 4.
50°C, and even lower in the case of compound semiconductor devices.
そのため絶縁膜の耐熱性は450°Cを満たせばよく、
R51037□構成単位(但し、Rはアルキル基)は約
550°Cの耐熱性をもっている。Therefore, the heat resistance of the insulating film only needs to satisfy 450°C.
The R51037□ structural unit (R is an alkyl group) has a heat resistance of about 550°C.
また、■のプラズマ耐性も実用には充分な特性を示して
いる。In addition, the plasma resistance shown in (2) also shows sufficient characteristics for practical use.
一方、構成単位として5ix4y□をR31(hz□に
変えることにより誘電率を大幅に低減することができ、
また吸湿性を軽減することができる。On the other hand, by changing 5ix4y□ to R31 (hz□) as a structural unit, the dielectric constant can be significantly reduced.
Moreover, hygroscopicity can be reduced.
すなわち、先に提案している絶縁材料の誘電率は脱水時
において4〜5であり、吸湿時においては8〜9と増加
するが、本発明に係る絶縁材料の誘電率は脱水時におい
て3以下であり、吸湿時にいても4以下と少ない。That is, the dielectric constant of the previously proposed insulating material is 4 to 5 when dehydrated, and increases to 8 to 9 when moisture is absorbed, but the dielectric constant of the insulating material according to the present invention is 3 or less when dehydrated. Even when moisture is absorbed, it is as low as 4 or less.
この理由はアルキル基またはフルオロアルキル基の存在
の有無による。The reason for this depends on the presence or absence of an alkyl group or a fluoroalkyl group.
すなわち、硅硼素樹脂、燐硅素樹脂あるいは焼砂硼素樹
脂などを用いて形成される層間絶縁膜は、これを構成す
るBO+/zやPo5y□などの構成単位に水分子が配
位し易い。That is, in an interlayer insulating film formed using a borosilicon resin, a phosphorus silica resin, a baked sand boron resin, or the like, water molecules are likely to coordinate with constituent units such as BO+/z and Po5y□.
すなわち、BO3/□については3価の硼素(B)のも
つ空の軌道に酸素(0)の非共有電子対を使用して水(
HzO)分子が配位し易い。In other words, for BO3/□, water (
HzO) molecules are easy to coordinate.
またPO37□については燐(P)とOがPOの二重結
合を構成しているOと水素結合が生じ易い。Regarding PO37□, phosphorus (P) and O are likely to form a hydrogen bond with O that constitutes the double bond of PO.
これらのことから、吸湿し易く、これにより誘電率が増
加する。For these reasons, it is easy to absorb moisture, which increases the dielectric constant.
一方、構成単位として5iOa7□をR51037□に
変えると、アルキル基あるいはフロロアルキル基は撥水
性を示すために、この付加により吸湿性を減らすことが
でき、また2、8以下の低誘電率を保持することができ
る。On the other hand, when 5iOa7□ is changed to R51037□ as a structural unit, the alkyl group or fluoroalkyl group exhibits water repellency, so this addition can reduce hygroscopicity and maintain a low dielectric constant of 2.8 or less. can do.
また、有機基を含むために可撓性が増し、約5μ−の厚
さまでクラックの発生がなく使用することができる。Furthermore, since it contains an organic group, it has increased flexibility and can be used up to a thickness of approximately 5 μm without cracking.
合成例1: (硅硼素樹脂)
11のフラスコ中で、メチルトリアセトキシシラン14
0gをテトラヒドロフラン(略称THF) 500m1
lに溶解し、これにトリエチル硼酸73gを加え、3時
間に亙って加熱還流した後、溶媒のTHFを留去してエ
ステル交換反応生成物を得た。Synthesis Example 1: (Boron resin) In 11 flasks, 14 methyltriacetoxysilane
0g to tetrahydrofuran (abbreviation THF) 500ml
73 g of triethyl boric acid was added thereto, and after heating under reflux for 3 hours, the solvent THF was distilled off to obtain a transesterification reaction product.
これにメタノール30mjl!を加え、30分間に亙っ
て室温で攪拌した後、イオン交換水20+aj!を滴下
し、50°Cで3時間加熱して加水分解させると共に重
縮合させた。30mjl of methanol for this! After stirring at room temperature for 30 minutes, add 20+aj! of ion-exchanged water. was added dropwise and heated at 50°C for 3 hours to cause hydrolysis and polycondensation.
反応終了後、溶液中のメタノールと水とを除き、得られ
た低分子量樹脂をブチルセルソルブに溶解して樹脂溶液
を得た。After the reaction was completed, methanol and water in the solution were removed, and the obtained low molecular weight resin was dissolved in butyl cellosolve to obtain a resin solution.
合成例2: (焼砂素樹脂)
11のフラスコ中で、メチルトリアセトキシシラン0.
5モルをテトラヒドロフラン(略称THF)の500
mlに溶解し、これにトリメチル燐酸0.5モルを加
え、3時間に亙って加熱還流した後、溶媒のTHFを留
去してエステル交換反応生成物を得た。Synthesis Example 2: (Baked sand base resin) In a flask of 11, 0.0% of methyltriacetoxysilane was added.
5 moles of tetrahydrofuran (abbreviated as THF)
ml, 0.5 mol of trimethyl phosphoric acid was added thereto, and after heating under reflux for 3 hours, the solvent THF was distilled off to obtain a transesterification reaction product.
これにメタノール50+ofを加え、室温で15分間に
亙って攪拌した。To this was added 50+ of methanol, and the mixture was stirred at room temperature for 15 minutes.
これに更にイオン交換水30/!を滴下し、50°Cで
3時間加熱して加水分解させると共に重縮合を行った。Add to this ion exchange water for 30 yen! was added dropwise and heated at 50°C for 3 hours to cause hydrolysis and polycondensation.
反応終了後、得られた反応混合物から、減圧して溶液中
のメタノールと水とを除き、乳酸エチルを加えて濃度調
節を行い、樹脂溶液を得た。After the reaction was completed, methanol and water in the solution were removed from the resulting reaction mixture under reduced pressure, and ethyl lactate was added to adjust the concentration to obtain a resin solution.
合成例3(焼砂硼素樹脂)
500n+ j2のフラスコ中で、メチルトリアセトキ
シシラン66gをTHFの250va lに溶解し、こ
れにトリエトキシシボラン34gを加え、3時間に亙っ
て加熱還流した後、溶媒のTIFを留去してエステル交
換反応生成物を得た。Synthesis Example 3 (Burned Sand Boron Resin) In a 500N+J2 flask, 66g of methyltriacetoxysilane was dissolved in 250val of THF, 34g of triethoxysiborane was added thereto, and the mixture was heated under reflux for 3 hours. , the solvent TIF was distilled off to obtain a transesterification reaction product.
次に、他の12のフラスコ中でテトラアセトキシシラン
66gをTHF250 mlに溶解し、燐酸トリメチル
35gを加え、3時間に亙って加熱還流した後、THF
を留去してエステル交換生成物を得た。Next, in 12 other flasks, 66 g of tetraacetoxysilane was dissolved in 250 ml of THF, 35 g of trimethyl phosphate was added, and after heating under reflux for 3 hours, the solution was dissolved in THF.
was distilled off to obtain a transesterified product.
これを先のエステル交換生成物と混合し、これにメタノ
ール50顛!を加え、30分室温で攪拌した後、イオン
交換水20/!を滴下し、50°Cで3時間加熱して加
水分解させると共に重縮合させた。Mix this with the transesterified product from above, and add 50 volumes of methanol to this! After stirring at room temperature for 30 minutes, add 20/! of ion-exchanged water. was added dropwise and heated at 50°C for 3 hours to cause hydrolysis and polycondensation.
反応終了後、溶液中のメタノールと水とを除き、得られ
た低分子量樹脂をブチルセルソルブに溶解して樹脂溶液
を得た。After the reaction was completed, methanol and water in the solution were removed, and the obtained low molecular weight resin was dissolved in butyl cellosolve to obtain a resin solution.
実施例1:
合成例1で得た樹脂溶液を、半導体素子の形成において
、第1層の1配線を施したSi基板(配線の厚さ1μm
、最小線幅1μm、最小線間隔1゜5μll1)の上に
スピンコード法により3000rpm、 30秒の条件
で塗布して厚さが1μmの塗膜を形成した。Example 1: The resin solution obtained in Synthesis Example 1 was applied to a Si substrate (with a wiring thickness of 1 μm) on which one wiring of the first layer was applied in the formation of a semiconductor element.
, a minimum line width of 1 μm and a minimum line spacing of 1°5 μl1) were coated using a spin code method at 3000 rpm for 30 seconds to form a coating film with a thickness of 1 μm.
この塗膜を80°Cで20分間乾燥して溶剤を除去した
後、450 ”Cで30分加熱して重合させた。The coating film was dried at 80°C for 20 minutes to remove the solvent, and then heated at 450''C for 30 minutes to polymerize.
熱処理後の基板表面の段差は0.2μm以下であり、第
1層An配線より生じた段差は平坦化されていた。The level difference on the substrate surface after the heat treatment was 0.2 μm or less, and the level difference caused by the first layer An wiring was flattened.
続いて、基板上にスルーホールを形成し、第2層目のA
N配線を行い、保護層として1.3μ−厚の燐ガラス層
を形成した後、電極取り出し用の窓開けを行って半導体
装置を得た。Next, through holes are formed on the substrate, and the second layer A
After forming N wiring and forming a 1.3 μm-thick phosphor glass layer as a protective layer, a window for taking out the electrodes was opened to obtain a semiconductor device.
この装置は大気中で500°C,1時間の加熱試験と一
65°C〜150°Cの10回の熱衝撃試験後において
も不良発生は認められなかった。No defects were observed in this device even after a heating test in the atmosphere at 500°C for 1 hour and a thermal shock test of 165°C to 150°C 10 times.
実施例2:
合成例1で得た樹脂溶液を用い、実施何重と同様にして
Si基板上に0.7 μmの厚さに樹脂層を形成し、更
にこの上に燐ガラスを公知の方法で0.5μ−の厚さに
形成した。Example 2: Using the resin solution obtained in Synthesis Example 1, a resin layer with a thickness of 0.7 μm was formed on a Si substrate in the same manner as in the previous example, and phosphor glass was further applied on this by a known method. It was formed to a thickness of 0.5μ.
この膜は下地段差を0.4μmに平坦化していた。This film flattened the underlying step to 0.4 μm.
次に、実施例1と同様にして半導体装置を製造して試験
したが、不良発生は認められなかった。Next, a semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
実施例3:
合成例1で得た樹脂溶液を、半導体素子の形成において
、第1層のポリSi配線を施したSi基板(配線の厚さ
1μm、最小線幅1μm、最小線間隔1.5 μm)の
上にスピンコード法により3000rpm。Example 3: The resin solution obtained in Synthesis Example 1 was applied to a Si substrate with a first layer of poly-Si wiring (wiring thickness 1 μm, minimum line width 1 μm, minimum line spacing 1.5 μm) at 3000 rpm using the spin code method.
30秒の条件で塗布して厚さが1μmの塗膜を形成した
。The coating was applied for 30 seconds to form a coating film with a thickness of 1 μm.
この塗膜を80℃で20分間乾燥して溶剤を除去した後
、450℃で30分加熱して重合させた。This coating film was dried at 80° C. for 20 minutes to remove the solvent, and then heated at 450° C. for 30 minutes to polymerize.
熱処理後の基板表面の段差は0.2μm以下であり、第
1層ポリSi配線より生じた段差は平坦化されていた。The level difference on the substrate surface after the heat treatment was 0.2 μm or less, and the level difference caused by the first layer poly-Si wiring had been flattened.
続いて、基板上にスルーホールを形成し、2.5%の弗
素水素酸による処理を施した後、第2層目のポリSi配
線を行い、保護層として1.3μm厚の燐ガラス層を形
成した後、電極取り出し用の窓開けを行って半導体装置
を得た。Next, through holes were formed on the substrate and treated with 2.5% hydrofluoric acid, followed by a second layer of poly-Si wiring, and a 1.3 μm thick phosphorous glass layer was formed as a protective layer. After forming, a window for taking out the electrodes was opened to obtain a semiconductor device.
この装置は大気中で500°C,1時間の加熱試験と一
65°C〜150°Cの10回の熱衝撃試験後において
も不良°発生は認められなかった。No defects were observed in this device even after a one-hour heating test at 500°C in the atmosphere and 10 thermal shock tests at -65°C to 150°C.
実施例4:
合成例2で得た樹脂溶液を、半導体素子の形成において
、第1層のAn配線を施したSi基板(配線の厚さ1μ
m、最小線幅1μm、最小線間隔1゜5μ−)の上にス
ピンコード法により3000rp+n、30秒の条件で
塗布して厚さが1μmの塗膜を形成した。Example 4: The resin solution obtained in Synthesis Example 2 was applied to a Si substrate with a first layer of An interconnection (wiring thickness of 1 μm) in the formation of a semiconductor element.
A coating film having a thickness of 1 .mu.m was formed by applying the coating onto a surface of 1 .mu.m, minimum line width: 1 .mu.m, minimum line spacing: 1.degree.
この塗膜を80°Cで20分間乾燥して溶剤を除去した
後、450°Cで30分加熱して重合させた。This coating film was dried at 80°C for 20 minutes to remove the solvent, and then heated at 450°C for 30 minutes to polymerize.
熱処理後の基板表面の段差は0.2μ−以下であり、第
1層Aj2配線より生じた段差は平坦化されていた。The level difference on the substrate surface after the heat treatment was 0.2 .mu.- or less, and the level difference caused by the first layer Aj2 wiring had been flattened.
以下、実施例1と同様にして半導体装置を製造して試験
したが、不良発生は認められなかった。Hereinafter, a semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
実施例5:
合成例2で得た樹脂溶液を用い、実施例1と同様にして
Si基板上に0.7 μ園の厚さに樹脂層を形成し、更
にこの上に燐ガラスを公知の方法で0.5μ麟の厚さに
形成した。Example 5: Using the resin solution obtained in Synthesis Example 2, a resin layer was formed on a Si substrate to a thickness of 0.7 μm in the same manner as in Example 1, and phosphor glass was further applied on this layer using a known method. The film was formed to a thickness of 0.5 μm using the same method.
この膜は下地段差を0.4μmに平坦化していた。This film flattened the underlying step to 0.4 μm.
次に、実施例1と同様にして半導体装置を製造して試験
したが、不良発生は認められなかった。Next, a semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
実施例6
合成例2で得た樹脂溶液を、半導体素子の形成において
、第1層のポリSi配線を施したSi基板(配線の厚さ
1μm、最小線幅1μ領、最小線間隔1.5μm)の上
にスピンコード法により3000rpm+。Example 6 The resin solution obtained in Synthesis Example 2 was used to form a semiconductor element on a Si substrate with a first layer of poly-Si wiring (wiring thickness 1 μm, minimum line width 1 μm area, minimum line spacing 1.5 μm). ) using the spin code method at 3000 rpm+.
30秒の条件で塗布して厚さが1μ鋼の塗膜を形成した
。The coating was applied for 30 seconds to form a 1 μm thick steel coating.
以下実施例1と同様にして半導体装置を製造して試験し
たが、不良発生は認められなかった。A semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
実施例7:
合成例3で得た樹脂溶液を、半導体素子の形成において
、第1層のAI!、配線を施したSi基板(配線の厚さ
1μm、最小線幅1μm、最小線間隔1゜5μm)の上
にスピンコード法により3000rpm、 30秒の条
件で塗布して厚さが1μmの塗膜を形成した。Example 7: The resin solution obtained in Synthesis Example 3 was used to form the first layer of AI! in the formation of a semiconductor device. A coating film with a thickness of 1 μm was formed by applying the coating on a wired Si substrate (wiring thickness 1 μm, minimum line width 1 μm, minimum line spacing 1°5 μm) using the spin code method at 3000 rpm for 30 seconds. was formed.
以下実施例1と同様にして半導体装置を製造して試験し
たが、不良発生は認められなかった。A semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
実施例8:
合成例3で得た樹脂溶液を用い、実施例1と同様にして
Si基板上に0.7 μmの厚さに樹脂層を形成し、更
にこの上に燐ガラスを公知の方法で0.5μmの厚さに
形成した。Example 8: Using the resin solution obtained in Synthesis Example 3, a resin layer with a thickness of 0.7 μm was formed on a Si substrate in the same manner as in Example 1, and phosphor glass was further applied on this by a known method. It was formed to a thickness of 0.5 μm.
この膜は下地段差を0.4μmに平坦化していた。This film flattened the underlying step to 0.4 μm.
次に、実施例1と同様にして半導体装置を製造して試験
したが、不良発生は認められなかった。Next, a semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
実施例9:
合成例3で得た樹脂溶液を、半導体素子の形成において
、第1層のポリSi配線を施したSi基板(配線の厚さ
1μm、最小線幅1μm、最小線間隔1.5 μm)の
上にスピンコード法により3000rpm。Example 9: The resin solution obtained in Synthesis Example 3 was used to form a semiconductor element on a Si substrate with a first layer of poly-Si wiring (wiring thickness: 1 μm, minimum line width: 1 μm, minimum line spacing: 1.5 μm) at 3000 rpm using the spin code method.
30秒の条件で塗布して厚さが1μmの塗膜を形成した
。The coating was applied for 30 seconds to form a coating film with a thickness of 1 μm.
以下実施例1と同様にして半導体装置を製造して試験し
たが、不良発生は認められなかった。A semiconductor device was manufactured and tested in the same manner as in Example 1, but no defects were observed.
本発明の実施により、誘電率が少なく且つ耐熱性、耐0
□プラズマ性、平坦性などの条件を満たし、また耐クラ
ツク性が従来よりも優れた層間絶縁層を実用化すること
ができ、これにより高周波用の半導体装置を製造するこ
とが可能となる。By implementing the present invention, the dielectric constant is small and the heat resistance and zero resistance are reduced.
□It is possible to put into practical use an interlayer insulating layer that satisfies conditions such as plasma properties and flatness, and has better crack resistance than conventional ones, making it possible to manufacture high-frequency semiconductor devices.
Claims (6)
層間絶縁膜として次の一般式(1)で表される構造単位
をもち、平均分子量が5×10^2〜3×10^4の有
機硅硼素樹脂を用いることを特徴とする半導体装置の絶
縁膜形成方法。 (RSiO_3_/_2)_m(BO_3_/_2)_
n……………(1)こゝで、Rは炭素数が1〜6のアル
キル基、またはフルオロアルキル基、 m:nは60〜99:40〜1(1) When forming multilayer wiring for semiconductor integrated circuits,
An insulation for a semiconductor device, characterized in that an organic borosilicate resin having a structural unit represented by the following general formula (1) and having an average molecular weight of 5 x 10^2 to 3 x 10^4 is used as an interlayer insulating film. Film formation method. (RSiO_3_/_2)_m(BO_3_/_2)_
n…………(1) Here, R is an alkyl group having 1 to 6 carbon atoms or a fluoroalkyl group, m:n is 60-99:40-1
て用いることを特徴とする半導体装置。(2) A semiconductor device characterized in that the organic borosilicate resin according to claim 1 is used as an interlayer insulating film.
層間絶縁膜として次の一般式(2)で表される構造単位
をもち、平均分子量が5×10^2〜3×10^4の有
機燐硅素樹脂を用いることを特徴とする半導体装置の絶
縁膜形成方法。 (RSiO_3_/_2)_m(PO_5_/_2)_
o……………(2)こゝで、Rは炭素数が1〜6のアル
キル基、またはフルオロアルキル基、 m:oは60〜99:40〜1(3) When forming multilayer wiring for semiconductor integrated circuits,
An insulation for a semiconductor device, characterized in that an organic phosphorus silicon resin having a structural unit represented by the following general formula (2) and having an average molecular weight of 5 x 10^2 to 3 x 10^4 is used as an interlayer insulating film. Film formation method. (RSiO_3_/_2)_m(PO_5_/_2)_
o…………(2) Here, R is an alkyl group having 1 to 6 carbon atoms or a fluoroalkyl group, m:o is 60-99:40-1
て用いることを特徴とする半導体装置。(4) A semiconductor device characterized in that the organic phosphorus silicon resin according to claim 3 is used as an interlayer insulating film.
層間絶縁膜として次の一般式(3)で表される構造単位
をもち、平均分子量が5×10^2〜3×10^4の有
機燐硅硼素樹脂を用いることを特徴とする半導体装置の
絶縁膜形成方法。 (RSiO_3_/_2)_m(BO_3_/_2)_
n(PO_5_/_2)_o………(3)こゝで、Rは
炭素数が1〜6のアルキル基。 またはフルオロアルキル基、 m:n:oは60〜99:20〜0.5:20〜0.5(5) When forming multilayer wiring for semiconductor integrated circuits,
A semiconductor device characterized in that an organic phosphorus-silicon-boron resin having a structural unit represented by the following general formula (3) and having an average molecular weight of 5 x 10^2 to 3 x 10^4 is used as an interlayer insulating film. Insulating film formation method. (RSiO_3_/_2)_m(BO_3_/_2)_
n(PO_5_/_2)_o (3) Here, R is an alkyl group having 1 to 6 carbon atoms. or fluoroalkyl group, m:n:o is 60-99:20-0.5:20-0.5
して用いることを特徴とする半導体装置。(6) A semiconductor device characterized in that the organic phosphorus-silicon-boron resin according to claim 5 is used as an interlayer insulating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2246501A JPH04125929A (en) | 1990-09-17 | 1990-09-17 | Insulating film forming method of semiconductor device and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2246501A JPH04125929A (en) | 1990-09-17 | 1990-09-17 | Insulating film forming method of semiconductor device and semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04125929A true JPH04125929A (en) | 1992-04-27 |
Family
ID=17149338
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2246501A Pending JPH04125929A (en) | 1990-09-17 | 1990-09-17 | Insulating film forming method of semiconductor device and semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04125929A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6933166B2 (en) * | 2002-05-22 | 2005-08-23 | Robert Bosch Gmbh | Method for manufacturing a component, in particular a thermal sensor, and thermal sensor |
| JP2009019104A (en) * | 2007-07-11 | 2009-01-29 | Nitto Denko Corp | Resin for sealing an optical semiconductor element comprising polyborosiloxane |
| JP2009127020A (en) * | 2007-11-28 | 2009-06-11 | Nitto Denko Corp | Optical semiconductor element sealing resin containing polyborosiloxane and optical semiconductor device obtained using the same |
| JP2009167361A (en) * | 2008-01-21 | 2009-07-30 | Nitto Denko Corp | Method for producing resin composition for encapsulating optical semiconductor element |
| JP2009545649A (en) * | 2006-08-04 | 2009-12-24 | ダウ・コーニング・コーポレイション | Silicone resin and silicone composition |
-
1990
- 1990-09-17 JP JP2246501A patent/JPH04125929A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6933166B2 (en) * | 2002-05-22 | 2005-08-23 | Robert Bosch Gmbh | Method for manufacturing a component, in particular a thermal sensor, and thermal sensor |
| JP2009545649A (en) * | 2006-08-04 | 2009-12-24 | ダウ・コーニング・コーポレイション | Silicone resin and silicone composition |
| JP2009019104A (en) * | 2007-07-11 | 2009-01-29 | Nitto Denko Corp | Resin for sealing an optical semiconductor element comprising polyborosiloxane |
| JP2009127020A (en) * | 2007-11-28 | 2009-06-11 | Nitto Denko Corp | Optical semiconductor element sealing resin containing polyborosiloxane and optical semiconductor device obtained using the same |
| JP2009167361A (en) * | 2008-01-21 | 2009-07-30 | Nitto Denko Corp | Method for producing resin composition for encapsulating optical semiconductor element |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3330643B2 (en) | Coating solution for forming silica-based film and substrate with film | |
| KR100515583B1 (en) | Organic silicate polymer and insulation film comprising the same | |
| KR100451044B1 (en) | Method for preparing organic silicate polymer and method for preparing insulating film using the same | |
| JPH04125929A (en) | Insulating film forming method of semiconductor device and semiconductor device | |
| KR100645682B1 (en) | Organosiloxane Resin and Insulating Film Using the Same | |
| KR100405312B1 (en) | Organic silicate polymer and low dielectric insulation film comprising the same | |
| KR100419069B1 (en) | Organic silicate polymer and low dielectric insulation film comprising the same | |
| JP3139230B2 (en) | Coating solution for forming silica-based film and substrate with film | |
| JPH04359056A (en) | Resin composition and method for forming layer insulating film | |
| KR100422916B1 (en) | Organic silicate polymer and low dielectric insulation film comprising the same | |
| JP3208010B2 (en) | Coating solution for forming silica-based film and substrate with film | |
| US7091287B2 (en) | Nanopore forming material for forming insulating film for semiconductors and low dielectric insulating film comprising the same | |
| JP3192876B2 (en) | Coating composition for forming silica-based film and substrate with film | |
| JPH0439371A (en) | Formation of insulating film and semiconductor device having insulating film | |
| JP3227359B2 (en) | Semiconductor device | |
| KR100450257B1 (en) | Organic silicate polymer and low dielectric insulation film comprising the same | |
| KR100515584B1 (en) | Organic silicate polymer and insulation film comprising the same | |
| JPH04185640A (en) | Production of organosilicon polymer and semiconductor device | |
| JPH04185639A (en) | Formation of insulating film and semiconductor device | |
| JPS63196669A (en) | Silicone resin paint | |
| JP2705078B2 (en) | Method for planarizing semiconductor element surface | |
| JPH0263057A (en) | Photosensitive heat resistant resin composition and production of integrated circuit | |
| JP2671902B2 (en) | Method for forming multi-layer wiring of semiconductor integrated circuit | |
| JPH0995646A (en) | Coating composition for silica-based coating film and base material with silica-based coating film | |
| KR100508902B1 (en) | Organic silicate polymer and insulation film comprising the same |