JPH0412644B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field This invention provides an input signal between power supplies (VCC-GND).
The present invention relates to a Hall element signal input circuit that handles a Hall element output signal composed of a DC level that changes over a full range (between 1 and 2) and a minute signal superimposed on this DC level.

(b) Prior art and its drawbacks As an element that outputs a signal in which a minute signal is superimposed on a DC level that changes within the range of power supply voltage, for example, a means that can set the DC level on which the minute signal is superimposed is connected. There is a Hall element.
When using such a Hall element, the DC level is set by taking into consideration the state of the magnetic field in which the Hall element is placed, the sensitivity of the input circuit, etc. In addition, since the input circuit must be a DC amplifier circuit in order to handle a signal in which a minute signal is superimposed on a DC level, the connection to the input circuit is naturally set to a direct connection state without a coupling capacitor or the like.

However, since a transistor is usually placed at the first stage of the input circuit, the signal cannot be amplified accurately depending on the DC level input to its base. For example, as shown in Figure 3A, the emitter of the first stage transistor is
When connected to VCC, the base-emitter voltage VF is about 0.7V, so it is
A portion of the signal region A shown in FIG. 4 within the range of VF is not accepted as an input signal. Also the third
If the emitter is grounded to GND as shown in FIG. B, the signal in area B shown in FIG. 4 is not accepted. In this way, in an input circuit that directly inputs a signal in which a minute signal is superimposed on a DC level that changes within the power supply voltage range, VCC− (VCC−VF)
There was an inconvenience that input signals between VF and GND could not be amplified.

(c) Object of the Invention The object of the invention is to solve the above-mentioned disadvantages and to provide a Hall element signal input circuit that can accurately amplify signals whose DC level changes over the entire range between VCC and GND with a simple circuit configuration. Our goal is to provide the following.

(d) Structure of the Invention The present invention provides a Hall element directly connected to a Hall element connected to a DC level setting means that outputs a signal in which a minute signal is superimposed on a DC level and changes the DC level within a range of power supply voltage. In the element input circuit, a first transistor TR1 receives a control level corresponding to a setting ratio of the DC level setting means and causes an output current _I0 to flow through the Hall element;
a mirror circuit through which a current I ₀ ″ having the same magnitude as the output current I ₀ flows; a load resistor R ₁ through which the current I ₀ ″ flows;
The present invention is characterized in that it includes a level shift circuit that shifts the DC level of the signal by adding or subtracting the voltage drop across the load resistor _R1 from the output voltage of the Hall element.

(e) Embodiment FIG. 1 is a circuit diagram of an input circuit which is an embodiment of the present invention.

In the figure, a transistor TR1, which is a DC level setting means, is connected between a power supply terminal a of a Hall element 1, which is an example of an input element, and a power supply VCC. At the input terminal I of this transistor TR1,
A control signal that determines to what level the DC level of the Hall element output is input is input from a control section (not shown). Transistors TR2 to TR4, diode-connected transistor TR5, and resistor R
1 constitutes a level shift circuit. transistor
TR1 to TR3 are formed on a common base on an IC chip, and in this embodiment, the emitter regions of each transistor are set to have the same area. Therefore, based on the control level applied to the input terminal I of the transistor TR1, a current _{I0 '} of the same magnitude as the current I0 flowing into the Hall element 1 flows through the transistor TR1.
2, the current is reversed by a mirror circuit constituted by transistors TR4 and TR5, and a current I ₀ '' of the same magnitude also flows through transistor TR3.

Now, suppose that the input first stage transistor TR6 is of PNP type, and the internal resistance value of the Hall element 1 is the resistance R connected to the collector of the R _H transistor TR4.
If the resistance value of 1 is _R1 , the DC level of its output is specified as 1/2 of the voltage _VH applied between power supply terminals a and b due to the characteristics of the Hall element itself, so the output voltage of the level shift circuit is V ₀ becomes V ₀ =V _H /2−I ₀ ″·R ₁ =I ₀ ·R _H /2−I″ ₀ R ₁ ≒I ₀ (R _H /2−R ₁ ). That is, as shown in FIG.
The output of the input terminal I is level-shifted to the GND level side in accordance with the control level supplied to the input terminal I. As a result, the voltage margin on the input side of the input first-stage transistor TR6 is greatly increased toward the VCC side, and it is possible to eliminate signal regions that cannot be amplified as shown in regions A and B in FIG. 4. In addition, in this example, the case where the input first stage transistor is a PNP type is explained, but in the case of an NPN type, the Hall element output signal can be converted using a similar circuit configuration.
All you have to do is shift the level to the VCC side.

(f) Effects of the Invention As described above, according to the present invention, even if the DC level on which a minute signal is superimposed varies within the power supply voltage range, the signal can be transferred to the power supply voltage side or
Since the level is automatically shifted to the OV side, the dead area of the input circuit can be almost completely eliminated.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an input circuit according to an embodiment of the present invention, and FIG. 2 is a diagram showing a level shift state in the input circuit. Further, in FIG. 3, A and B indicate input first-stage transistors, and FIG. 4 is a diagram showing a dead area in a conventional input circuit. 1...Hall element.

Claims (1)

[Claims] 1. In a Hall element input circuit directly connected to a Hall element connected to a DC level setting means that outputs a signal in which a minute signal is superimposed on a DC level and changes the DC level in a range of power supply voltage, the DC level setting A control level corresponding to the set ratio of the means is input, and an output current I ₀ is input to the Hall element.
a first transistor TR1 that flows a current I _{0 ″} of the same magnitude as the output current I 0 ;
A load resistor R ₁ through which the current I ₀ ″ flows, and a level shift circuit that level-shifts the DC level of the signal by adding or subtracting a voltage drop across the load resistor R ₁ to the output voltage of the Hall element. A Hall element signal input circuit characterized by: