JPH04134811A - Multilayer chip capacitor - Google Patents

Abstract

PURPOSE:To obtain a multilayer chip capacitor which can be mounted in the parts-connection of a narrow space, by providing one of a pair of external electrodes in the intermediate position of the part extending in the longitudinal direction of a capacitor body. CONSTITUTION:One of external electrodes 3 is provided almost in the center of the part extending in the longitudinal direction of a capacitor body 1 and the space between a pair of external electrodes 2, 3 is about the half of the length of the capacitor body 1. In a conductor pattern 9 for mounting a multilayer chip capacitor, therefore, the space D between lands 9a can be set to about the half of the length of the capacitor body 1 so that the space of the parts mount of the conductor pattern 9 can be reduced. In this case, further, one end of the capacitor body 1 protrudes largely from the land 9a of the conductor pattern 9, but the surface of the end is insulated so that no difficulty takes place even if the end approaches other conductor pattern and parts.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Field of Application> The present invention relates to a multilayer chip capacitor, and specifically relates to the structure of an external electrode portion.

<Prior Art> A multilayer chip capacitor has a capacitor body formed by alternately laminating dielectric layers and internal electrodes, and external electrodes are formed at two locations on the surface of the capacitor body.

Its external shape is shown in FIG.

As shown in the figure, external electrodes 2° and 3o are formed at both ends of the capacitor body 10, respectively.

<Problems to be Solved by the Invention> Such a multilayer chip capacitor is placed on a circuit board, and each external electrode 2°, 3o is connected and fixed to a land 4ao of a corresponding conductor pattern 4°. The conductor pattern 4° on the circuit board is formed according to the external shape of the capacitor, and the lands 4ao, 4ao of the conductor pattern 4°
The distance between them is determined by the distance between the external electrodes 2o and 3o.

By the way, in a multilayer chip capacitor with a large capacity, the external dimensions of the capacitor body 10 are large, and the external electrodes 2°,
The distance between 36 is also wide. When trying to attach such a capacitor to a circuit board, land 4 of the conductor pattern 4°
The interval between 8o + 4 ao must be widened,
The component connection portion of the 4° conductor pattern occupies a large space.

This will affect the arrangement of other conductor patterns and components, making it difficult to actually mount a multilayer chip capacitor with a large capacity.

The present invention has been made in view of the above-mentioned problems, and even if the capacitance is large and the external dimensions are large, the present invention can be used without widening the spacing between the lands of the conductive pattern, allowing the connection of components in narrow spaces. The object of the present invention is to provide a multilayer chip capacitor that can be mounted on a multilayer chip capacitor.

<Means for Solving the Invention> In order to achieve the above-mentioned problems, the present invention provides a multilayer chip capacitor in which a pair of external electrodes are formed on the surface of a capacitor body, in which one of the pair of external electrodes is At least one of the external electrodes is provided at an intermediate position along the longitudinal direction of the capacitor body.

<Operation> In the above configuration, since at least one of the external electrodes is located halfway along the length of the capacitor body, the distance between the pair of external electrodes is short compared to the length of the capacitor body. therefore. Even if the capacitance is large and the external dimensions of the capacitor body are large, it can be attached to a conductor pattern with narrow land spacing, and the space required for the component connection portion of the conductor pattern can be reduced.

<Example> Hereinafter, the present invention will be described in detail based on an example shown in the drawings.

FIG. 1 is an external perspective view of a multilayer chip capacitor according to an embodiment of the present invention, and FIG. 2 is an exploded perspective view showing the internal structure of the capacitor body.

The multilayer chip capacitor of this embodiment includes a rectangular capacitor body 1, and a pair of external electrodes 2 and 3 are formed on the surface of the capacitor body 1. Amphoteral electrode 2.
3, one of the external electrodes 2 is formed at one end in the longitudinal direction of the capacitor body 1;
is formed in a band shape at an intermediate position along the longitudinal direction of the capacitor body 1, that is, approximately at the center thereof.

FIG. 2 shows the internal structure of the capacitor body 1 of the multilayer chip capacitor.

The capacitor body 1 consists of two types of dielectric notes 6.7, each having an internal electrode 4.5 printed on its negative side, and a dielectric sheet 8 for a spacer having no internal electrode. Of the two types of dielectric sheets 6.7, the internal electrode 4 of one dielectric sheet 6 is provided with an extraction electrode 4a at one end in the longitudinal direction, and the internal electrode 5 of the other dielectric sheet 7 is provided with an extraction electrode 4a at one end in the longitudinal direction. An extraction electrode 5a is provided at approximately the center in the longitudinal direction.

Both of these dielectric sheets 6.7.8 are in the state of green sheets, and first, two types of dielectric sheets 6.7
are laminated alternately, dielectric sheets 8 for spacers are laminated above and below, the whole is crimped, and then fired to form the capacitor body l.

A pair of external electrodes 2.3 are formed on the surface of the capacitor body 1, and an internal electrode 4 of one dielectric sheet 6 is an extraction electrode 4 provided at one end in the longitudinal direction.
The internal electrode 5 of the other dielectric sheet 7 is connected to the external electrode 3 via an extraction electrode 5a provided approximately at the center in the longitudinal direction.

In the above configuration, one of the external electrodes 3 is located approximately at the center in the longitudinal direction of the capacitor body l, so the distance between the pair of external electrodes 2.3 is approximately half the length of the capacitor body l. Become. Therefore, as shown in FIG. 1, in the conductor pattern 9 to which this multilayer chip capacitor is attached, the spacing between the lands 9a9a can be set to half the length of the capacitor body l, and the conductor pattern 9
The space for the component mounting section can be reduced. In this case, one end of the capacitor body l will protrude significantly from the land 9a of the conductor pattern 9, but since the surface of this end is insulated, there will be no problem even if it comes close to other conductor patterns or components. Does not occur.

3 to 5 show other embodiments of the invention.

In the example shown in FIG. 3, the external electrode 3 formed at an intermediate position along the longitudinal direction of the capacitor body 1 goes around the capacitor body 1. Furthermore, the external electrode 3 located halfway along the length of the capacitor body 1 may be provided only on one side of the capacitor body 1, as shown in FIG. Furthermore, in the example shown in FIG. 5, both of the external electrodes 2.3 are formed in a band shape at a midway position along the longitudinal direction of the capacitor body 1.

<Effects of the Invention> As described above, according to the present invention, since one external electrode is located halfway along the longitudinal direction of the capacitor body,
This means that the distance between a pair of external electrodes can be shortened compared to the length of the capacitor body, and in the conductor pattern, the distance between the lands can be shortened compared to the length of the capacitor body, increasing the capacitance. Even a capacitor with large external dimensions can be installed in a component mounting part with a narrow space.

[Brief explanation of the drawing]

FIG. 1 is an external perspective view of a multilayer chip capacitor according to an embodiment of the present invention, FIG. 2 is an exploded perspective view of the capacitor body,
3 to 5 are external perspective views of other embodiments. Further, FIG. 6 is an external perspective view of a conventional multilayer chip capacitor. l... Capacitor body, 2 - External electrode.

Claims (1)

[Claims] (1) A multilayer chip capacitor in which a pair of external electrodes (2) and (3) are formed on the surface of a capacitor body (1), wherein at least one of the pair of external electrodes (2) and (3) is A multilayer chip capacitor characterized in that an electrode (3) is provided at an intermediate position along the longitudinal direction of a capacitor body (1).