JPH04137632A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To achieve fine processing of a semiconductor device and improve the integration level by gettering thermally diffused heavy metal impurities in the wafer to the surface layer and selectively removing this surface layer. CONSTITUTION:Impurities for one conductive type are introduced in high concentration into a surface layer 4 of a one conductive type semiconductor layer 3 and thermal processing is performed. Then, the surface layer 4 which contains the introduced one conductive type impurities is removed. The introduced element is selected from arsenic, boron, phosphorus, and antimony. The preferred thickness for the surface layer 4 into which the impurities are introduced is 100-200Angstrom . Also, the possible methods for removing the surface layer 4 include the moisture method, the reactive dry etching method, or a mechanical removal method.

Description

[Detailed Description of the Invention] [Summary] This method relates to a method for removing heavy metal impurities thermally diffused into a semiconductor wafer during the manufacturing process of a semiconductor device. Reduce leakage current,
The purpose of the present invention is to provide a method for manufacturing a semiconductor device that has excellent device characteristics even when miniaturized. After introducing the impurity into the conductive layer and performing a heat treatment, the surface layer where the introduced impurity of the first conductivity type exists is removed.

[Industrial Application Field] The present invention relates to a method for removing heavy metal impurities thermally diffused into a semiconductor wafer during the manufacturing process of semiconductor devices.

[Prior Art] In the manufacturing process of semiconductor devices, a field oxide film for element isolation is formed on a semiconductor wafer using the LOCO3 method, and then a ρn junction region, an oxide film, etc. are formed in the active region. During the heating process, heavy metal impurities that adhere to the wafer surface as shown in FIG. 4(a) diffuse to the wafer surface as shown in FIG. 4(b), and in particular, , a large amount is accumulated at the edges of the field oxide film 2 where strain is large.

In FIG. 4, 1 is, for example, a p-type silicon wafer, 2 is a field insulating film, and 3 is, for example, an n-type silicon wafer.
This is an n-type semiconductor layer into which type impurities are introduced.

Heavy metal impurities accumulated on the edges of the field oxide film 2 did not pose much of a problem when the dimensions of semiconductor devices were large, but as LSIs become more highly integrated, the dimensions of the individual semiconductor devices that make up LSIs have become smaller. As the size of the device becomes smaller and the peripheral length per unit area of the device increases, the leakage current density increases as shown in FIG. 5, which has an adverse effect on device characteristics.

[Problem to be solved by the invention]

When the area of a semiconductor element becomes I/K, the ratio of the peripheral length to the area doubles according to the proportional reduction law, and the leakage current density from the periphery of the element also doubles, so elements will be further miniaturized in the future. As the process progresses, the adverse effects of heavy metal impurities accumulated around the active region become more and more significant.

The purpose of the present invention is to solve this problem, and to reduce leakage current by removing heavy metal impurities thermally diffused into semiconductor wafers during the manufacturing process of semiconductor devices, and to maintain excellent device characteristics even when miniaturized. An object of the present invention is to provide a method for manufacturing semiconductor devices.

[Means for solving the problem] The above purpose is to solve the problem by reducing the surface layer (4) of the 1 conductivity type semiconductor layer (3)
According to a method for manufacturing a semiconductor device, in which the impurity of the first conductivity type is directly introduced at a high concentration, heat treatment is performed, and then the surface layer (4) where the introduced impurity of the first conductivity type is present is removed. achieved.

It is preferable that the element to be introduced is selected from the group of arsenic, boron, phosphorus, and antimony, and that the thickness of the surface layer (4) into which the impurity is introduced is 100 to 200 μm. It is. Further, the method for removing the surface layer (4) is a wet method, a reactive dry etching method, or
Any mechanical removal method may be used.

[Effect]

As shown in FIG. 1, when an impurity of the L conductivity type is ion-implanted directly at a high concentration and shallowly into the surface layer 4 of the semiconductor layer 3 of the 1 conductivity type without intervening an oxide film, the surface layer 4 of the semiconductor layer 3 of the 1 conductivity type The inventor of the present invention has discovered that lattice defects occur at a high density in wafer 4, and that heavy metal impurities thermally diffused into the wafer are gettered. Therefore, the surface layer 4 of the 1-conductivity type semiconductor layer in which the heavy metal impurities have been gettered is removed using a wet method, a reactive dry etching method, or a mechanical removal method, as shown in FIG. 1(b). If selectively removed, heavy metal impurities are removed, and therefore an excellent device-specific semiconductor device with low leakage current can be formed.

In FIG. 1, 1 is a semiconductor wafer of the opposite conductivity type, and 2 is a field oxide film.

〔Example〕

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for removing heavy metal impurities according to an embodiment of the present invention will be described below with reference to the drawings, taking as an example the case where a p-channel field effect transistor is formed on a p-type silicon wafer.

Referring to FIG. 2(a), a field oxide film 2 for element isolation is formed to a thickness of 6,000 wafers on a p-type silicon wafer 1 using the LOCO3 method.

Refer to FIG. 2(b) Thermal oxide film 5 is used to protect the semiconductor layer during ion implantation.
was formed to a thickness of 200 mm, and arsenic ions were implanted at an energy of 8
The n1 type semiconductor layer 3 is formed by ion implantation at 0 KeV and a dose of 4×10"cm-".

See Figure 2(c) Protective oxidation! 15 was removed and arsenic ions were implanted at an energy of 40 KeV and a dose of I x 10"cm-
ion implantation to form an n'' type semiconductor layer with a thickness of about 10 nm on the surface layer 4 of the n'' type groove conductor layer 3.

Refer to FIG. 2(d).
The surface layer 4 of the n'' type is etched and removed by immersion in fluoronitric acid mixed at a ratio of 0.025:40 at room temperature (25°C) for 5 minutes. Etching speed ratio is 1
Since the ratio is 6:1, when removing the 10 nm thick n'' type surface layer 4, the field oxide film 2 is etched by only about 6 people and is hardly affected. Since the etching rate ratio between the layer 4 and the n'' type groove conductor layer 3 is 10':1, the etching will automatically start when the n'' type semiconductor layer 4 is removed and the etching reaches the n'' type groove conductor layer 3. As the wet etching solution, in addition to the above-mentioned fluoronitric acid, caustic potash, a mixed solution of aqueous ammonia and aqueous hydrogen peroxide, etc. can be used.

Hereinafter, although not shown, a well-known method is used to form a gate oxide film and a gate electrode. Using the gate electrode as a mask, impurity boron is ion-implanted to form a p-type source/drain, and then a p-type source/drain is formed. forming an electrode and p
Completes the channel type field effect transistor.

See Figure 3. Figure 3 is a graph showing the relationship between the peripheral length per unit area of the element and the junction leakage current density. The graph indicated by A in the figure is the measurement result of an element manufactured by removing heavy metal impurities using the method according to the present invention, and compared with the junction leakage current density of the element according to the conventional technology indicated by B in the figure. For example, the peripheral length relative to the area is 850.
In the case of cm"', the reduction was as much as 40%.

In addition to the wet etching method described above, a reactive dry etching method using carbon tetrafluoride, carbon tetrachloride, etc. as a reactive gas can be used to remove the n + - type surface layer 4, which is the gettering region. Mechanical methods such as mechanochemical polishing using a mixture of silicon dioxide powder and aqueous ammonia may also be used.

[Effects of the Invention] As explained above, in the method for manufacturing a semiconductor device according to the present invention, impurities of one conductivity type are shallowly introduced at a high concentration into the surface layer of a semiconductor layer of one conductivity type, and thermal diffusion is carried out into the wafer. Since the heavy metal impurities that are present in the active region are gettered to this surface layer and then this surface layer is selectively removed, the heavy metal impurities that are the center of the generation-both bonds are removed from the active region of the semiconductor device and are removed from the edge portion of the field oxide film. Since the generation of leakage current from the semiconductor device is suppressed, it is possible to miniaturize the semiconductor device and improve the degree of integration without adversely affecting the device characteristics.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining the principle of the present invention. FIG. 2 is a process diagram of a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 3 is a graph showing the relationship between leakage current density and peripheral length/area of the present invention. FIG. 4 is a diagram showing the diffusion of heavy metal impurities attached to the wafer surface due to a thermal process. FIG. 5 is a graph showing the relationship between leakage current density and peripheral length/area in the prior art. DESCRIPTION OF SYMBOLS 1... Semiconductor wafer, 2... Field oxide film, 3... 1 conductivity type semiconductor layer (n' type), 4... Surface layer (
n°゛ type), ・Oxide film.

Claims (1)

[Scope of Claims] [1] Directly introducing the impurity of the first conductivity type into the surface layer (4) of the semiconductor layer (3) of the first conductivity type at a high concentration and subjecting it to heat treatment, A method for manufacturing a semiconductor device, comprising the step of removing the surface layer (4) in which conductive type impurities are present. [2] The element to be introduced is selected from the group of arsenic, boron, phosphorus, and antimony, and the thickness of the surface layer (4) into which the impurity is introduced is 100 to 200 Å. The method for manufacturing a semiconductor device according to item [1]. [3] The method for manufacturing a semiconductor device according to claim 1 or [2], wherein the method for removing the surface layer (4) is a wet method. [4] The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the method for removing the surface layer (4) is a reactive dry etching method. [5] The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the method for removing the surface layer (4) is a mechanical removal method.