JPH0414320A - Transmission power amplifier circuit - Google Patents

Transmission power amplifier circuit

Info

Publication number
JPH0414320A
JPH0414320A JP11712490A JP11712490A JPH0414320A JP H0414320 A JPH0414320 A JP H0414320A JP 11712490 A JP11712490 A JP 11712490A JP 11712490 A JP11712490 A JP 11712490A JP H0414320 A JPH0414320 A JP H0414320A
Authority
JP
Japan
Prior art keywords
voltage
amplifier
control voltage
output
transmission power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11712490A
Other languages
Japanese (ja)
Inventor
Tatsuo Ishizu
石津 達雄
Yasuo Kikuchi
菊池 康雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Denki Electric Inc
Original Assignee
Kokusai Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Co Ltd filed Critical Kokusai Electric Co Ltd
Priority to JP11712490A priority Critical patent/JPH0414320A/en
Publication of JPH0414320A publication Critical patent/JPH0414320A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Transmitters (AREA)

Abstract

PURPOSE:To decrease output power fluctuation even to a burst signal by providing a sample-and-hold circuit between a DC amplifier and a variable attenuator so as to suppress the transient characteristic of a leading of a control voltage. CONSTITUTION:A sample-and-hold circuit 6 is provided between a DC amplifier 5 and a variable attenuator 6. The circuit 6 outputs its input signal as it is when a sampling pulse (f) is at an H level and latches and outputs a voltage just before the input gets to an L level when the sampling pulse (f) is at an L level. When an input signal (a) is inputted, an output waveform l of an amplifier 5 is a waveform with voltage fluctuation and since the signal l is held by the circuit 6 by using the pulse (f), a control voltage (g) of an attenuator (electronic attenuator) 1 is almost a constant voltage. Since a control voltage just before the intermittent part is kept even to the input having large voltage fluctuation in existence therein, a voltage change to be controlled in following to a new voltage is decreased, the transient phenomenon of the leading is suppessed and an output signal (h) with less output voltage fluctuation is outputted.

Description

【発明の詳細な説明】 (発明の属する技術分野) 本発明は送信出力かバースト信号の形で間欠的に送信さ
れる送信機、例えば周波数ホッピング方式の送信機で周
波数切替時に送信出力を断とする方式の送信機や時分割
多重マルチアクセス方式の通信を行う送信機の送信電力
増幅回路に関するものである。
Detailed Description of the Invention (Technical Field to Which the Invention Pertains) The present invention relates to a transmitter that transmits intermittently in the form of a transmission output or burst signal, such as a frequency hopping transmitter, in which the transmission output is cut off when switching frequencies. The present invention relates to a transmission power amplification circuit for a transmitter that performs communication using a time division multiplexing multiple access method or a transmitter that performs communication using a time division multiplexing multiple access method.

(従来技術とその問題点) 第1図は通常の送信電力増幅回路のブロック図である。(Prior art and its problems) FIG. 1 is a block diagram of a normal transmission power amplification circuit.

第1図において、1は制御電圧によって減衰量か変化す
る可変減衰器(電子アッテネータ)、2は高周波電力増
幅器、3は方向性結合器、4は検波器、5は直流増幅器
である。
In FIG. 1, 1 is a variable attenuator (electronic attenuator) whose attenuation varies depending on the control voltage, 2 is a high frequency power amplifier, 3 is a directional coupler, 4 is a detector, and 5 is a DC amplifier.

入力信号は、電子アッテネータ1を通り高周波電力増幅
器2で増幅され出力信号となる。この時、方向性結合器
3で出力信号の一部を取り出し検波器4で検波すること
により出力信号レベルに応じた直流電圧か得られる。こ
の直流電圧を増幅して電子アッテネータ1の制御電圧と
する。このようにして、電子アッテネータ1の減衰量か
出力レベルにより制御されるフィードバックループか構
成され、送信電力を一定に保つように制御することかで
きる。
An input signal passes through an electronic attenuator 1 and is amplified by a high frequency power amplifier 2 to become an output signal. At this time, a part of the output signal is taken out by the directional coupler 3 and detected by the detector 4, thereby obtaining a DC voltage corresponding to the output signal level. This DC voltage is amplified and used as a control voltage for the electronic attenuator 1. In this way, a feedback loop controlled by the attenuation amount or output level of the electronic attenuator 1 is constructed, and the transmission power can be controlled to be kept constant.

この回路に入力信号としてバースト状の信号波を入力し
た時の各部の波形を第2図に示す。第2図において、a
は入力信号、bは電子アッテネータの制御電圧、Cは出
力信号を示す。aに示すような波形が入力された場合、
検波器4と直流増幅器5の時定数のため、電子アッテネ
ータ1の制御電圧はbに示すように立上り部分に鋭いピ
ークを持つ波形となる。このため、出力信号もCに示す
ように立上り部分て出力電力の過渡特性か大きく変動す
る信号となってしまう。
FIG. 2 shows the waveforms of various parts when a burst signal wave is input to this circuit as an input signal. In Figure 2, a
is the input signal, b is the control voltage of the electronic attenuator, and C is the output signal. If the waveform shown in a is input,
Due to the time constants of the wave detector 4 and the DC amplifier 5, the control voltage of the electronic attenuator 1 has a waveform with a sharp peak at the rising edge, as shown in b. For this reason, the output signal also becomes a signal in which the transient characteristics of the output power fluctuate greatly during the rising portion, as shown in C.

この立上り部分の出力電力の変動は、検波器4と直流増
幅器5の時定数を長くすることにより小さくすることは
できるか、この場合、立上り部分で出力電圧か遅く変化
するため、規定の出力電力に達するまでに時間がかかり
バースト信号用の電力増幅器としては使用てきないとい
う欠点かある。
Is it possible to reduce the fluctuation in output power during this rising portion by lengthening the time constants of the detector 4 and DC amplifier 5? In this case, since the output voltage changes slowly during the rising portion, the specified output power The drawback is that it takes a long time to reach this point, so it cannot be used as a power amplifier for burst signals.

(発明の目的) 本発明の目的は、前記の欠点を除去し、バースト信号に
対しても出力電力変動の小さいバースト信号用の送信電
力増幅回路を提供することにある。
(Object of the Invention) An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a transmission power amplification circuit for burst signals with small output power fluctuations even for burst signals.

(発明の構成および作用) 本発明は、従来回路の直流増幅器5と可変減衰器1の間
にサンプルアンドホールド回路を設けて制御電圧の立上
り部分の過渡特性を抑圧しバースト信号に対する出力変
動を小さくしたものである。
(Structure and operation of the invention) The present invention provides a sample-and-hold circuit between the DC amplifier 5 and the variable attenuator 1 of the conventional circuit to suppress the transient characteristics of the rising portion of the control voltage and reduce the output fluctuation with respect to the burst signal. This is what I did.

第3図は本発明の実施例を示すブロック図であり、第4
図はその各部の波形図である。第3図において、制御電
圧により減衰量か変化する電子アッテネータl、高周波
電力増幅器2.方向性結合器3.検波器4.直流増幅器
5は従来回路と同じであり、6はサンプルアンドホール
ド回路である。
FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG.
The figure is a waveform diagram of each part. In FIG. 3, an electronic attenuator 1 whose attenuation varies depending on the control voltage, a high frequency power amplifier 2. Directional coupler 3. Detector 4. The DC amplifier 5 is the same as the conventional circuit, and 6 is a sample-and-hold circuit.

第4図において、aは入力信号、eは直流増幅器5の出
力波形、fはサンプリングパルス、gはサンプルアンド
ホールド回路6の出力波形、hは出力信号を示す。
In FIG. 4, a shows the input signal, e shows the output waveform of the DC amplifier 5, f shows the sampling pulse, g shows the output waveform of the sample-and-hold circuit 6, and h shows the output signal.

サンプルアンドホールド回路6は、サンプリングパルス
fがHの時は入力をそのまま出力し、Lの間(第4図中
i)はLとなる直前の電圧を保持して出力する。
The sample-and-hold circuit 6 outputs the input as it is when the sampling pulse f is H, and holds and outputs the voltage just before it becomes L during the L period (i in FIG. 4).

第4図aに示す入力信号か入力された時、直流増幅器5
の出力波形はeに示すように電圧変動のある波形となる
。この信号はサンプルアンドホールド回路6においてサ
ンプリングパルスfによりホールドされるため、電子ア
ッテネータ1の制御電圧はgに示すようにほぼ一定電圧
となる。
When the input signal shown in FIG. 4a is input, the DC amplifier 5
The output waveform of is a waveform with voltage fluctuations as shown in e. Since this signal is held by the sampling pulse f in the sample-and-hold circuit 6, the control voltage of the electronic attenuator 1 becomes a substantially constant voltage as shown by g.

このようにしてバースト信号のように大きな電圧変動の
ある入力に対しても間欠部分の直前の制御電圧がホール
ドされているので、新たに出力電圧に追従して制御する
電圧変化か小さくなり、立上り部分の過渡現象が抑圧さ
れ出力信号はhに示すように出力電圧変動の少ないもの
が得られる。
In this way, even for inputs with large voltage fluctuations such as burst signals, the control voltage immediately before the intermittent part is held, so the voltage change that is controlled to follow the new output voltage becomes smaller and the rise Transient phenomena are suppressed, and an output signal with small output voltage fluctuations can be obtained as shown in h.

電子アッテネータlはダイオード等で簡単に実現するこ
とができる。また、これを可変利得増幅回路に置き換え
てもよい。
The electronic attenuator l can be easily realized using a diode or the like. Further, this may be replaced with a variable gain amplifier circuit.

このようにして、本発明によりバースト入力信号に対し
ても電力変動の少ない送信電力増回路を実現することか
できる。
In this way, according to the present invention, it is possible to realize a transmission power increasing circuit with little power fluctuation even for burst input signals.

(発明の効果) 本発明を実施することにより、送信出力か断続するよう
なバースト信号に対して電力変動の少ない送信電力制御
回路を実現することができるため、時分割多重マルチア
クセス方式や周波数ホッピング方式の送信電力増幅回路
として著しい効果かある。
(Effects of the Invention) By implementing the present invention, it is possible to realize a transmission power control circuit with little power fluctuation for burst signals where the transmission output is intermittent. This method has a remarkable effect as a transmission power amplification circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の送信電力増幅回路の例を示すブロック図
、第2図は第1図の各部波形図、第3図は本発明の実施
例を示すブロック図、第4図は第3図の各部波形図であ
る。 1・・・可変減衰器、 2・・・高周波電力増幅器、3
・・・方向性結合器、 4・・・検波器、 5・・・直
流増幅器、  6・・・サンプルアンドホールド回路。 第 図 給2図 第3図 蛸4図 ■
FIG. 1 is a block diagram showing an example of a conventional transmission power amplification circuit, FIG. 2 is a waveform diagram of each part of FIG. 1, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. It is a waveform diagram of each part. 1... Variable attenuator, 2... High frequency power amplifier, 3
...Directional coupler, 4. Detector, 5. DC amplifier, 6. Sample and hold circuit. Fig. 2 Fig. 3 Fig. 4 Fig. 4■

Claims (1)

【特許請求の範囲】 バースト状の高周波信号が縦続に接続された可変減衰器
と送信電力増幅器に入力され、該送信電力増幅器から送
出される送信出力に応じた検出信号が検波されて直流増
幅器により増幅されるとともに所定の電圧と比較され該
所定の電圧と異なるとき制御電圧を前記可変減衰器に与
えて前記送信出力の変動を抑圧するように前記可変減衰
器を制御する送信電力増幅回路において、 前記直流増幅器と前記可変減衰器との間に接続され前記
バースト状の高周波信号の立上り過渡現象を軽減するた
めにサンプリングパルスがあるときは入力される前記制
御電圧をそのまま出力し、前記サンプリングパルスがな
いときは入力される前記制御電圧が直前の値に保持され
た制御電圧として出力するサンプルアンドホールド回路
を備えたことを特徴とする送信電力増幅回路。
[Claims] A burst high-frequency signal is input to a variable attenuator and a transmission power amplifier that are connected in series, and a detection signal corresponding to the transmission output sent out from the transmission power amplifier is detected and sent to a DC amplifier. A transmission power amplifier circuit that controls the variable attenuator so as to be amplified and compared with a predetermined voltage, and when different from the predetermined voltage, to apply a control voltage to the variable attenuator to suppress fluctuations in the transmission output, It is connected between the DC amplifier and the variable attenuator to output the inputted control voltage as is when there is a sampling pulse in order to reduce the rising transient phenomenon of the burst-like high frequency signal. A transmission power amplification circuit comprising a sample-and-hold circuit that outputs the input control voltage as a control voltage held at the previous value when the control voltage is not present.
JP11712490A 1990-05-07 1990-05-07 Transmission power amplifier circuit Pending JPH0414320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11712490A JPH0414320A (en) 1990-05-07 1990-05-07 Transmission power amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11712490A JPH0414320A (en) 1990-05-07 1990-05-07 Transmission power amplifier circuit

Publications (1)

Publication Number Publication Date
JPH0414320A true JPH0414320A (en) 1992-01-20

Family

ID=14704029

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11712490A Pending JPH0414320A (en) 1990-05-07 1990-05-07 Transmission power amplifier circuit

Country Status (1)

Country Link
JP (1) JPH0414320A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5136812A (en) * 1974-09-24 1976-03-27 Fujitsu Ltd JIDOSHUTSURYOKUCHOSEIHOSHIKI
JPS5136813A (en) * 1974-09-24 1976-03-27 Fujitsu Ltd JIDOSHUTSURYOKUCHOSEIHOSHIKI

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5136812A (en) * 1974-09-24 1976-03-27 Fujitsu Ltd JIDOSHUTSURYOKUCHOSEIHOSHIKI
JPS5136813A (en) * 1974-09-24 1976-03-27 Fujitsu Ltd JIDOSHUTSURYOKUCHOSEIHOSHIKI

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