JPH04143833A - Timer circuit for microcomputer - Google Patents

Abstract

PURPOSE:To set the count initial value to a reload register of a timer with the small software load by deciding the timing of transfer for holding the count initial value in the reload register of the timer with use of a count overflow signal of another timer, etc., in terms of hardware. CONSTITUTION:Plural data serving as the count initial value held in a reload register 3 are previously held in the registers 121-123. A data selection circuit 11 transfers the data stored in one of registers 121-123 to the register 3 as the count initial value. This transfer timing is decided by a data setting timer in terms of hardware. Thus one of plural data is transferred to the register 3 from the registers 121-123 by the circuit 11 as the count initial value. Based on this count initial value, the next counting operation of a counter is carried out. Thus it is possible to reduce to software load when the data are set to the register 3 which forms a timer for a microcomputer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a timer circuit provided in a microcomputer.

[Conventional technology]

A microcomputer is usually equipped with various timers, and various internal controls are performed according to the timing results of these timers.

FIG. 3 is a diagram showing an example of a conventional configuration of such a timer for a microcomputer.

In FIG. 3, counter 2 and reload register 3
Timer 1 is configured as follows.

The reload register 3 inputs and holds data given by software from the data bus 6 outside the timer 1.

The counter 2 is provided with the data held in the above-mentioned reload register 3 as a counting initial value at a timing as will be described later, and is also provided with a counting lock 4. Then, the counter 2 performs a down count of sequentially subtracting the clock 4 from the initial count value. counter 2
When the count value of is counted down to "0" and the count overflow occurs, the counter 2 outputs the count overflow signal 5. This count overflow signal 5
By outputting , various controls within the microcomputer are performed.

Note that the period until the count value of the counter 2 is counted down from the initial count value to "0" is defined as "one count period". Then, data bus 6 is transferred to reload register 3.
By setting the data in advance in software via .

The operation of such a conventional microcomputer timer is as follows. Incidentally, FIG. 4 is a timing chart showing its operating state.

First, the data currently held by the reload register 3 as the initial count N value is “000” as shown in fd+ in FIG.
38" (H represents hexadecimal data). Also, as shown in FIG. 4 [8], counter 2 counts the rising edge of the pulse of clock 4 and counts down by "1". Then, the counter 2 is
As shown in l (, if the own count value is “01”, 00008
When the count reaches ', a count overflow signal 5 is output as shown in FIG. 4 (fe). After this, a new count period starts from the rising edge of the next pulse of clock 4, but during the previous count period, the data held in reload register 3 is changed to "0003H" by software.
Since this data has been reset to "0002H", the initial count value for one count cycle that starts anew when this data is transferred from reload register 3 to counter 2 is "0002".
It becomes 1″.

[Problem to be solved by the invention]

In this way, conventional microcomputer timers
When changing the initial count value while continuously performing counting operations, the count IJiI whose initial count value should be changed is
It is necessary to reset the data held in the reload register 3 using software during the count 1 dark period immediately before the period. However, in order to improve the performance of microcomputers, especially for high-speed operation, the clock frequency of the original oscillation that operates microcomputers tends to gradually increase, and as a result, the period of the clock that is counted by the timer becomes shorter, and therefore The actual time for the 1111th period also tends to be shorter. For this reason, it is necessary to set data in the reload register 3 in a very short real time during software execution within the microcomputer, increasing the burden on the software.

The present invention was made in view of these circumstances, and
The purpose of the present invention is to provide a timer circuit that reduces the burden on software for setting data to a reload register constituting a timer for a microcomputer.

Means for Solving CIJIN) In the microcomputer timer circuit of the present invention, a plurality of data as count initial values to be held in a reload register are held in a plurality of registers in advance, and a data selection circuit selects these data. The data setting timer is configured to determine in hardware the timing at which data is transferred from one of the plurality of registers to the reload register as a counting initial value.

[Effect]

In the microcomputer timer circuit of the present invention, any one of the plurality of data held in each of the plurality of registers in advance is transferred from the register to the reload register by the data selection circuit according to the timing determined by the hardware of the data setting timer. The next counting operation of the counter is performed based on this initial counting value.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to the drawings showing embodiments thereof.

FIG. 1 is a block diagram showing an example of the configuration of a timer circuit for a microcomputer according to the present invention.

In FIG. 1, a timer 1 consisting of a counter 2 and a reload register 3 is provided, which is similar to the conventional example whose configuration is shown in FIG.

The reload register 3 inputs and holds data given by software from the data bus 6 outside the timer 1.

The counter 2 is supplied with the data held in the above-mentioned reload register 3 as an initial count value at timings as will be described later, and is also supplied with a clock 4 for counting. Then, the counter 2 performs a down count of sequentially subtracting the clock 4 from the initial count value. counter 2
When the count value of is counted down to "0" and the count overflow occurs, the counter 2 outputs the count overflow signal 5. This count overflow signal 5
By outputting , various controls within the microcomputer are performed.

Reference numeral 7 is a data setting timer, and its internal configuration is the same as that of timer 1. That is, the data setting timer 7 includes a counter 72 for setting data and a reload register 73 for setting data.

The data setting counter 72 is supplied with a data setting clock 9, which will be described later, and counts this clock.
When the count overflows, a count overflow signal 10 for data setting is output.

Further, data is given to the reload register 73 for data setting via the data bus 6 using software. The data held in the reload register 73 for data setting is given to the counter 72 for data setting as the initial count value for data setting, and based on this value, the counter 72 for data setting Count clock 9.

Reference numeral 8 is a clock generation circuit, which generates a clock for the data setting timer 7 (hereinafter referred to as data setting clock) based on various signals within the microcomputer or signals given from outside the microcomputer.
9 is generated and given to the data setting timer 7. In addition,
The counter 72 of the data setting timer 7 counts down the data setting clock 9, and when a count overflow occurs, the data setting timer 7 outputs the count overflow signal 10, as in the case of the timer 1. .

In this embodiment, the clock generation circuit 8 generates the data setting clock 9 from the count overflow signal 5 of the timer 1.

Reference numeral 11 is a data selection circuit to which a plurality of registers (three in this embodiment) 121, 122, and 123 are connected. The data selection circuit 11 selects the three registers 121 and 122 each time the count overflow signal 10 output from the data setting timer 7 is input.
．． 123 is selected and its held contents are output to the reload register 3 in the timer 1 and held therein.

It should be noted that data as initial counting values are set in each of the three registers 121, 122, and 123 in advance by software via the data bus 6.

The operation of the microcomputer timer circuit of the present invention having such a configuration is as follows. Note that FIG. 2 is a timing chart for explaining the operation.

In this embodiment, as described above, the clock generation circuit 8 generates the clock 9 for data setting from the count overflow signal 5 of the timer 1, and as shown in FIG. At the falling edge, the clock 9 for data setting changes.Additionally, registers 121, 122, and 123 each have “00” in turn.
It is assumed that the data of ``02H'', 100018'', and ``0003+1'' are set in advance by software via the data bus 6. Then, a significant (high level) count overflow signal 1 is sent from the data setting timer 7.
Each time 0 is output, register 121.122.123
are output to the reload register 3 in this order.

In addition, the data 0OOOH'' is set in the reload register 73 for data setting via the data bus 6 (Fig. 2 (r+)) - Therefore, the clock 9 for data setting is applied to the data setting timer 7. Every time you are
The data setting counter 72 overflows the current and outputs a count overflow signal lO.

The basic operation described above will be explained with reference to the timing chart of FIG.

First of all, the timer 1 is activated by the count overflow signal 10 output by the data setting timer 7, and the data selection circuit 11 selects the register 121 which is given to the reload register 3.
The counting operation is executed using the held data "0002B" as the initial counting value (FIG. 2(b)).

During this counting operation, the data selection circuit 11 transfers the data "0OOIH" held in the register 122 to the reload register 3 in response to the count overflow signal 10 (21st m(g)) output by the data setting timer 7 (see FIG. fd+＞.

Therefore, due to a count overflow at the end of one counting period with data "000211" as the initial counting value, the initial counting value of the next counting period is set to °0001.
B" is set in counter 2 of timer 1 (Figure '12 (
bl), and due to this count overflow, the data setting clock 9 of the data setting timer 7 (Fig. 2 (e)
) changes, the output of the count overflow signal 10 for data setting is stopped, and the data selection circuit 11 no longer outputs data to the reload register 3. Therefore, the reload register 3 holds the data "000111".

Then, the data setting timer 7 is reset again by the count overflow signal 5 output from the counter 2 of the timer l.
As the data setting clock 9 changes, the data setting count overflow signal IO is output (changed from low level to high level), and the data selection circuit 11 transfers the data "0003B" held in the register 123 to the reload register 3. be done. Therefore, timer 1 is set to °0003H as the initial count value for the next count 1IIIiI period.
” is sent, and then timer 1 performs a counting operation.

In the above embodiment, the clock generation circuit 8 generates the clock 9 for data setting based on the count overflow signal 5 of the timer 1, but instead, for example, the clock for data setting is generated by the output of a real-time timer. 9
By generating , it becomes possible to use a microcomputer built into an electric appliance to make the initial counting value of a timer different in the morning and afternoon within a day.

〔Effect of the invention〕

As described in detail above, according to the timer circuit for a microcomputer of the present invention, the timing for transferring the count initial value to the reload register of the timer is determined by the hardware, for example, by a signal such as a count overflow signal of another timer. Since the initial value is determined based on the timer's reload register, it is possible to set the initial count value in the timer reload register with less burden on the software and at short intervals in real time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a timer circuit for a microcomputer according to the present invention, FIG. 2 is a timing chart for explaining its operation, and FIG. 3 is a block diagram showing the configuration of a conventional timer for a microcomputer. FIG. 4 is a timing chart for explaining the operation. 1...Timer 2...Counter 3...Reload register 4...Clock 5...Count overflow signal 7...Data setting timer
8... Clock generation circuit 9... Clock for data setting 10... Count overflow signal for data setting 11... Data selection circuit 72...
- Counter for data setting 73... Reload register for data setting 121.122.123...
Registers In the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa Diagram (8) Clock 4 ]! L] Ding U Yu! Actually. ) Count overflow signal 5 122''1222 Fig.

Claims (1)

[Claims] (1) A microcomputer equipped with a reload register that holds data as an initial count value, and a counter that counts a predetermined value by counting clock pulses based on the initial count value held by the reload register. In a computer timer circuit, a plurality of registers each hold a plurality of data to be held in the reload register, and data is transferred from any of these registers to the reload register and held as an initial count value. 1. A timer circuit for a microcomputer, comprising: a data selection circuit; and a data setting timer that determines the timing of data transfer by the data selection circuit based on a predetermined signal.