JPH04144113A - Manufacture of silicon on insulator board - Google Patents

Abstract

PURPOSE:To increase adhesive strength for the prevention of exfoliation and for the increase of the yield, by burying polycrystalline silicon layers in grooves formed in the first semiconductor wafer and flattening them, by forming the third insulating film all over the surfaces after that using a CVD method, and by sticking this to the second semiconductor wafer together after grinding. CONSTITUTION:On the surface of the first single crystalline silicon wafer 1, the first silicon dioxide film 2 is formed, and besides grooves 3 are formed. On the first silicon dioxide film 2 including them the second silicon dioxide film 4 is formed, and a polycrystalline silicon layer 5 is formed on it. And parts of the polycrystalline silicon layer 5 are left unremoved only in the grooves 3 by grinding it, and the surface of the first single crystalline silicon wafer 1 is flattened. Next, on it the third silicon dioxide film 6 is formed by a CVD method, the surface is smoothed by grinding, and on this surface the second single crystalline silicon wafer 7 is put and stuck. Next, the first single crystalline silicon wafer 1 is ground using the second silicon dioxide film 4 as a stopper, and an ultra thin-film SOI board having silicon active layers 11 is formed.

Description

[Detailed Description of the Invention] [Summary] Regarding the improvement of the manufacturing method of a bonded ultra-thin film silicon-on-insulator substrate (hereinafter referred to as SO1 substrate), the adhesive strength between a first semiconductor wafer and a second semiconductor wafer is increased. This prevents peeling and allows for ultra-thin lamination with a high yield! The purpose of the present invention is to provide a method for manufacturing an 15O1 substrate, which includes forming a first insulating film on a first semiconductor wafer, and forming a groove in the first semiconductor wafer on which the first insulating film is formed. A second groove is formed at the bottom of this groove.
An insulating film is formed, and a polycrystalline semiconductor layer is filled in the remaining region of the trench in which the second insulating film is formed.
A second semiconductor wafer is layered and bonded onto the flattened first semiconductor wafer /λ, and the second semiconductor wafer is bonded to the first semiconductor wafer using the second insulating film as a stopper. In the method of manufacturing a silicon-on-incillator substrate, the second semiconductor wafer is overlaid on the planarized first semiconductor wafer, and the second semiconductor wafer is overlaid on the planarized first semiconductor wafer. Prior to the bonding step, a third insulating film is formed on the planarized first semiconductor wafer, and this third insulating film is polished.

[Industrial application field]

The present invention is a laminated super FHP! This invention relates to an improvement in a method for manufacturing a Sol substrate.

[Prior Art] A Sol substrate has the characteristics that it is easier to separate elements than a bulk substrate, and the characteristics of the formed elements are also excellent. Lamination S among Sol substrates
OT substrates are attracting attention because they can take advantage of bulk crystallinity.

In order to manufacture the bonded Sol substrate, first the steps shown in Figure 2 (a
), the surface is thermally oxidized! The single crystal silicon wafer 1 shown in FIG. 2 (there are variations in thickness) and the support substrate 7 shown in FIG. 2 (b) (there are variations in thickness)
They are superimposed and bonded together as shown in FIG. 2(c). Note that, for consistency with conventional LSI processes, a single-crystal silicon wafer is usually used for the support substrate 7 as well.

Further, a thermal oxide film may also be formed on the support substrate 7 in some cases.

After bonding the single crystal silicon wafer 1 and the support substrate 7 together, the single crystal silicon wafer 1 is polished to become a thin film, as shown in FIG.
form 1.

Among So I and I plates, molded @sor substrates have recently been used which are ultra-thin and have a soric active layer thickness of 0.3 nm or less.

In order to manufacture such a super FilI ISOI substrate, it is necessary to suppress the in-plane variation in the thickness of the silicon active layer 11 to be smaller than the variation in the thickness of the support substrate 7.
As shown in FIG. 2(d), it is impossible to reduce the size of the silicon active layer 11 to 111M using backside-based grinding or polishing techniques.

Therefore, the following method for manufacturing an ultra-thin Sol substrate was developed. As shown in Figure 3-1(a), it is the first
The surface of the single crystal silicon wafer 1 is thermally oxidized to form a first silicon dioxide film 2, and this first silicon dioxide Wa2 is buttered to form a part of the silicon dioxide film 2 as shown in FIG. and then the removed area of the first silicon dioxide film 2 of the first single crystal silicon wafer 1
As shown in the figure (C), a trench 3 is formed by etching. Next, as shown in the figure (d), a second silicon dioxide film 4 and a polycrystalline film are formed using the CVD method. Silicon II
5 are sequentially formed, the polycrystalline silicon layer 5 is polished to planarize the surface by leaving the polycrystalline silicon layer 5 only in the groove 3, as shown in FIG. 3-2(e). do. Note that to planarize the surface, a polishing method that polishes the polycrystalline silicon layer but does not polish the silicon dioxide film is used, such as mechanochemical polishing that uses a polishing agent containing colloidal silica in an aqueous amine solution. Next, as shown in FIG. Single crystal silicon wafer 7
are stacked on top of each other and heated to adhere them to each other. In addition, the third-
In FIG. 2(e) and FIGS. 3-2(f), (g), and (h), the first single crystal silicon wafer l is shown upside down. Next, as shown in the figure (g), the first single crystal silicon wafer 1 is ground to reduce its thickness, and then, as shown in the figure (h), a groove is formed at the bottom of the groove 3. The first single-crystal silicon wafer 1 is polished using the second silicon dioxide film 4 as a stopper to make it thinner, and an ultra-thin film S○ having an extremely thin silicon active layer 11 with a uniform thickness is obtained.
■Form the substrate.

[Problem to be solved by the invention]

However, when the width of the groove 3 is increased, as shown in Fig. 3-2 (e)
As shown in FIG. 2, it is difficult to completely flatten the surface by leaving the polycrystalline silicon layer 5 only in the grooves, and the polycrystalline silicon layer 5 formed on the first single crystal silicon wafer 1 and The bonding strength between the second single-crystal silicon wafer 7 and the second single-crystalline silicon wafer 7 is insufficient, and in the polishing process shown in FIG. is often peeled off from the second single crystal silicon wafer 7.

When the polycrystalline silicon layer 5 is peeled off, there is no second silicon dioxide film 4 that acts as a polishing stopper in the vicinity, so the first single-crystal silicon wafer 1 is polished to a uniform thickness of ml. become unable to do so. Moreover, the peeled off polycrystalline Noricon layer 5 etc. may be mixed into the polishing agent and wipe the surface of the silicon active layer 11, or may adhere to the surface of the silicon active layer 11 and remain without being removed even if it is washed.
This reduces the manufacturing yield of SO+ substrates and devices formed thereon.

The purpose of the present invention is to eliminate this drawback.
It is an object of the present invention to provide a method for manufacturing a bonded ultra-thin film SO2 substrate with a high yield by increasing the adhesive strength between a semiconductor wafer and a second semiconductor wafer, thereby preventing the occurrence of peeling.

[Means to solve the problem]

The above purpose is to form a first insulating film (2) on a first semiconductor wafer (1), and to remove the first semiconductor wafer (1) on which the first insulating film (2) is formed. A groove (3) is formed in the groove (3), a second insulating film (4) is formed at the bottom of the groove (3), and the second insulating film (4) is formed in the groove (3).
A polycrystalline semiconductor layer (5) is buried in the remaining area of step 3) to planarize the first semiconductor wafer (1), and a second semiconductor layer is placed on the planarized first semiconductor wafer (1). The wafers (7) are stacked and bonded, and the first semiconductor wafer (1) is selectively polished using the second insulating film (4) as a stopper to reduce its thickness. In the method for manufacturing a silicon-on-insulator substrate, prior to the step of overlapping and bonding the second semiconductor wafer (7) on the flattened first semiconductor wafer (1), the flattened This is achieved by a method for manufacturing a silicon-on-insulator substrate comprising the steps of forming a third insulating film (6) on a first semiconductor wafer (1) and polishing the third insulating film (6). . Note that the step of forming the third insulating film (6) is as follows:
Preferably, this is done using a CVD method.

[Function] In the method for manufacturing a silicon-on-insulator substrate according to the present invention, after burying and planarizing the polycrystalline silicon layer 5 in the groove 3 formed in the first semiconductor wafer 1, a CVD method is used. a third insulating film 6 is formed on the entire surface,
Since this third insulating film 6 is polished and then bonded to the second semiconductor wafer 7, the polycrystalline silicon layer is not exposed on a part of the bonded surface, and the surface of the insulating film 6 is polished. Since it can be completely smoothed, the entire area of the bonded surfaces can be partially bonded under the same conditions, which prevents localized adhesive strength from decreasing and causing peeling.

(Example) Hereinafter, a method for manufacturing a silicon-on-insulator substrate according to an example of the present invention will be described with reference to the drawings.

Refer to FIG. 1-1(a), the surface of the first single crystal silicon wafer 81 is thermally oxidized to form a first silicon dioxide film 2 to a thickness of 100n-.

Referring to FIG. 1-1(b), the first silicon dioxide film 1112 is patterned and removed from the groove forming region, and then the first silicon dioxide film 2 is removed.
A trench 3 having a depth of 200n- is formed by etching the first single-crystal silicon wafer 1 in the area where the etching is removed.

Refer to FIG. 1-1(c). Using the CVD method, a second silicon dioxide film 4 with a thickness of 200 nm is formed on the first silicon dioxide 1!2 including the inside of the trench 3. A polycrystalline silicon layer 5 having a thickness of 500 nm is formed thereon using the CVD method.

Refer to FIG. 1-1(d) The polycrystalline silicon layer 5 is polished using a polishing tool made by mixing colloidal silica in an aqueous solution of amine, and is removed from the area excluding the inside of the groove 3. only polycrystalline silicon layer 5
remains, and the surface of the first single crystal silicon wafer 1 is flattened.

Referring to FIG. 1-2(e), a CVD method is used to deposit a 20 mm thick silicon dioxide film 4 on the second silicon dioxide film 4 including the polycrystalline solicon layer 5 remaining in the groove 3.
A third silicon dioxide film 1l16 having a thickness of 0 nm is formed, and then the surface of the third silicon dioxide film 6 is polished and smoothed using an abrasive mainly composed of colloidal silica or the like.

Refer to FIG. 1-2(f) A second single crystal silicon wafer 7 is formed on the third silicon dioxide film 6 formed on the first single crystal silicon wafer 1.
are placed one on top of the other and heated to a temperature of 1,100°C to bond them together. Note that an oxide film may be formed on the surface of the second single-crystal silicon wafer 7 before bonding.

In addition, Figure 1-2 (e) and Figure 1-2 (f) (g) (h
), the first single crystal silicon wafer 1 is depicted upside down.

Refer to FIG. 1-2(g), a first single-crystal silicon wafer l is prepared with a thickness of approximately 0.0 mm.
Grind until it becomes 5n.

Refer to Figure 1-2 (h).
The first single-crystal silicon wafer 1 is polished using the second silicon dioxide film 4 formed at the bottom of the groove 3 as a stopper using a ferrule, and a silicon active layer having a film thickness of 200n±16n- is formed. Ultra-thin 1?1sO11fE with 11
Form a board.

〔Effect of the invention〕

As explained above, in the method for manufacturing a silicon-on-insulator substrate according to the present invention, the entire surface of the first semiconductor wafer including the polycrystalline semiconductor layer embedded in the groove formed in the first semiconductor wafer is A third insulating film is formed in the area, and after this third insulating film is polished, it is attached to the second semiconductor wafer and bonded to each other, so that the polycrystalline semiconductor layer is exposed in a part of the bonding surface. Since the entire surface is bonded uniformly under the same conditions, there is no possibility of localized delamination due to low adhesive strength, which improves the manufacturing yield of SOI substrates and makes it easier to use SO1 substrates. This greatly contributes to improving the manufacturing yield of LSIs manufactured using the same technology.

[Brief explanation of drawings]

1-1 and 1-2 are process diagrams of a method for manufacturing a silicon-on-insulator substrate according to an embodiment of the present invention. FIG. 2 is a process explanatory diagram of the SOI substrate. 3-1 and 3-2rEJ are process diagrams of a method of manufacturing a silicon-on-insulator substrate according to the prior art. 11. First semiconductor wafer (first single crystal silicon wafer), first insulation II! (first silicon dioxide film) trench, second insulation H (second silicon dioxide film) polycrystalline semiconductor layer (polycrystalline 21137 layer), third insulation film (third silicon dioxide film) second Semiconductor wafer (second single crystal silicon wafer), silicon active layer.

Claims (1)

[Claims] [1] A first insulating film (
2), forming a groove (3) in the first semiconductor wafer (1) on which the first insulating film (2) is formed, and forming a second insulating film at the bottom of the groove (3). (4), and filling the remaining region of the groove (3) in which the second insulating film (4) is formed with a polycrystalline semiconductor layer (5) to cover the first semiconductor wafer (1). A second semiconductor wafer (7) is superimposed and bonded on the flattened first semiconductor wafer (1), and the second semiconductor wafer (7) is bonded to the first semiconductor wafer using the second insulating film (4) as a stopper. A method for manufacturing a silicon-on-insulator substrate, comprising the step of selectively polishing a wafer (1) to reduce its thickness, wherein the second semiconductor wafer is placed on the planarized first semiconductor wafer (1). (7) Prior to the step of overlapping and bonding the planarized first semiconductor wafers (
1) A method for manufacturing a silicon-on-insulator substrate, comprising the steps of forming a third insulating film (6) thereon and polishing the third insulating film (6). [2] The step of forming the third insulating film (6) is a CV
The method for manufacturing a silicon-on-insulator substrate according to claim 1, characterized in that the method is performed using method D.