JPH04150352A - Bipolar signal output circuit for pcm communication equipment - Google Patents

Abstract

PURPOSE:To output a bipolar signal whose pulse duty factor is 50% by using a clock whose frequency is twice that of a clock to be used substantially even when any of clocks from several kinds of clock sources is in use to apply waveform shaping. CONSTITUTION:A PCM signal is inputted from a terminal 1, a clock extracted by a clock extraction circuit 2, and its level is converted by a level conversion circuit. The clock, an external clock inputted from a terminal 4 and a self- running clock of a PLL circuit 6 are selected by a clock selector 5. A 2-ary counter 7 frequency-divides the clock to obtain an operating clock fo and a multiplexer circuit 8 and a coding circuit 9 apply multiplexing and coding suitable for the transmission line. A waveform occupancy rate conversion circuit 10 applies conversion of a duty factor of 50%. Although the duty factor is not completely 50% by this processing only, the waveform shaped by a waveform shaping circuit 11 employing a D type FF and outputted to a transmission line has a duty factor of 50%.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a bipolar signal output circuit for a PCM communication device, and in particular to a bipolar signal output circuit for a PCM communication device, in which one of several types of clock sources is selected, and the pulse volunteer rate is set to 50% by the selected clock. The present invention relates to a bipolar signal output circuit.

[Conventional technology]

Conventionally, in a bipolar signal output circuit of a PCM communication device,
One of several types of clock sources is selected, and the selected clock is used to output the signal to the transmission line. In the previous stage, the logic between the output signal and the clock is calculated to create a waveform with a pulse participation rate of 50%, and a bipolar signal is sent to the transmission line. was outputting.

[Problems to be Solved by the Invention] In the bipolar signal output circuit of the conventional PCM communication device described above, the pulse oligopoly of the transmission line is caused by the delay of the digital signal due to variations in the pulse oligopoly rate of the clock source and the gate delay of the IC that performs bipolar conversion. There was a problem in that the ratio was off by 50%.

In other words, referring to FIG. 3 showing the configuration of a bipolar signal output circuit of a conventional PCM communication device, the reason for the deviation in the 50% pulse oligopoly rate of the transmission line is due to the clock of the digital signal output from the encoding circuit 28. This is due to the delay between the output of the selector 25 and the clock, and the device internal oscillator 26 that is input to the clock selector 25. This was due to deviation from the pulse oligopoly rate of 50% of the clock extracted by the external clock input from the external clock input terminal 24 and the PCM signal input from the PCM signal input terminal 21. FIG. 4 shows the deviation of the pulse oligopoly rate of 50% caused by the delay of the digital signal in the encoding circuit 28. Further, FIG. 5 shows a deviation in the pulse oligopolistic rate of 50% of the transmission line caused by a deviation in the pulse oligopolistic rate of 50% of the output clock of the clock selector 25. The difference between the 0 part and the D part of the pulse oligopoly rate in FIG. 4 corresponds to the difference in delay of the encoding circuit 28. The difference between the E part and the F part of the pulse oligopoly rate in FIG. 5 is the pulse oligopoly rate 5 of the output clock of the clock selector 25.
Based on the difference in deviation of 0%.

[Means to solve the problem]

The bipolar signal output circuit of the PCM communication device of the present invention includes:
A clock extraction circuit that extracts a clock from a PCM signal input from a PCM signal input terminal, a level conversion circuit that receives the output signal of this clock extraction circuit and converts the level into a square wave, and a clock that is input from outside the PCM communication device. an external clock input terminal, a clock selector that selects the clock and ground level input from the level conversion circuit and the external clock input terminal, and a PLI circuit that generates a clock dependent on the clock output from the clock selector. , binary counter, and PC
A multiplexing circuit that multiplexes M signals, an encoding circuit that converts the output of this multiplexing circuit into a bipolar signal suitable for a transmission line, and a waveform oligopolization conversion that converts the output signal of this encoding circuit into a bipolar signal. A waveform shaping circuit that correctly shapes the output of the waveform oligopolarity conversion circuit to a waveform oligopolization ratio of 50%, and a transformer that outputs the output of the waveform shaping circuit to a transmission line.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

Referring to FIG. 1, which shows an embodiment of a bipolar signal output circuit having several types of clock sources of a PCM communication device, a clock extractor circuit 2 extracts a clock from a PCM signal inputted from a PCM signal input terminal 1 to a clock selector 5. A clock extracted and converted to a level that can be used within the device by a level conversion circuit 3, an external clock input from an external clock input terminal 4, and a ground level are input. The clock selector 5 selects the clock used in the PCM communication device and outputs PLL (Phase L).
(locked Loop) times #f6. When the Florax self-reflector 5 selects the clock from the level conversion circuit 3, the PCM communication device operates in accordance with the opposite device, and when the clock from the external clock terminal 4 is selected, the PCM communication device operates in accordance with the external clock, and changes the ground level. When selected, it operates with the clock when the PLT-circuit 6 runs free.

The PLL circuit 6 is dependent on or runs independently of the clock from the clock selector 5 and generates a clock having twice the frequency (2fo) of the clock originally used inside the PCM communication device. The output of the PLL circuit 6 is output to a binary counter 7 and a waveform shaping circuit. The binary counter 7 divides the frequency of the input clock into a clock (fo) originally used in the PCM communication device, and outputs it to the multiplexing circuit 8, the encoding circuit, and the waveform oligopolization conversion circuit 10. The multiplexing circuit 8 is a circuit that multiplexes digital signals, which is a function of the PCM communication device, that is, multiplexes A/D converted PCM signals and multiplexes low-speed data into high-speed data. The encoding circuit 9 is a circuit that performs transmission line encoding suitable for the transmission line, for example, HD B n (high
density bipolar code) encoding and B n Z S (bipolar with n z
eros 5ubstitut, 1oncode) encoding. The waveform occupancy rate conversion circuit 10 has a waveform occupancy rate of 50%.
Perform waveform centroid conversion. Normally, due to a delay in the digital signal from the encoding circuit 9 or a 50% deviation in the waveform centeredness of the clock of the binary counter 7, the waveform centeredness conversion circuit 10
However, it is not possible to correctly set the waveform occupancy rate to 50%.
A waveform shaping circuit 1 performs waveform shaping on the output of the waveform conversion circuit 10 using the clock output from the PLL circuit 6 which has twice the frequency of the clock originally used in the device. The waveform shaping circuit 11 is composed of a D-type flip-flop (1)-FF) circuit 11-1. ．． 11-2
The signal read in is sent to the transformer 12 and output as a bipolar signal to the transmission line. As a result, as shown in FIG. 2, the clock of the PLL circuit 6 has a waveform occupation rate of 5.
Even if a deviation occurs at 0%, the signal output to the transmission line will have a waveform occupation rate of 50%.

〔Effect of the invention〕

As explained above, according to the present invention, no matter which one of the tarlocks from several types of clock sources is used, by shaping the waveform using a clock twice the originally used clock generated by the PLL circuit, the transmission line It is possible to correctly shape the signal to be output to a waveform occupancy rate of 50%.

[Brief explanation of drawings]

1 and 2 are diagrams showing one embodiment of the present invention, and FIGS. 3, 4, and 5 are diagrams explaining a conventional example. DESCRIPTION OF SYMBOLS 1... PCM signal input terminal, 2... Clock extraction circuit, 3... Level conversion circuit, 4... External clock input terminal, 5... Clock selector, 6... P L,
L circuit, 7... Binary counter, 8... Multiplexing circuit, 9... Encoding circuit, 10... Waveform centered rate conversion circuit, 10], , 102... NAND circuit, 11...・Waveform shaping circuit, 111゜112...D-FF circuit, 12・
··Trance.

Claims (1)

[Claims] A clock extraction circuit that extracts a clock from a PCM signal input from a PCM signal input terminal, a level conversion circuit that receives the output signal of this clock extraction circuit and converts the level into a square wave, and a clock that is input from outside the PCM communication device. an external clock input terminal, a clock selector that selects the clock and ground level input from the level conversion circuit and the external clock input terminal, and a PLL circuit that generates a clock dependent on the clock output from the clock selector. , binary counter, and PCM
A multiplexing circuit that multiplexes signals, an encoding circuit that converts the output of this multiplexing circuit into a bipolar signal suitable for the transmission line, and a waveform occupancy conversion that converts the output signal of this encoding circuit into a bipolar signal. The present invention is characterized by comprising a circuit, a waveform shaping circuit that properly shapes the output of the waveform occupancy rate conversion circuit to a waveform occupancy rate of 50%, and a transformer that outputs the output of this waveform shaping circuit to a transmission line. Bipolar signal output circuit for PCM communication equipment.