JPH041504B2 - - Google Patents
Info
- Publication number
- JPH041504B2 JPH041504B2 JP61117255A JP11725586A JPH041504B2 JP H041504 B2 JPH041504 B2 JP H041504B2 JP 61117255 A JP61117255 A JP 61117255A JP 11725586 A JP11725586 A JP 11725586A JP H041504 B2 JPH041504 B2 JP H041504B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- tab
- free end
- leads
- dam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体技術分野、特にその分野にお
ける半導体装置の組立方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the field of semiconductor technology, and particularly to a method of assembling a semiconductor device in that field.
封止体の側面から複数のリード(外部端子)を
突出する構造の半導体装置をプリント基板、セラ
ミツク基板等の実装基板(配線板)に取り付ける
構造としては、従来、第3a図または第3b図で
示す構造が知られている。第3a図に示した構造
は封止部1から延びるリード2を途中で同一方向
に折り曲げてインライン形にし、各リード2を実
装基板3に設けた取付孔4に押し込み、配線板3
を貫通した先端部と実装基板3とを半田5を介し
て固定する構造(挿入タイプ)となつている。ま
た、第3b図に示した構造はインライン形のリー
ド2の先端を再び外方に折り曲げてフラツトタイ
プとし、この先端平坦部6を実装基板3に載せて
図示しない半田を介して固定する構造である。
Conventionally, a semiconductor device having a structure in which a plurality of leads (external terminals) protrude from the side surface of a sealed body is attached to a mounting board (wiring board) such as a printed circuit board or a ceramic board, as shown in FIG. 3a or 3b. The structure shown is known. In the structure shown in FIG. 3a, the leads 2 extending from the sealing part 1 are bent in the same direction midway to form an in-line shape, each lead 2 is pushed into a mounting hole 4 provided in a mounting board 3, and the wiring board 3 is
It has a structure (insertion type) in which the distal end portion that penetrates through the mounting board 3 is fixed to the mounting board 3 via the solder 5. The structure shown in FIG. 3b is a structure in which the tip of the inline lead 2 is bent outward again to make it a flat type, and the flat tip 6 is placed on the mounting board 3 and fixed via solder (not shown). .
なお、これらの図においては実装基板面の配線
層は省略してある。 Note that the wiring layer on the surface of the mounting board is omitted in these figures.
上記前者の挿入タイプの構造は実装基板に取付
孔を穿たなければならず、実装基板コストが高く
なる難点がある。一方、上記後者のフラツトタイ
プは挿入タイプのものに比べて実装基板コストの
低兼化が図れるがリードを横に張り出すために取
付面積が広くなり、実装密度が低くなる欠点があ
る。
The former insertion type structure requires drilling a mounting hole in the mounting board, which has the disadvantage of increasing the cost of the mounting board. On the other hand, the latter flat type can reduce the cost of the mounting board compared to the insertion type, but has the disadvantage that the mounting area is large because the leads are protruded laterally, and the packaging density is low.
したがつて、本発明の目的は実装基板コストの
低兼化が図れ、なおかつ実装密度の向上を図るこ
とが可能な半導体装置の組立方法を提供すること
にある。 SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for assembling a semiconductor device that can reduce the cost of a mounting board and also improve the packaging density.
上記目的を達成するための本発明は、一つの半
導体装置の構成要素を区画するための四辺形のリ
ード枠と、その区画されたリード枠の中央部分に
位置してなる半導体回路素子が固定されるべき主
面をもつ四辺形のタブと、上記タブのそれぞれの
辺に対して、一方にそのタブのそれぞれの辺に近
接した自由端面を有し、他方に上記リード枠の各
辺に向かう自由端面を有する互いに所定間隔をも
つて配列された複数のリードと、それら複数のリ
ードを連接するダムと、前記タブカラ延在し、上
記ダムに連接するタブリードと、上記ダムと前記
リード枠とを連接する連接部とから構成されたリ
ードフレームを用意する段階と、そのリードフレ
ームに対して半田の濡れ性の良い膜を被覆処理す
ることにより前記他方の自由端面を含む複数のリ
ードに半田の濡れ性の良い膜を被覆する段階と、
主面に複数の電極を有する半導体回路素子を前
記タブの主面に固定する段階と、前記リードの一
方の自由端と半導体回路素子の電極とをワイヤで
繋ぐ段階と、前記ダムで区画されている部分内の
前記半導体回路素子、リードの内端およびワイヤ
を樹脂封止し、四辺形の樹脂封止部を構成する段
階と、
前記ダムおよび前記タブリードを切断し、前記
樹脂封止部を前記枠体から切り離し、そして前記
封止体の側部から四方向に外部へ導出する前記他
方の自由端面を含むリードを所定の箇所から折り
曲げ上記樹脂封止部の下面部よりわずかに突出さ
せることにより、その自由端面が実装基板面に当
接可能なように複数のリードが配列された半導体
装置を得る段階と、
から成ることを特徴とする半導体装置の組立方法
にある。
To achieve the above object, the present invention includes a quadrilateral lead frame for partitioning the components of one semiconductor device, and a semiconductor circuit element positioned at the center of the partitioned lead frame. a quadrilateral tab with a main surface to be fixed, and for each side of the tab, one side has a free end face close to each side of the tab, and the other side has a free end face facing each side of the lead frame. A plurality of leads having end faces arranged at a predetermined interval from each other, a dam connecting the plurality of leads, a tab lead extending from the tab collar and connecting to the dam, and connecting the dam and the lead frame. a step of preparing a lead frame composed of a connecting portion, and coating the lead frame with a film having good solder wettability to improve the solder wettability of the plurality of leads including the other free end surface. fixing a semiconductor circuit element having a plurality of electrodes on its main surface to the main surface of the tab; and connecting one free end of the lead and the electrode of the semiconductor circuit element with a wire. a step of resin-sealing the semiconductor circuit element, inner ends of leads, and wires in a portion partitioned by the dam to form a quadrilateral resin-sealed portion; and cutting the dam and the tab lead. Then, the resin-sealed part is cut off from the frame, and the leads including the other free end faces leading out in four directions from the sides of the sealing body are bent from predetermined points to remove the resin-sealed part. A method for assembling a semiconductor device, comprising the steps of: obtaining a semiconductor device in which a plurality of leads are arranged so that their free end faces can come into contact with the mounting board surface by slightly protruding from the bottom surface. It is in.
上記した手段によれば、複数のリードの自由端
面に半田の濡れ性の良い膜が被覆されるから、リ
ード自由端面の半田の濡れ性が向上し、実装基板
面に対してのリード外端面当接での確実な半田付
け実装が可能となる。
According to the above-mentioned means, since the free end surfaces of the plurality of leads are coated with a film having good solder wettability, the solder wettability of the lead free end surfaces is improved, and the lead outer end surfaces are brought into contact with the mounting board surface. This enables reliable soldering and mounting.
したがつて、本発明によつて得られた半導体装
置の組立方法によれば、実装基板に取付孔を設け
る必要がないことから実装基板の製造コストが安
価となる。 Therefore, according to the method for assembling a semiconductor device obtained by the present invention, there is no need to provide a mounting hole in the mounting board, so that the manufacturing cost of the mounting board can be reduced.
また、従来のフラツトタイプのようにリード2
を張り出させる必要がないので、取付面積が狭く
でき、実装密度の向上を図ることができる。 Also, like the conventional flat type, the lead 2
Since there is no need to protrude, the mounting area can be reduced and the mounting density can be improved.
以下実施例により本発明の構成を説明する。 The structure of the present invention will be explained below with reference to Examples.
第1図は本発明の組立方法によつて得られた半
導体装置の実装構造を示す。 FIG. 1 shows a mounting structure of a semiconductor device obtained by the assembly method of the present invention.
同図に示す半導体装置7は直方体からなる樹脂
封止部8と、樹脂封止部8の側面から延び、途中
で下方に折れ曲がる複数のリード9とからなつて
いる。そして、この半導体装置7は下方に延びる
リード9の先端面を実装基板(配線層は省略して
ある。)10の上面に当接し、その当接部を鑞材
である半田11によつて実装基板10に固定して
いる。 The semiconductor device 7 shown in the figure is made up of a resin-sealed part 8 having a rectangular parallelepiped shape and a plurality of leads 9 extending from the side surface of the resin-sealed part 8 and bent downward in the middle. Then, this semiconductor device 7 is mounted by bringing the tip end surface of the lead 9 extending downward into contact with the upper surface of the mounting board (wiring layer is omitted) 10, and by using solder 11, which is a solder material, in the contact portion. It is fixed to the substrate 10.
この実装構造ではリード端面のソルダビリテイ
(半田濡れ性)の良否が接続の良否に大きく影響
する。そこで、ソルダビリテイを向上させるため
にリードの先端面にも銀めつきを施す必要があ
る。 In this mounting structure, the solderability (solder wettability) of the lead end face greatly influences the quality of the connection. Therefore, in order to improve solderability, it is necessary to apply silver plating to the tip end surface of the lead.
この要求を満たす本発明による半導体装置の組
立方法を以下に説明する。 A method for assembling a semiconductor device according to the present invention that satisfies this requirement will be described below.
本発明によれば、第2図で示したリードフレー
ム12を用いて半導体装置が組立てられる。この
リードフレーム12はリードフレーム製造の段階
でリード9の外端面(モールド部から導入される
リード先端面)をリード枠(フレーム)13から
分離しておく。このようなリードフレームを全体
的に銀めつきする。この結果、銀めつきは先のリ
ード9の外端面も被覆されることとなる。そし
て、次にタブ14上に半導体回路素子15を固定
した後、半導体回路素子15の電極とタブ14に
近接したリード9の自由端とをワイヤ16で繋
ぎ、その後ダム17で取り囲まれた部分をレジン
でモールドし、不要なダム17、リード枠13を
切断除去する。また、タブリード18は樹脂封止
部(モールド部)19あるいはリード枠13の付
け根から切断する。そして、樹脂封止部の側部か
ら四方向に外部へ導出するリードを所定の箇所か
ら折り曲げることにより第1図の如き上記樹脂封
止部の下面部よりわずかに突出させたリード先端
面を有する半導体装置を得る。 According to the present invention, a semiconductor device is assembled using the lead frame 12 shown in FIG. In this lead frame 12, the outer end surface of the lead 9 (the lead end surface introduced from the mold section) is separated from the lead frame 13 at the stage of manufacturing the lead frame. This lead frame is entirely silver plated. As a result, the outer end surfaces of the leads 9 are also coated with silver plating. Then, after fixing the semiconductor circuit element 15 on the tab 14, the electrode of the semiconductor circuit element 15 and the free end of the lead 9 close to the tab 14 are connected with a wire 16, and then the portion surrounded by the dam 17 is connected. It is molded with resin, and the unnecessary dam 17 and lead frame 13 are cut and removed. Further, the tab lead 18 is cut from the resin sealing part (mold part) 19 or the base of the lead frame 13. By bending the leads leading out from the sides of the resin-sealed part in four directions from predetermined points, the lead end faces are made to slightly protrude from the lower surface of the resin-sealed part as shown in FIG. Obtain a semiconductor device.
なお、第2図に示す如く形状のリードフレーム
にあつては、レジンモールド時のレジンの内圧に
よつてダムが外方に曲がるおそれもあることか
ら、不要な空きリード端をリード枠に連結した
り、ダムとリード枠間に補強片を渡すようにする
ことが望ましい。これら空きリード及び補強片は
ダム切断によつてリードから外れてしまうので製
造上も特に問題ない。 Note that with a lead frame shaped as shown in Figure 2, there is a risk that the dam may bend outward due to the internal pressure of the resin during resin molding, so connect unnecessary empty lead ends to the lead frame. It is recommended that reinforcement pieces be placed between the dam and the lead frame. Since these empty leads and reinforcing pieces are removed from the leads by cutting the dam, there is no particular problem in manufacturing.
〔発明の効果〕
以上のように、本発明の半導体装置の組立方法
によれば、リード端面にまで半田の濡れ性の良い
膜が充分被覆されることになり、リード外端面の
半田の濡れ性が向上し、実装基板に対してのリー
ド端面当接での確実な半田付け実装が可能とな
る。このため、半田付けの信頼性が充分図れ、半
導体装置の実装の信頼性が高くなるという効果を
奏する。[Effects of the Invention] As described above, according to the method for assembling a semiconductor device of the present invention, even the end faces of the leads are sufficiently coated with a film with good solder wettability, and the solder wettability of the outer end faces of the leads is improved. This improves the soldering performance and enables reliable soldering mounting with the lead end surface in contact with the mounting board. Therefore, the reliability of soldering can be sufficiently ensured, and the reliability of mounting the semiconductor device can be improved.
したがつて、本発明の如き組立方法によつて得
られた半導体装置は、実装基板コストの軽減化、
実装密度の向上を図ることができる。また、半導
体装置の実装コストを低減できるという効果を奏
する。 Therefore, the semiconductor device obtained by the assembly method of the present invention can reduce the mounting board cost,
It is possible to improve the packaging density. Further, there is an effect that the mounting cost of the semiconductor device can be reduced.
さらに、本発明によれば、樹脂封止部8の外縁
からリードの屈曲部までの距離lをできるだけ短
くすることによつて実装面積をさらに狭くするこ
とができる。 Further, according to the present invention, the mounting area can be further reduced by making the distance l from the outer edge of the resin sealing part 8 to the bent part of the lead as short as possible.
またさらに、リードを樹脂封止部の界面で折り
曲げるようにすればリードの折り曲げが容易とな
る利点もある。また、リードの長さ(高さH)を
短かくすることによつて、半導体装置のハンドリ
ング時にリードが引つ掛りにくくなる。このた
め、リード曲がりの発生を少なくすることもでき
る。 Furthermore, if the leads are bent at the interface of the resin-sealed portion, there is an advantage that the leads can be easily bent. Further, by shortening the length (height H) of the leads, the leads are less likely to get caught when handling the semiconductor device. Therefore, the occurrence of lead bending can also be reduced.
第1図は本発明の一実施例による半導体装置の
取付構造を示す一部断面図である。第2図は本発
明の一実施例に用いられるリードフレームの平面
図である。第3a図は従来の半導体装置の取付構
造の一形態を示す断面図である。第3b図は従来
の半導体装置の取付構造の他の形態を示す正面図
である。
1…封止部、2…リード、3…実装基板、4…
取付孔、5…半田、6…先端平坦部、7…半導体
装置、8…樹脂封止部、9…リード、10…実装
基板、11…半田、12…リードフレーム、13
…リード枠、14…タブ、15…半導体回路素
子、16…ワイヤ、17…ダム、18…タブリー
ド、19…モールド部。
FIG. 1 is a partial sectional view showing a mounting structure for a semiconductor device according to an embodiment of the present invention. FIG. 2 is a plan view of a lead frame used in one embodiment of the present invention. FIG. 3a is a sectional view showing one form of a conventional mounting structure for a semiconductor device. FIG. 3b is a front view showing another form of the conventional mounting structure for a semiconductor device. 1... Sealing part, 2... Lead, 3... Mounting board, 4...
Mounting hole, 5...Solder, 6...Flat end portion, 7...Semiconductor device, 8...Resin sealing part, 9...Lead, 10...Mounting board, 11...Solder, 12...Lead frame, 13
...Lead frame, 14...Tab, 15...Semiconductor circuit element, 16...Wire, 17...Dam, 18...Tab lead, 19...Mold part.
Claims (1)
の四辺形のリード枠と、その区画されたリード枠
の中央部分に位置してなる半導体回路素子が固定
されるべき主面をもつ四辺形のタブと、上記タブ
のそれぞれの辺に対して、一方にそのタブのそれ
ぞれの辺に近接した自由端面を有し、他方に上記
リード枠の各辺に向かう自由端面を有する互いに
所定間隔をもつて配列された複数のリードと、そ
れら複数のリードを連接するダムと、前記タブか
ら延在し、上記ダムに連接するタブリードと、上
記ダムと前記枠体とを連接する連接部とから構成
されたリードフレームを用意する段階と、 そのリードフレームに対して半田の濡れ性の良
い膜を被覆処理することにより前記他方の自由端
面を含む複数のリードに半田の濡れ性の良い膜を
被覆する段階と、 主面に複数の電極を有する半導体回路素子を前
記タブの主面に固定する段階と、 前記リードの一方の自由端と半導体回路素子の
電極とをワイヤで繋ぐ段階と、 前記ダムで区画されている部分内の前記半導体
回路素子、リードの一方の自由端およびワイヤを
樹脂封止し、四辺形の樹脂封止部を構成する段階
と、 前記ダムおよび前記タブリードを切断し、前記
樹脂封止部を前記リード枠から切り離し、前記封
止部の側部から四方向に外部へ導出する前記他方
の自由端面を含むリードを所定の箇所から折り曲
げ上記封止部の下面部よりわずかに突出させるこ
とにより、その自由端面が実装基板面に当接可能
なように複数のリードが配列された半導体装置を
得る段階と、 から成ることを特徴とする半導体装置の組立方
法。[Claims] 1. A quadrilateral lead frame for partitioning the components of one semiconductor device, and a main surface to which a semiconductor circuit element is to be fixed, which is located in the center of the partitioned lead frame. and a quadrilateral tab having, for each side of said tab, one side having a free end face proximate to each side of said tab, and the other side having a free end face facing each side of said lead frame. A plurality of leads arranged at predetermined intervals, a dam connecting the plurality of leads, a tab lead extending from the tab and connecting to the dam, and a connecting portion connecting the dam and the frame body. and a step of coating the lead frame with a film having good solder wettability to coat a plurality of leads including the other free end surface with a film having good solder wettability. fixing a semiconductor circuit element having a plurality of electrodes on its main surface to the main surface of the tab; connecting one free end of the lead to an electrode of the semiconductor circuit element with a wire; sealing the semiconductor circuit element, one free end of the lead, and the wire in a portion partitioned by the dam with a resin to form a quadrilateral resin sealing portion; cutting the dam and the tab lead; , the resin sealing part is cut off from the lead frame, and the leads including the other free end surface led out in four directions from the sides of the sealing part are bent from a predetermined point from the bottom surface of the sealing part. A method for assembling a semiconductor device, comprising the steps of: obtaining a semiconductor device in which a plurality of leads are arranged so that their free end faces can come into contact with a mounting board surface by slightly protruding them;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61117255A JPS61258462A (en) | 1986-05-23 | 1986-05-23 | Assembly of electronic component parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61117255A JPS61258462A (en) | 1986-05-23 | 1986-05-23 | Assembly of electronic component parts |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1146179A Division JPS55103789A (en) | 1979-02-05 | 1979-02-05 | Strucutre for mounting electronic part |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61258462A JPS61258462A (en) | 1986-11-15 |
| JPH041504B2 true JPH041504B2 (en) | 1992-01-13 |
Family
ID=14707235
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61117255A Granted JPS61258462A (en) | 1986-05-23 | 1986-05-23 | Assembly of electronic component parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61258462A (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5671897A (en) * | 1979-11-13 | 1981-06-15 | Sanyo Electric Co Ltd | Nonvolatile storage device |
| JPS58215794A (en) * | 1982-06-08 | 1983-12-15 | Toshiba Corp | Non-volatile memory device |
| JPS59135600U (en) * | 1983-02-25 | 1984-09-10 | 株式会社アドバンテスト | Electronic equipment with rewritable non-volatile memory |
-
1986
- 1986-05-23 JP JP61117255A patent/JPS61258462A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61258462A (en) | 1986-11-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6410979B2 (en) | Ball-grid-array semiconductor device with protruding terminals | |
| US7405104B2 (en) | Lead frame and method of producing the same, and resin-encapsulated semiconductor device and method of producing the same | |
| JP3165078B2 (en) | Method for manufacturing surface mount components | |
| JPH07273268A (en) | Semiconductor package and lead frame for semiconductor package | |
| JP2000156433A (en) | Electronic equipment | |
| JPH0817954A (en) | Electrical component package and method of manufacturing the same | |
| JPH02239651A (en) | Semiconductor device and mounting method thereof | |
| JPH041501B2 (en) | ||
| JP4600124B2 (en) | Manufacturing method of semiconductor package | |
| JP2001035961A (en) | Semiconductor device and manufacturing method thereof | |
| JPH02260450A (en) | Semiconductor device and its mounting | |
| JPS63296252A (en) | Resin sealed semiconductor device | |
| JP2000349222A (en) | Lead frame and semiconductor package | |
| JPH11186481A (en) | Lead frame | |
| JPH041504B2 (en) | ||
| KR910000018B1 (en) | Semiconductor device using the lead-frame and method of manufacture there of | |
| US5343615A (en) | Semiconductor device and a process for making same having improved leads | |
| JPH0516724Y2 (en) | ||
| JPH10303227A (en) | Semiconductor package and manufacturing method thereof | |
| JPS62263665A (en) | Lead frame and semiconductor device using thesame | |
| KR940008291Y1 (en) | Plastic semiconductor package | |
| JPS61258460A (en) | Lead frame for electronic part | |
| JPS63160262A (en) | Lead frame and semiconductor device using the same | |
| JPH033354A (en) | Semiconductor device | |
| JPS61258496A (en) | How to mount electronic components |