JPH04165665A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce the parasitic capacity of a resistor so as to improve the frequency characteristic of a semiconductor integrated circuit by providing the resistor made of polysilicon on a field oxide film or in an oxide film isolation region. CONSTITUTION:A resistor made of polysilicon 3 is provided on a field oxide film 4 constituting a nonactive region on a semiconductor circuit or in an oxide film isolation region 7 constituting an element isolation region. When the resistor is provided in such way, the interval between the polysilicon 3 and an n-type epitaxial layer 5 can be increased and the parasitic capacity produced between the resistor and layer 5 can be reduced as compared with the case where the resistor is providing on a thin oxide film. Therefore, a semiconductor integrated circuit which has a good frequency characteristic or is low in power consumption can be obtained because of the reduced parasitic capacity of the resistor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor integrated circuits, and particularly to resistors thereof.

[Conventional technology]

FIG. 3 is a cross-sectional view of a resistor arrangement in a conventional semiconductor integrated circuit.

In the figure, l is an electrode, 2 is a protective oxide film, 16 is a p-type scattering layer, 5 is an n-type epitaxial layer, 17 is an n1 buried layer,
6 is a p-type substrate, 3 is polysilicon, and 18 is an oxide film.

Figure (a) shows the diffused resistance. The n-type epitaxial layer 5 is set to a higher potential than the p-swelled diffusion layer 16,
Because of the reverse bias, a depletion layer is formed at the junction between the p-swell diffusion layer 16 and the n-type epitaxial layer 5, and the p-swell diffusion layer 16
and n-type epitaxial layer 5 are electrically separated.

Since a current flows between the two electrodes through the p-swell diffusion layer 16, the p-swell diffusion layer 16 is used as a resistor.

A junction capacitance is generated between the p-swell diffusion layer 16 and the n-type epitaxial layer 5 using the depletion layer as a dielectric, and this becomes a parasitic capacitance of the resistor using the p-swell diffusion layer 16.

Figure fb) shows a polysilicon resistor. Polysilicon 3 and n-type epitaxial layer 5 are separated by oxide film 18, and since current flows between the two electrodes through polysilicon 3, polysilicon 3 is used as a resistor.

A capacitance is generated between the polysilicon 3 and the n-type epitaxial layer 5 using the oxide film 18 as a dielectric, and this becomes a parasitic capacitance of a resistor using polysilicon.

[Invention or problem to be solved]

Conventional semiconductor integrated circuits have resistors arranged as shown below, so parasitic capacitance occurs between the resistors and the n-type epitaxial layer, and such resistors are used in circuits that handle high frequencies. There was a problem that the frequency characteristics of the circuit would deteriorate if used for this purpose.

The second invention was made to solve the above-mentioned problems, and its purpose is to obtain a semiconductor integrated circuit equipped with a resistor having a small parasitic capacitance.

[Means to solve the problem]

The semiconductor integrated circuit according to the present invention has a field oxide film]
A resistor made of polysilicon is provided in the oxide film isolation region.

[Effect]

Since the semiconductor integrated circuit of the present invention includes a resistor made of polysilicon on the field oxide film or oxide film isolation region, it is possible to reduce the parasitic capacitance and improve the frequency characteristics of the circuit. The area occupied by the resistor in the circuit area can be reduced.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a resistor arrangement of a semiconductor integrated circuit according to an embodiment of the present invention. In the figure, 1 is an electrode, 2
3 is a protective oxide film, 3 is polysilicon, 4 is a field oxide film, 5 is an n-type epitaxial layer, 6 is a p-type substrate, and 7 is an oxide film isolation region.

Next, the operation will be explained.

The same figure (a+ shows the resistor on the field oxide film. Polysilicon 3 is used for the resistor, and this resistor is
It is placed on a field oxide film 4 that forms an inactive region on a semiconductor integrated circuit. With this configuration, the distance between the polysilicon 3 and the n-type epitaxial layer 5 becomes wider, and the parasitic capacitance generated between the resistor and the n-type epitaxial layer 5 is reduced compared to when the resistor is placed on a thin oxide film. You can make it smaller.

The same figure (bl shows another embodiment of the present invention, and shows a resistor in an oxide film isolation region. Polysilicon resin 3 is used for the resistor, and this resistor is connected to an element on a semiconductor integrated circuit. It is placed in the oxide film isolation region 7F that forms the isolation region. By configuring it in this way, the parasitic capacitance generated between the resistor and the n-type epitaxial layer 5 can be reduced as in the second embodiment. .

FIG. 2(a) is a circuit diagram of a differential amplifier using a semiconductor integrated circuit according to the present invention.

In the figure, 8 is a load resistor, 9 is a transistor, 10 is an emitter resistor, 11 is a constant current source, 12 is a signal source, and 13 is a constant voltage source.

+b+ in the same figure is a graph showing the frequency characteristics of the amplification factor of the differential amplifier in FIG. These are the characteristics when a resistor is used as the load resistor 8.

In this circuit example, the amplification factor becomes flat up to a high frequency, as shown in characteristic 14 in FIG. 2(b), depending on the parasitic capacitance of the load resistance, whichever is smaller, and it is effective when used in a circuit that handles high frequencies. Furthermore, if the same frequency characteristics as the conventional one are obtained, the current value of the constant current source 11 can be reduced, and a circuit with low power consumption can be realized.

As described above, in the semiconductor integrated circuit of this embodiment, the resistor made of polysilicon is placed on the field oxide film or the oxide film isolation region, and the gap between the resistor and the epitaxial layer becomes wider. The parasitic capacitance that occurs there becomes smaller.

In addition, even in the case of a resistor that has little effect even if the parasitic capacitance is large on the circuit, by placing one or more resistors on the field oxide film or oxide film isolation region, it is possible to improve the semiconductor integrated circuit area. The area occupied by the resistor in the circuit can be reduced and the integration of the circuit can be improved.

In the embodiment described above, the case where a parasitic capacitance is generated between the polysilicon 3 and the n-type epitaxial layer 5 has been described, or instead of the n-type epitaxial layer 5, a p-type or n-type diffusion layer is used. Also in this case, the same effect as in the above embodiment can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, in a semiconductor integrated circuit, one or more resistors made of polysilicon are arranged on the feed/1 oxide film or the oxide film isolation region, so that the resistance By reducing the parasitic capacitance of the device, it is possible to obtain a circuit with good frequency characteristics and a circuit with low power consumption.
Further, it is possible to reduce the area of the resistor in the semiconductor integrated circuit area and improve the integration performance.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a resistor arrangement of a semiconductor integrated circuit according to an embodiment of the present invention, FIG. 2(a) is a circuit diagram of a differential amplifier using a semiconductor integrated circuit according to an embodiment of the present invention, FIG. 2(b) is a diagram showing the frequency characteristics of the amplification factor of the differential amplifier of FIG. 2(a), and FIG. 3 is a sectional view showing the resistor arrangement of a conventional semiconductor integrated circuit. In the figure, 1 is an electrode, 2 is a protective oxide film, 3 is polysilicon, 4 is a field oxide film, 5 is an n-type epitaxial layer, 6 is a p-type substrate, 7 is an oxide film isolation region, 8 is a load resistor, 9 is a transistor, 10 is an emitter resistor, 11 is a constant current source, 12 is a signal source, I3 is a constant voltage source, 14 is a characteristic when the resistor in this invention is used as a load resistance,
15 is the characteristic when a conventional resistor is used as a load resistance. In the drawings, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A semiconductor integrated circuit comprising a resistor made of polysilicon formed on a field oxide film or an oxide film isolation region.