JPH04170758A - signal processing device - Google Patents

Abstract

PURPOSE:To enable time until a normal operation is started to be reduced by providing a bias conversion circuit for outputting after amplifying a signal which is output from two differential amplifiers and then converting to a signal which is correlated to power supply voltage value. CONSTITUTION:A 1/2 Vcc generation circuit consists of transistors Q55 - Q59, the size of transistors Q57 - Q59 is doubled as compared with other transistors, and R39=1/2.R38=2.R40 is set, thus enabling a voltage of 1/2.Vcc to be output from an emitter of the transistor Q58 to be output regardless of beta as in a bias conversion circuit. Also, 1/2.Vcc voltage is generated by a circuit of transistors Q60 - Q66 and Q23 - Q25 and resistors R18 and R41 - R45, the size of the transistor Q61 is doubled as compared with other transistors, R45=2.R41, R42= R44=1/2.R43 are set, and further R18=R17 is set, thus preventing an oscillation frequency of an FM modulator which is controlled by a collector current of the transistor Q25 from fluctuating due to temperature change.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal processing device that processes information signals.

[Conventional technology]

Traditionally, devices that process information signals perform clamp processing, emphasis processing, FM modulation, etc. on still image signals, and then record them on a magnetic disk.
The still image signal that has been modulated and recorded is reproduced, and the FM
There is an electronic still video system that restores the original still image signal by performing demodulation, de-emphasis processing, clamp processing, and the like.

FIG. 2 is a diagram showing the configuration of a signal processing circuit that performs signal processing such as clamp processing, emphasis processing, and FM modulation processing conventionally used in the recording apparatus of the above-mentioned electronic still video system.

Note that the emphasis processing performed in the signal processing circuit shown in FIG. 2 is realized by nonlinear emphasis processing and linear emphasis processing.

In Fig. 2, transistors Q1 to Q4 + resistors R1 to
R4 constitutes a differential amplifier, and transistors Ql,
The luminance signal VSI inputted as the base potential difference of Q3 is amplified by R3/(2re+R2) times.

In addition, the above re is r e "V T / I 1 (however, V T = K T / q, where: Portzmann's constant, T
: absolute temperature, q: charge element, 11: current flowing through resistor R3).

At this time, if the resistors R1 and R4 of the differential amplifier are equal, the transistor Q2. The reference voltage V3 will be supplied to the base of Q4. Note that the reference voltage V3 is V 3 =K
l ・Vcc (However, K1 is a constant.

VCC is the power supply voltage).

As described above, the luminance signal amplified by the differential amplifier is supplied to the base of the transistor Q6.

On the other hand, the luminance signal Vs+ is connected to the capacitor C1 and the resistor rl.

It is also supplied to the first-order high-pass filter constituted by T2, and by setting the time constant T=C1 (r 1 + r2) to a predetermined setting, it is possible to select a band to have nonlinear characteristics. .

And transistor Q51 Q? +QB+B+resistors -5 to R7 compress the signal extracted by the high-pass filter to give it non-linear characteristics.

The characteristics of the compression circuit are that the signal input to the transistor Q5 is Vl, and the signal output from the collector of the transistor Q8 is V. Then, as shown in FIG. 3, the gain changes depending on the input signal level.

As described above, the luminance signal input to the base of transistor Q6 and the signal compressed by the compression circuit are added at the collector of transistor Q8, and non-linear emphasis processing is performed in which the amount of emphasis varies depending on the level of the input luminance signal. and is supplied to the emitter of transistor Q.

The above is the operation of the nonlinear emphasis circuit.

Next, the luminance signal supplied to the emitter of transistor Q is transmitted to two external terminals 21. 22, transistors Q II-Q, 3. It is input to a clamp circuit constituted by a resistor RI+.

An inverted horizontal synchronizing pulse (■) which is an inversion of the horizontal synchronizing pulse is input to the base of the transistor Q11, and when the inverted horizontal synchronizing pulse (■) is at a low level, the base voltage of the transistor Q14 is set to V2-VBE (V2 is a clamp). The reference voltage VBE is clamped to the base-emitter voltage of the transistor Q1□, and a sync-tip clamped luminance signal is supplied to the base of the transistor Q14.

In addition, the above T2-vBE is 2·vec (however, K2
is a constant and Vec is the power supply voltage). .

Let it be a function of

In FIG. 2, transistors Q +4 to Q21 + resistors R12 to RI7. T3. T4. A linear emphasis circuit is configured by capacitor C4, and R12”R
13, RI5” is set to RI6.

Incidentally, since the linear emphasis circuit configured as described above is common, a detailed explanation of its operation will be omitted.

In the above linear emphasis circuit, T1”C4(
The linear emphasis characteristic is determined by two time constants: r3+r4) and T2=C4@r3.

Also, the sync tip voltage of the luminance signal output to the emitter of the transistor Q20 is 2.VCC, which is equal to the base voltage of the transistor Q14.

On the other hand, the reference voltage v2 is also input to the transistor Q2□, and if the resistor R18 is set to R17''R18, the emitter potential of the transistor Q25 becomes 2·vcc.

Further, the emitter current I2 of the transistor Q25 is determined by the resistors r5 and T6, and can be expressed as follows. In addition, in the above formula, 3 is the resistance R1+ R2+
R3r is a constant determined by R4 + reference voltage v3,
VSI is a luminance signal level.

The collector current of transistor Q is then input to the FM modulator 23.

The FM modulator 23 has a characteristic of oscillating at a frequency proportional to the collector current supplied from the transistor Q25.

That is, the resistor r6 determines the modulation carrier frequency, and the resistor R1I determines the modulation frequency deviation, thereby preventing the oscillation frequency from varying due to temperature changes.

[Problem that the invention is trying to solve] By the way, the second problem
In the signal processing circuit shown in the figure, the nonlinear emphasis circuit and the linear emphasis circuit are connected to capacitor C3.
are connected in such a way that the direct current component is removed.

The reason why the DC component is removed by the capacitor C3 is that the sync tip level of the luminance signal needs to be a function of only the power supply voltage vcc in order to prevent it from changing due to changes in the FM modulator 2. Also, the output bias value of the nonlinear emphasis circuit is determined by the transistor Qs. Transistor Q7 which is a function of VBH by Qs and further determines the compression characteristics
This is because the DC voltage cannot be set independently depending on the setting of the collector current.

Therefore, in order to provide the capacitor C3, two external terminals are connected to terminal 21. 22 is required, which has been an obstacle in integrating these circuits.

Furthermore, when these circuits are used in a recording device for an electronic still video system, it is necessary to shorten the startup time of the circuit in order to configure the device to turn on the power immediately before recording operation as a power saving measure for the device. There is a problem in that it is difficult to instantaneously operate a conventional emphasis circuit that requires a lamp circuit, such as using the capacitor C3.

The purpose of the present invention is to provide a signal processing device that does not require the installation of external terminals, is easy to integrate into a circuit, and takes a short time from power supply to normal operation. do.

[Means to solve the problem]

The signal processing device of the present invention is a device for processing an information signal, and includes a first differential amplifier that amplifies the information signal, a compression circuit that compresses the information signal passed through a high-pass filter, and a signal that is output from the compression circuit. a second differential amplifier that converts and amplifies a signal correlated with the current value of the information signal output from the first differential amplifier, and outputs the signal; It is characterized by having a bias conversion circuit that amplifies the signal output from the amplifier and converts it into a signal correlated with %Vcc (V ((power supply voltage value)) and outputs the signal.

[Function] According to the above-mentioned configuration, there is no need to provide external terminals (integration into an integrated circuit is easy, and the time from supply of power to the start of normal operation is shortened).

〔Example〕

Hereinafter, the present invention will be explained using examples of the present invention.

FIG. 1 is a diagram showing the configuration of a signal processing circuit as an embodiment of the present invention, and components similar to those shown in FIG. 2 are given the same reference numerals.

Note that the signal processing circuit shown in Figure 1 can process not only luminance signals but also color difference signals. When processing luminance signals, the sync chip voltage is input to the base of transistor Q3, and the sync chip voltage is input to the base of transistor Q1. A luminance signal is input to the base, and when processing a color difference signal, a blanking voltage is input to the base of the transistor Q3, and a color difference signal is input to the base of the transistor Q1.

In FIG. 1, a circuit constituted by transistors Q45 to Q54 and resistors R32 to R37 is a bias circuit for an emitter constant current source of each circuit.

Now, make the size of each transistor equal, R38 = 3X
R3? ” If R is 35, then transistor Q is 4.
The emitter voltage VRI of 9 is as follows. Note that VFI is the voltage between the base and emitter of each transistor.

Also, the emitter voltage VR2 of the transistor Q45 is R
．． If 12=R34, then it becomes.

Also, β (=ic/ib,
ic: collector current, 1b = base current) are equal, and if R l "R 4 " RI9, then the zinc chip voltage (blanking voltage of color difference signal) VS2 of the luminance signal output from the emitter of transistor Q26 is Become. This is because the base currents of transistors Q3 and Q26 cancel each other out.

Next, the DC voltage VS3 of the compressed signal output from the emitter of the transistor 03g is R2□''R25=R2g.This is the difference between the two differential compressed signals input to the bases of the transistors Q3□ and Q34. This is because the voltages are the same.

In addition, when R3=R24, R1=R2□, V
52: Becomes VS3.

In FIG. 1, transistors Q38 to Q44. The circuit constituted by resistors R27 to R31 is a bias conversion circuit, and transistors Q42 to Q44 are twice the size of the other transistors, and R27"R30"
! /4・R29"2"R31, transistor Q
Assuming that the two base input voltages of Q38 and Q40 are equal, the voltage VS3 output from the emitter of transistor 043 will be. In the above equation, β) is 1, so it can be said that it is 1 regardless of β, so V S3 ” V cc.Therefore, at the base of transistor Q +4, each
A luminance signal subjected to non-linear emphasis of Vcc is inputted, and a luminance signal subjected to non-linear emphasis is output from the emitter of the transistor Q20 when the sync chip is set to 'A'' Vcc.

Further, transistors Qss to Q59 and resistors R38 to R40 in FIG. %・R38=2
・By setting R40, the emitter of transistor Qss is %・
Outputs the voltage of VC(.

Also, the transistors Q 60-Q 66, Q in FIG.
A voltage of %VCC is generated by a circuit constituted by 23 to Q 25, a resistor R78, and R4l-R45.

At this time, transistor Q6+ is made twice the size of other transistors, R45=2・R41, R42−
By setting R44-V2·R43 and further setting R1g=R1□, the oscillation frequency of the FM modulator controlled by the collector current of transistor Q25 can be prevented from changing due to temperature changes.

Furthermore, the above conditions do not change depending on the compression current.

As mentioned above, in the signal processing circuit shown in Fig. 1, the second
Since there is no need for an element equivalent to capacitor C3 shown in the figure, there is no need for any external terminals to connect capacitor C3, making it easier to integrate the circuit, and the device immediately returns to normal operation after power is supplied. This makes it ideal for electronic still video systems that require a signal processing circuit with a fast operation start speed.

C Effects of the Invention] As explained above, according to the present invention, there is no need to provide external terminals, making it easy to integrate the circuit, and reducing the time required from power supply to normal operation. It becomes possible to provide a signal processing device with a short time.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of a signal processing circuit as an embodiment of the present invention. FIG. 2 is a diagram showing the configuration of a conventional signal processing circuit. FIG. 3 is a diagram showing the compression characteristics of the compression circuit in the signal processing circuit shown in FIG. 2. y cc...Power supply voltage Q1-Q66...Transistor C,, C2, C4...Capacitor

Claims (1)

[Claims] An apparatus for processing an information signal, comprising: a first differential amplifier that amplifies the information signal; a compression circuit that compresses the information signal passed through a high-pass filter; and an apparatus that processes an information signal output from the compression circuit. a second differential amplifier that converts and amplifies a signal into a signal correlated with the current value of the information signal output from the first differential amplifier, and outputs the signal; and the first and second differential amplifiers. 1. A signal processing device comprising: a bias conversion circuit that amplifies a signal output from a signal generator, converts it into a signal correlated to 1/2·V_c_c (V_c_c is a power supply voltage value), and outputs the signal.