JPH04172966A - Switching power supply - Google Patents

Abstract

PURPOSE:To suppress ripple in the output current from an inverter and to reduce the size and the cost by feeding drive signals, with predetermined phase angle, to respective switching elements connected in series with the primary winding of a transformer every time when a pulse is outputted from a reference signal generating circuit. CONSTITUTION:An oscillation circuit 10a outputs driving signals D1, D2, having phase difference of 180 deg., from the output terminals of AND gates 23a, 23b. When two inverters 6a, 6b are operated in parallel, the oscillation circuit 10a delivers the driving signals D1, D2 having phase difference of 180 deg. to switching elements 5a, 5b thus inducing voltages alternatively in the secondary windings of transformers 4a, 4b. Since output currents from the secondary windings of the transformers 4a, 4b are not fed concurrently to a smoothing capacitor 11 and a load 12, ripple current are not superposed for respective inverters 6a, 6b.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switching power supply device in which a plurality of inverters are connected in parallel for high power output.

[Prior Art] Generally, as shown in FIG. 6, this type of switching power supply device rectifies five commercial power sources 1 using an input rectifier circuit 2 such as a diode bridge, and converts the rectified DC input voltage Vi into
is smoothed by a smoothing capacitor 3a, and the input rectifier circuit 2
The voltage is applied to an inverter 6a having a series circuit connected to both ends of the output of a transformer 4a and a switching element 5a consisting of a MOS type FET.

This inverter 6a includes a rectifier diode 7a and a flywheel diode 8 connected to the secondary winding of the transformer 4a.
a and a choke coil 9a, and an oscillation circuit 10.
The switching element 5 based on the drive signal output from the
By turning on and off the transformer 4a
The voltage induced from the secondary winding of
The DC output voltage VO is supplied to the load 12 via the output terminals +v and -v by being smoothed by the smoothing capacitor 11a connected to both ends of the output of the output terminal a.

When the power consumption of the load 12 is so large that it cannot be handled by one inverter 6a, a plurality of inverters 6a are often operated in parallel for the load 12.

As shown in FIG.
Smoothing capacitors 3a, 3b, 3c and a smoothing capacitor 11a are connected to each input terminal and each output terminal of terminals b, 6c...6n.
11b, Ilc... are inserted and connected in parallel between the DC input voltage V1 line and between the DC output voltage Vo line.
The same drive signal is sent to each inverter 6a, 6b.

6c...6n switching elements 5a, 5b.

By causing each switching element 5a, 5b, 5c, .
The DC output voltage Vo is output to the load 12, making it possible to supply a large amount of power to the load 12.

[Problem to be solved by the invention] In the above conventional technology, each inverter 6a, 6b, 6
Since drive signals of the same phase are applied to the switching elements 5a, 5b, 5c, etc. of each transformer 4
The output currents supplied to the load 12 from the secondary windings a, 4b, 4C, etc. flow in a concentrated manner at the same time, and the real current increases, depending on the on/off operation of the switching elements 5a, 5b, 5c. Not only does the fluctuation of the DC output voltage ■0 increase, but in order to reduce this real current, a large-capacity smoothing capacitor is required between the output terminals 10V and -■, and each of the inverters 6a, 6b, 6cm6n Smoothing capacitors 11a and Nb are provided between each output line.

The problem is that the number of parts of the switching power supply device increases, making it impossible to reduce the size and cost of the switching power supply device.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a switching power supply device that can reduce the ripple current generated from the output of each inverter and reduce the capacity of the smoothing capacitor on the output side.

[Means for Solving the Problems] The present invention connects n inverters in parallel with switching elements connected in series to the primary winding of a transformer, and supplies drive signals from an oscillation circuit to the switching elements to In a switching power supply device that outputs a stable DC voltage between output terminals by rectifying and smoothing the voltage induced in the secondary winding of a transformer using a rectifier circuit and a smoothing capacitor, the oscillation circuit has a standard for outputting pulses of a constant period. A fritz-afrosor and a gate circuit are connected to a signal generation circuit, and each time a pulse is output from the reference signal generation circuit, the drive signal is supplied to each of the switching elements with a phase difference of 360°/n. .

[Function] With the above configuration, in the oscillation circuit, the output signal from the reference signal generation circuit is transmitted 360°/n to n inverters by a combination of a frill-luff flop and a gate circuit.
By supplying a drive signal to each switching element with a phase difference of Flows into the smoothing capacitor.

[Example] Hereinafter, each example of the present invention will be described with reference to the accompanying drawings.

FIG. 1 shows a switching power supply device showing an embodiment of the present invention, and the same parts as in FIG. 6 are given the same reference numerals, and explanations of the same parts are omitted.

As shown in FIG. 1, n inverters 6a and 6b are connected in parallel from the oscillation circuit 110a.

Each switching element 5a, 5b of 6c...6n.

5c, 5d, etc., each outputs a drive signal having a phase shift of 360'/n, and outputs the output terminal +
Between V and -V, the output voltage from the transformer is rectified by rectifier diodes 7a, 7b, 7c... and flywheel diodes 8a, 8b, 8c... A smoothing capacitor 11 for common smoothing is inserted and connected.

FIG. 2 shows the oscillation circuit 10a when two inverters 6a, 6b6'fi are connected in a row, and the output signal SI of the reference signal generation circuit 21 which outputs pulses with a constant period is input as the clock input of the flip-flop 22a. A reference voltage VCC for driving the flip-flop 22a is applied to the power supply terminal VCC1 input terminal J and the input terminal K of the flip-flop 22a, respectively. do. Based on the output signal S from the reference signal generation circuit 21, output signals S are output from the non-inverting input terminal Q and the inverting input terminal Q of the flip-flop 22a, respectively.
, , S are supplied to the other input terminals of the anchors 23a, 23b, so that each anchor 23a
, 23b to the switching elements 5a of the inverters 6a, 6b.

5b has a drive signal with a phase of 180°.

D2 is output.

Next, the operation of the above configuration will be explained.

When the power is turned on, the AC power supply voltage from commercial power supply 1 is input to the rectified circuit! This N'a DC input voltage V1 is rectified by the inverter 6a via the smoothing capacitors 3a and 3b.

6b is applied to transformers 4a and 4b.

In the oscillation circuit 10a, as shown in the time chart of FIG. 3, both the input terminal J and the input terminal of the flip-flop 22a are at H level, so that the reference signal is generated! @
21 rises to H level and is applied to the clock input terminal CK of the flip-flop 22a, at that moment the output signal S2 from the output terminal Q becomes H level.
level, the output signal S from output terminal q,
becomes L level.

This flip-flop 22a is then connected to the reference signal generation circuit 2.
The output terminals Q and Q are held in the previous state until the output signal S from 1 rises from the L level to the H level again, and at the moment the output signal S rises to the H level, each Since the output terminals Q and Q invert the previous state, each time the output signal S1 rises to the H level, the output signal S
,,S, are at L level or H level while maintaining mutually inverted states.
The level is switched and outputted to each AND gate 23a, 23b. When the output signal S and the output signal s2 are both at H level, the drive signal from the AND gate 23a becomes H level, and when the output signal S1 and the output signal S3 are both at the H level, the AND gate 23b Since the drive signal D2 is at H level, the drive signal D2 and the drive signal D2 are outputted with a phase difference of 180° according to the output signal S from the reference signal generation circuit 21. Inverter 6a.

6b is supplied to switching elements 5a and 5b.

For this reason, the DC input voltage 1 is applied to the switching elements 5a and 5 based on the drive signals D, which have different phases.
By switching and applying voltage alternately to the primary windings of transformers 4a and 4b, transformers 4a and 4b
The voltage induced in the secondary winding of is rectified by rectifier diodes 7a, 7b and flywheel diodes 8a, 8b, respectively. This rectified voltage is applied to each choke coil 9a.

9b and one smoothing capacitor 11 to smooth the load 1.
By supplying the output DC voltage 0 to the inverters 2, the output currents of each inverter 6a and 6b flow into the smoothing capacitor 11 at different times.

In this way, in this embodiment, two inverters 6
When operating inverters a and 6b in parallel, a drive signal D having a phase difference of 360°/2 elements = 180° is sent from the oscillation port 110a to the switching elements 5a and 5b of each inverter 6a and 6b.
By supplying 1°D2, the transformer 4a.

Voltages are alternately induced in the secondary winding 4b.

Since the output currents from the secondary windings of the transformers 4a and 4b do not flow to the smoothing capacitor 11 and the load 12 at the same time, the real currents are no longer superimposed in each inverter 6a and 6b and are greatly reduced. Because of this reduction in real current, there is no need for a large-capacity smoothing capacitor between the output terminals V and -V, so this output terminal
It is only necessary to connect the smoothing capacitor 11 of the capacity required by one inverter between the switching power supplies 1 and 2, and the number of parts of the switching power supply device can be reduced, making it possible to reduce the size and cost.

Further, for example, each switching element 5a.

When setting the switching frequency of the drive signals DI and D2 supplied to the reference signal generation circuit 2 to 100kHz, the reference signal generation circuit 2
Since it is sufficient to set the output signal S, from the reference signal generating circuit 21 to 2QQkHz, the individual inverters 6a, 6b perform switching operations based on the 100kHz drive signals R, D, but the switching power supply itself uses the 2QQkHz output signal S from the reference signal generating circuit 21.
Since they are synchronized by the output signal $1 of 0 kHz, beats will not occur due to the difference in frequency between the inverters 6a and 6b, and there will be no possibility of adverse effects on peripheral devices.

FIG. 4 shows another embodiment of the invention, in which four inverters 6a, 6b are used in FIG.

The oscillation circuit 10b is shown when 6c and 6d are connected in parallel, and the same parts as in FIG.

In this embodiment, the output terminal of the AND gate 23a is connected to the clock input terminal CK of the flip-flop 22b.
and each AND gate 23c.

The output signal S4 is supplied to one input terminal of the AND gate 23d, and the output signal S4 is output from the output terminal of the AND gate 23b to the flip-flop 22c.
clock input terminal CK and each AND gate 23e, 2
An output signal S is supplied to one input terminal of the flip-flop 3f, and a reference voltage VCC is supplied to the power supply terminal Vcc, input terminal J, and input terminal K of each of the flip-flops 22b and 22c. The output terminal Q and output terminal q of the flip-flop 22b are connected to each AND gate 2, respectively.
Output signals S, , S to the other input terminals of 3c and 23d
, to each AND gate 23c, 23d
The switching elements 5a of the inverters 6a and 6b are connected to the output terminals of the inverters 6a and 6b.

The drive signals DI and D2 are outputted to the output terminals Q and Q of the flip-flop 22c, respectively.

The output signals S, , S to the other input terminal of 23f.

A drive signal is supplied from the output terminals of the AND gates 23e and 23f to the switching elements 5c and 5d of the inverters 6c and 6d.

It is configured to output D4.

As shown in the time chart of FIG. 5, the oscillation circuit 10b operates an AND gate 23a for each pulse of the output signal S from the reference signal generation circuit 21.

23b with a phase difference of 180°. S
, or is supplied to the clock input terminal CK of each flip-flop 22b, 22C. This flip-flop 22b
, 22c output the output signal S4. The states of the output terminals Q, Q are held until the output signal S4.S rises from the L level to the H level. At the moment S5 rises to H level, the states of output terminals Q and Q are switched, and output signal S6.
S7 and the output signal S8°S are inverted from each other and output to each AND gate 23c, 23d and each AND gate 23e.

It is output to 23f. As a result, first the output signal S4
．． S6 both go to H level, and the AND gate 23c outputs the drive signal S5.S6, and then the output signal S5. SI]
, output signal S4°S? , output signals S, , S, sequentially become H level, and each ant gate 23c, 23d
, 23e, 23f to drive signal DI −+D3−′
The signals D2−+D4 are supplied to the switching elements 5a, 5b, 5c, and 5d of the inverters 6a, 6b, 6c, and 6d with a phase difference of 360°/4 −90°, respectively. In this embodiment, the reference signal generation circuit 2
By setting the frequency of the output signal S1 from 1 to 400kHz, the output signal S from 23a and 23b
4. S is set to 200 kHz and each drive signal of 100 kHz is set, and D, D, and D4 are set to each switching element 5a,
5b, 5c, and 5d, and has the same operation and effect as the previous embodiment.

Note that the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention. For example, when connecting n inverters in parallel, the phase difference between each drive signal is 360° 'n, and the oscillation circuit is set so that the output signal frequency from the reference signal generation circuit is n times the switching frequency of each drive signal. It is good to configure. Each switching element may be a transistor instead of an MO3 type FET.

[Effects of the Invention] The present invention connects switching elements or n inverters connected in series to the primary winding of a transformer, and supplies a drive signal from an oscillation circuit to the switching element to increase the secondary winding of each transformer. In a switching power supply device that outputs a stable DC voltage between output terminals by rectifying and smoothing the voltage induced in the windings using a rectifier circuit and a smoothing capacitor, the oscillation circuit is a reference signal generation circuit that outputs pulses with a constant period. By connecting a flip-flop and a gate circuit, and supplying the drive signal to each switching element with a phase difference of 360°/n every time a pulse is output from the reference signal generation circuit, each inverter is It is possible to provide a switching power supply device that can reduce the ripple current generated from the output of the switch and reduce the capacitance of the smoothing capacitor on the output side.

[Brief explanation of drawings]

Figure 1 shows the switching power supply device according to the present invention! @
2 is a circuit diagram of the oscillation circuit, FIG. 3 is a time chart showing the operation of the oscillation circuit, FIGS. 4 and 5 show other embodiments of the present invention, and FIG. 4 is a diagram of the oscillation circuit. The circuit configuration diagram of the circuit, Figure 5 is a time chart showing the operation of the oscillation circuit,
FIG. 6 is a circuit diagram of a conventional switching power supply. 4a, 4b, 4cm transformer 5a, 5b, 5c, 5d... switching element 6a,
6b, 6c, 6d---Inverter 7a, 7b, 7c・
... Rectifier diode (rectifier port N) 10a, 10b Oscillation circuit 11 ... Smoothing capacitor 21 ... Reference signal generation circuit 22a, 22b, 22cm-7 lip flop 23a,
23b, 23c, 23d, 23e, 23f・
AND GATE (GATE CIRCUIT) Patent Applicant Nemic Ramta Co., Ltd. Agent Patent Attorney Mamoru Ushiki 5+ Figure 5

Claims (1)

[Claims] n inverters each having a switching element connected in series to the primary winding of the transformer are connected in parallel, and a drive signal from an oscillation circuit is supplied to the switching element to control the voltage induced in the secondary winding of each transformer. In a switching power supply device that outputs a stable DC voltage between output terminals through rectification and smoothing using a rectifier circuit and a smoothing capacitor, the oscillation circuit has a flip-flop and a gate circuit connected to a reference signal generation circuit that outputs pulses with a constant period. . A switching power supply device, characterized in that the drive signal is supplied to each of the switching elements with a phase difference of 360°/n every time a pulse is output from the reference signal generation circuit.