JPH04195619A - Power consumption control method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a power supply function of a battery-operated information processing device, and in particular, to power consumption control of an information processing device to reduce power consumption in actual use. Regarding the method.

[Prior Art] Conventionally, in information processing devices such as portable personal computers and word processors that rely on batteries, methods of reducing power consumption have been proposed as disclosed in Japanese Patent Laid-Open No. 64-66719 and OA.
There is a method described on pages 45 to 47 of the August 1990 issue of Personal Computer.

These methods reduce power consumption by constantly monitoring the status of input from the keyboard and sequentially turning off the power to devices that are not in use within the equipment if there is no human input for a certain period of time. ing.

For example, if key human power is not available for a certain period of time (several seconds to tens of seconds),
First, the clock supply to the CPU is stopped to stop processing. Furthermore, if there is no key force applied for a certain period of time (several minutes to several tens of minutes), the backlight of the liquid crystal display device is turned off, and if there is no key force applied for a certain period of time, the display is also stopped.

In addition, for floppy disk drives and node disk drives, a dedicated microcontroller monitors the usage status of the floppy disk and prevents access from occurring for a certain period of time.
(for several seconds), the motor will automatically stop to save power.

In addition, when performing control such as 1 or more, the target CPU
and peripheral devices, all internal registers are C-M, O
A static version of S is often used.

The reason for this will be explained next.

Generally, in an LSR, power consumption increases in proportion to the clock frequency supplied to the LSI, but in the case of a dynamic LSI, even if you try to lower the clock frequency to reduce power consumption, the operating clock frequency There is a lower limit, and if you operate below that frequency, the contents of the internal registers will be lost and normal operation will not be possible.

On the other hand, in the case of a static LSI, the contents of internal registers are not lost even if the clock is completely stopped.

Furthermore, when the LSI is configured with a C-MOS type,
Even if power is supplied to the LSI, unless a clock is supplied, current will hardly flow, so by stopping the clock as necessary, the consumption of the LSI can be reduced. This has the advantage of significantly reducing power consumption.

In particular, for the CPU, in order to easily control the clock supplied to the CPU, the CPU is provided with a command called a sleeve command to stop the clock supply, and furthermore, an interrupt signal from the outside can be used to control the clock supplied to the CPU. Many devices have a function to restart clock supply.

[Problem to be solved by the invention] The conventional power saving technology described above consumes a large amount of power when the user leaves it unused, such as when there is no key personnel available for a certain period of time or when the disk is not accessed for more than a certain period of time. It is possible to reduce power consumption.

However, 1. The presence or absence of key human power and peripheral devices and CPU
Regardless of the usage status of the information processing device, these power saving techniques merely limit the power supply sequentially, assuming that the entire information processing device is not in use unless key human power is used for a while.

For example, in conventional products, it is assumed that the CPU processing of a normal application program will not continue for more than a few tens of seconds after the key power is stopped, so if the key power is not present for several tens of seconds, the clock supply to the CPU is stopped. However, in this case,
In some applications that use the CPU for a long time,
Processing may be interrupted by the WI.

In addition, when the user is performing key manual labor while actually running application programs such as document processing, communications, and spreadsheets, processing using conventional power saving techniques is rarely executed. There is little power saving effect when it is in use.

The terms of the present invention can be used without deteriorating the processing speed from the user's point of view when the user is actually using the system.
An object of the present invention is to provide a power consumption control method that can reduce power consumption.

Means for Solving the Problem] In order to achieve the above object, the present invention provides an information processing apparatus that has a function of managing the usage state of a group of parts that realizes a series of processes by regarding them as logical resources. It maintains the correspondence between each resource and its related parts and power control information for each part, and when a certain process starts using the notebook resource, the power supply to the related parts is stopped. If so, start supplying power to the part, and when the use of the above resources is finished, if the related part is not being used by other processes, stop supplying power to the part. I have to.

Also, depending on the part, a predetermined period of time is measured for each part, and the supply of power to the part is stopped after the specified period of time has elapsed.In this case, within the specified period of time 5 When the use of the component is restarted, the above measurement is stopped. Power to be supplied/stopped includes a clock and a power source.

Therefore, as a specific configuration of the present invention, at least one of the first power saving means for supplying/stopping the clock and the second power saving means for supplying/stopping the power is provided. ing.

The first power saving means includes a clock supply control means that controls the supply/stop of clocks to each component of the information processing device, and a clock supply control means that controls clock supply to each component when the component is not in use. a clock supply stop means for instructing the clock supply control means to stop supplying the clock to the component, if the clock supply can be stopped; The clock supply starting means is provided for instructing the clock supply control means to start supplying a clock to the part when the stopped part becomes in use.

The second power saving means includes a power supply control means that controls the supply/stop of power to each component of the information processing device, and a power supply control means that controls power supply to each component when the component is not in use. A power supply stop means that determines whether the power supply can be stopped and, if the power supply can be stopped, instructs the power supply control means to stop supplying power to the component; The power supply starting means is provided for instructing the power supply control means to start supplying power to the part when the part whose supply has been stopped becomes in use. .

In addition to the clock supply control means that controls clock supply/stop for each component of the 5 information processing device,
It is also possible to provide a clock switching means for switching the clock frequency between a value during normal operation and a lower value.

In this case, the clock supply stop means determines whether or not it is possible to stop the clock supply to the component when the component becomes unused, and if the clock supply can be stopped, the clock supply Instructs the control means to stop supplying the clock to the component, and if it is impossible to stop the clock supply, the clock switching means is instructed to
The clock supply start means instructs the clock supply control means to lower the clock frequency to a value lower than that during normal operation, and the clock supply start means instructs the clock supply control means when the component to which the clock supply has been stopped becomes in use. When the component whose clock frequency has been lowered is in use,
The clock switching means is instructed to return the clock frequency to the value during normal operation.

Further, the first 8-power means includes a clock supply control means for controlling the supply/stop of clock for each component of the information processing device, and a clock supply control means for controlling supply/stop of the clock for each component of the information processing device, and a clock supply control means for controlling the supply/stop of the clock to each component when the component is not in use. It is determined whether the clock supply can be stopped immediately, and if the clock supply can be stopped immediately, the clock supply control means is instructed to stop the clock supply to the relevant component, and the clock supply is immediately stopped. If this is not possible, instruct the clock supply control means to stop supplying clocks to the component when the component remains unused for a certain period of time predetermined for each component. clock supply stop means for stopping the clock supply, and the clock supply control means when the component is in use.

A configuration may be provided in which clock supply start means instructs to start supplying a clock to the component.

The second power saving means includes a power supply control means for controlling supply/stop of power to each component of the information processing device, and a power supply control means for controlling supply/stop of power to each component of the information processing device, and a power supply control means for controlling power supply to each component when the component is not in use. It is determined whether or not the power supply can be stopped immediately, and if the power supply can be stopped immediately, the power supply control means is instructed to stop the power supply to the part concerned, and if the power supply can be stopped immediately, the If possible, instruct the power supply control means to stop supplying power to the component when the component remains unused for a certain period of time predetermined for each component. The device is configured to include a power supply stop means and a power supply start means for instructing the power supply control means to start supplying power to the component when the component is in use. be able to.

With the above configuration, the power consumption of one component (hardware device) can be controlled.

On the other hand, in order to control the power consumption of the CPU, the present invention
clock input stop means for stopping the input of the clock supplied from the clock supply control means when the CPU is in a state where there is no processing to be executed; and clock input starting means for starting input of the clock supplied from the supply control means.

Note that when multiple parts are combined into one composite part, it is not possible to supply/stop the clock or power to each part individually, so in this case, it is not possible to supply/stop the clock or power to each part. Accordingly, the composite component is provided with a clock supply control means for controlling supply/stop of clock to each component.

Specifically, the clock control means is a switch, and is constructed on the same semiconductor chip as the above component.

[Effect] Hereinafter, the effects of the present invention will be specifically explained.

In an information processing device that has a function of managing the usage state of a group of parts that implement a series of processes as a logical resource, there are multiple parts related to one resource, so for example, each resource and its related A resource/device management table for holding the correspondence with the parts to be used, and a device management table for holding the power control information for each part are provided.

The device management table includes, for each component, a "clock status" that indicates whether a clock is being supplied or not, a "power status" that indicates whether or not power is being supplied,
"Clock stop flag" that indicates whether it is possible to stop the clock supply to the component when the component is not in use, and the power supply to the component when the component is not in use. A "power stop flag" that indicates whether or not a stop is possible; a "timeout flag" that indicates whether or not it is possible to immediately stop the clock supply or power supply to the part when the part becomes unused; If it is not possible to stop the clock supply or power supply to the relevant component immediately, a "timeout period" value is maintained that indicates the value of a certain period of time until the clock supply or power supply to the relevant component is stopped. .

When the use of the above resource is started by a certain process, the parts related to the resource are found from the resource device management table, and each found part is displayed in the "clock status" and "power status" of the device management table. If the clock or power is not being supplied, start supplying it.6 Also, when the use of the above resource is finished, find the parts related to that resource from the resource device management table, and select the found parts. If is not used by any other process, then
Stop the clock supply or power supply as follows. Furthermore, if there are other resources that share the obtained component, after confirming that all of those resources are in an unused state, the clock supply or power supply is stopped as described below.

First, "clock stop flag", "power stop flag",
Referring to the "timeout flag", if the clock supply can be stopped immediately, the clock supply is stopped, and if the power supply can be stopped immediately, the power supply is stopped.

In addition, if it is not possible to stop the clock supply immediately, the clock supply will be stopped after the "timeout period" has elapsed.
If it is not possible to immediately stop the power supply.

After the "timeout period" has elapsed, the power supply is stopped.

This allows the supply of clocks and power to be stopped when the resource is no longer used and the parts related to that resource are no longer in use, and the supply of clocks and power is restarted when the resource is used again. Therefore, power is supplied only for the minimum period necessary for each hardware to operate, and power consumption during operation can be minimized.

At this time, the "clock stop flag,""power stop flag,""timeoutflag," and "timeout time" can be used to implement an appropriate power saving method for each hardware device. can be applied to hardware devices.

Furthermore, the CPU stops inputting the supplied clock when there is no processing to be executed, and starts inputting the supplied clock when an external interrupt occurs.

This allows the power consumption of the CPU, which consumes the largest amount of power, to be minimized.

Furthermore, when a process that must be performed by the CPU occurs due to an external interrupt, clock input is immediately started, so the speed of the process executed by the information processing device does not decrease.

(Margin below) [Example] An embodiment of the present invention will be described below with reference to the drawings.

First, the configuration of an information processing apparatus to which a power consumption control method according to an embodiment of the present invention is applied will be explained using FIG. 2.

In the figure, 1 is the arithmetic processing unit (CPU), 2 is the main memory (M
M), 3 is the clock generator (CG), 4 is the direct memory access controller (DMAC) + 5
is the power controller (PC), 6 is the display memory (V
RAM), 7 is a liquid crystal controller (LCDC), 8 is a liquid crystal display device (LCD), 9 is a backlight (BL),
10 is a floppy disk controller (FDC);
11 is a floppy disk driver (FDD), 12
is the communication controller (SCCI), 13 is the keyboard (KB), 14 is the communication controller (SCC2), 15
is a modem device i! (MU), 16 is a communication controller (SCC3), 17 is an image scanner (IS), 1
8 is a printer controller (PRC), 19 is a printer (PRT), 20 is a main path (MB), 21 is a power supply (PU), and 22 is a timer (TIM).

In FIG. 2, the CPU sequentially interprets programs stored in MM2, controls each peripheral device, and executes processing. and own C
The clock supplied from G3 can be stopped/restarted.

DMAC4 is an LSI for performing high-speed data transfer between MM2 and each peripheral device without going through the CPUI.

PC5 controls clock and power supply to each peripheral device. Specifically, clock switch 4
0 to 48 and the switches 31 to 34 for the PU21 are individually turned ON10FF.

The VRAM 6 stores the display contents of each dot on the LCD 5, and the LCDC 7 periodically reads the contents of the VRAM 6 and displays them on the LCD 8. The BL9 illuminates the LCD 8 from behind to provide an easy-to-read display.

FDCIO controls FDDI to read and write from and to the floppy disk.

In addition, 5CCI (12) controls KB13 to receive and receive key human power information, and 5CC2 (14) controls KB13.

The 5CC3 (16) controls the MU15 that transmits and receives data over the public line to perform communication processing, and the 5CC3 (16) controls the 1517 to perform processing to capture image data.

Further, the PRC 18 controls the PRT 19 to perform print processing. The TIM22 is used to measure one hour, and generates an interrupt to the CPU at regular time intervals.

These peripheral devices are coupled at MB20.

Data is exchanged via the MB 20.

In addition, PU21 is a sub-casing and has a separate power supply.
17. Power is supplied to all devices other than PRT19, and in the case of this embodiment, BL9. LCD8゜FDDII,
It is assumed that only MU15 is capable of 0N10FF power supply.

Next, the structure of software to be operated on the above hardware will be explained using FIG. 3.

In Figure 3 5 Operating System (OS) 6
2 has common functions necessary for operating the user's job. In addition, in order to realize the user's job, ○S
62 is called a program registration task 60.

○S62 has a multitask function that can execute multiple tasks 60 in parallel, and each task 60.

Achieves the desired function while controlling CPU processing and each input/output device.

Further, at 0562, hardware devices necessary for operation from the perspective of the task 60 are managed using the concept of logically abstracted resources so that the task 60 can easily use them.

For example, as hardware, FDCl,O.

DMAC4, FDDII, and floppy disks inserted into FDDII are collectively treated as a resource called "floppy disk" in ○S62, and VRAM6. L
CDC7, LCD8, etc. are treated as "display" resources. This allows the task 60 to utilize the functions of each hardware device without being aware of physical control of the hardware.

This 0862 has the following functional blocks.

(1) A task management block 63° that manages the operating status of the tasks 60 running on the O862 and controls the sequential allocation of CPU resources to each task 60. (2) Allocates memory resources to the programs and data of each task 60. , a memory management block 64° that is placed on the MMZ and manages the memory usage status (3) Input/output management that manages the usage status of each input/output resource and controls the sequential allocation of each input/output resource to each task 60 Block 65゜(4) Timer management block 66゜(5)○ Initialization of S62 and errors System management block 67 that performs processing Also, the part that controls the physical dependence of each input/output resource is called a physical device driver, and this physical device driver is prepared for each input/output resource, and these are controlled by the input/output management block. 65 realizes resource input/output processing.

In this embodiment, the physical device drivers include the floppy disk driver 68. keyboard driver 69
9 communication driver 70. Image scanner driver 71.
A printer dry puff 21 display driver 73 and the like are prepared.

In addition, when adding a new device, create a physical device driver for it and register it in ○S62.
From task 60, the device can be used as a resource.

Note that the means for calling the above function block 0862 from the task 60 is referred to here as a supervisor call (SV
C) Call it 61.

Next, how the task 60 and each input/output resource generally operate due to this ○S62 will be explained using FIG.

Here, we will take as an example a case where task A80 and task B81 operate in parallel, and each task has the same priority.

FIG. 4(a) is a diagram showing the processing contents of each task on the time axis.

First, task A80. Assuming that the tasks are executed in the order of task B81, CPU processing 85 of task A80 is started on a first-come, first-served basis. Thereafter, task A80 starts floppy disk input/output processing 86.

During that time, the CPU resources are no longer needed, so ○S62 allocates the vacant CPU resources to task B81, and
CPU processing 85 is started.

Here, if task B81 issues a floppy disk input/output request to 0862 before task A80's floppy disk input/output processing 86 is completed, task A8
Until the floppy disk input/output processing 86 of 0 is completed,
As shown by the broken line 9o, the OS62 controls the floppy disk input/output processing 86 of task B8 to wait.

Thereafter, task B81 repeats floppy disk input/output processing 86 and CPU processing 85, while task A
80 performs keyboard input processing 87 after executing CPU processing 85. During this time, the two tasks operate in parallel because there is no resource usage conflict between the tasks.

Thereafter, when the keyboard input processing 87 is completed, the task A 80 tries to execute the CPU processing 85, but since the task B 81 is executing the CPU processing 85, it is forced to wait until this is completed, as shown by a broken line 91. .

On the other hand, FIG. 4(b) shows a view of this from the perspective of the usage status of each resource.

CPU82. Floppy disk83. keyboard 8
It can be seen that each of the four resources is not always used, and as shown by the broken line 92, there are quite a number of resources that are not used by any task.

In addition, in information processing devices such as word processors that perform processing according to user input, multiple tasks rarely operate in parallel, and when a user performs an editing operation, Since processing is executed while sequentially using each resource, the usage rate of each resource in the actual usage state is considerably lower than that shown in FIG. 4.

As explained above, in multitasking ○S, each hardware device is managed in the form of a resource, and when a task actually operates, there is a state in which each resource is unused and vacant.

When this resource is in an empty state, the power consumed by the hardware devices that make up the resource becomes large.If the power consumption in this empty state can be reduced, the overall power consumption will be reduced without reducing the processing speed of the computer at all. It becomes possible to reduce the

Next, the power consumption management method provided in ○S62 of this embodiment for this purpose will be explained.

FIG. 5 shows 0362 that implements input/output control of task 6o.
It shows the program structure of , and the configuration of the queue and table used for input/output control of task 60,
FIG. 6 shows the flow of the process.

In FIG. 5(c), the task management table +10 is
This table manages the status of the task 60 running on the 0862, and the fields include a link pointer 111 to another task management table 11.0, priority of the task 60 112. A task status 113 indicating whether the task 60 is being executed or waiting for input/output. The program for task 6° is M
It consists of information such as memory occupancy information 114 indicating where on the MZ it is placed.

The input/output request management table 120 is a table for managing the status of input/output processing requested by the task 60, and contains link pointers 121. to other input/output request management tables +20 as fields. Task 6 making input/output requests
Pointer 122 to the task management table 110 of 0. Priority 123 of task 60. It consists of input/output request parameters 124 indicating the contents of input/output processing.

The timer management table 130 has timer control information used when processing is to be executed after a certain period of time, and includes link pointers 131 . to other timer management tables 130 as fields. Measurement time 132 to hold the remaining time until timeout. Timeout processing address 133 indicating a processing program to be executed at timeout. It consists of a device number 134 indicating which hardware device the timer is for.

In addition, in FIG. 5(b), the CPU queue 103 is stored from the header pointer 106 to the task management table 1]
0 connected by link pointer 111, and CP
It manages the order of tasks 60 that allocate U resources.

One input/output queue 104 is prepared for each input/output resource, and is a queue in which the header pointer 107 is connected to the input/output request management table 120 by a link pointer 121.

Note that each input/output request management table 120 is connected to the task management table 110 via a pointer 122 to the task management table 110 in order to manage which task 60 has received an input/output request. This input/output queue 104 manages the order in which each input/output resource is assigned to the task 60.

The timer end queue 105 links the timer management table 130 from the header pointer 107 to the link pointer 131.
It is a matrix connected by , and manages the state of each set timer.

Now, as shown in FIG. 5(a), when task 60 issues 5VC61, 0962 executes SVC processing 100. In addition, an interrupt 136 is generated from the input/output device 135.
When this occurs, interrupt processing 101 is executed.

5V where task 60 generates and starts another task 60
Upon issuing C61, 0862 executes SVC processing 1000 shown in the flowchart of FIG. 6(a) as SVC processing 100.

In the SvC processing 1000, first, step 101
0, task management table 11 of the specified program
0 is created, and in step 1020, the created task management table 110 is connected to the CPU queue 103.

At this time, the task management table 110 is connected so that the tasks are lined up in descending order of task priority 112, and in the case of the same priority, the task that is started first is connected so that it is lined up in the front.

Further, when the activated task 60 issues a 5VC 61 indicating the end of its own task, 0862 executes the SvC process 1100 shown in the flowchart of FIG. 6(1) as the SVC process 100.

In the SvC processing 1100, first, step 111
At step 0, the task management table 110 of the task 60 is removed from the CPU queue 103, and at step 1120, it is deleted.

Further, when the activated task 60 issues a 5VC 61 for requesting input/output of a certain resource, 0862 executes the SvC processing 1200 shown in the flowchart of FIG. 6(C) as the SVC processing 100.

In the SVC processing 1200, first, step 121
0, the input/output request management table 120 for the specified resource
In step 1220, this input/output request management table 120 is created as the input/output queue 10 of the target resource.
Connect to 4. The connection rule at this time is the order of priority, similar to the CPU queue 103.

Next, in step 1230, the task management table 110 of the task 60 that made the input/output request is stored in the CPU queue 10.
Input/output request IW Riko table 1 created by removing from 3
20 to the pointer 122 to the intra-task management table 110.

Finally, in step 1240, the actual hardware device is controlled to initiate input/output processing.

Conversely, when the resource input/output processing is completed, an interrupt 136 is generated from the input/output device 135, and 0362 executes the interrupt processing 1300 shown in the flowchart of FIG. 6(d) as the interrupt processing 101.

In the interrupt processing 1300, first, step 131
．． At step 0, devices related to input/output that need to be initialized so as not to interfere with other input/output requests are initialized, and at step 132o, input/output requests for resource input/output that have been processed are initialized. Remove the management table 120 from the input/output queue 104 and return it to the CPU queue 103,
At step 133o, the one person appearance request management table 120 is deleted.

Yoni Kono, 0562 (7) SVC! l&1eLOO
, i#I processing 101 is performed, a process called a dispatcher 102 is called, as shown in FIG. 5(a).

In this dispatcher 102, the CPU queue 103
, and resumes processing of task 60 indicated by the first task management table 110-1. If CPU queue 10
3 does not have the task management table 110, it becomes idle and loops within the dispatcher 102.

Through the processing described above, when the task 60 requests input/output, the task management table 110 is removed from the CPU queue 103, and execution of the CPU processing is made to wait until the input/output is completed.

Note that by performing such control within 0862,
By simply checking whether each input/output queue 104 or CPU queue 103 is empty, it is possible to determine whether the resource is being used.

(The following is a blank space.) Next, power consumption control processing performed using such 0862 resource management will be described.

FIG. 7 shows the structure of a table provided for this purpose, and FIG. 1 shows the flow of actual processing.

First, as a table, as shown in Figure 7(a),
A resource device management table 140 is provided.

This resource device management table 140 consists of a two-dimensional array consisting of a resource number 141 that uniquely indicates a resource on 0562, and a device number 142 that uniquely indicates a hardware device that actually operates individually. As such, each device has a flag indicating whether or not it is involved in the operation of a certain resource.

For example, in the case of #0 floppy disk resource.

For the input/output processing, #O DMAC, #5 FDC,
Thirty-six FDDs are used.

Note that in this table, the device number 142 is given to the target that controls the clock and power supply ON/○FF.

In addition, as shown in FIG. 7(b), device number 142
A device management table 150 is provided corresponding to each hardware device assigned.

There are two methods for controlling power consumption of these hardware devices.

First, the first classification is DMAC4°VRA, M
6. LSIs such as FDCIO require a power supply to maintain the internal state of the chip, but power consumption can be significantly reduced by stopping the clock supply, and LSIs such as FDDII and BL9゜MU15 In some cases, power consumption can be reduced by simply turning off the power supply.

The fields of the clock stop flag 151 and the power supply stop flag 152 control this.

respectively, when the hardware is not in use.
It indicates whether or not it is permissible to turn off the clock and power. As a value, rQJ indicates that it is not possible, and "1" indicates that it is possible.

On the other hand, the second classification is CPU and each peripheral LSI.
For example, when a hardware device is no longer in use, it is okay to turn off the clock or power immediately.For example, for FDD II, if the power is turned off frequently, the power may be consumed to restart the motor. I have consumed it,
LCDC7°LCD8. Like the BL9, when the power is turned off, the 1 display disappears, so make sure that it will not be used for a certain period of time, whether it is because it is not being used as a resource or because the power cannot be turned off immediately. These can be divided into those that require the clock to be turned off and those that require the clock to be turned off.

This is controlled by the timeout flag 153 and timeout period 154 fields.

The timeout flag 153 indicates whether or not the clock or power can be immediately turned off when the device is not in use. As a value, "0" indicates that it is allowed, and "1" indicates that it is not allowed.

The timeout time 154 is the timeout flag 153
is valid only when is "1", and determines how long the device will turn off the clock and power if it is not used.
It has a value for each device.

Clock status 155. The power status 156 is
It holds the status of whether or not the clock and power are being supplied to each device (rOJ: not supplied, rIJ: being supplied).

Next, power consumption control processing performed based on such a table will be explained using FIG. 1.

The resource power-on process 200 shown in the flowchart of FIG. 1(a) includes step 1230 and step 1240 in the resource input/output start process 1200 (FIG. 6(C)) performed as the SvC process 100 of FIG. This is a process added between.

First, in step 210, the hardware device used by the input/output resource for which access is requested is determined by searching the resource device management table 140 for a device with a value of "1".

Then, for each determined device, steps 220~
The process of step 319 is repeated.

That is, in step 220, the timeout flag 153 of the device is checked.

In this embodiment, this timeout flag 153 is "1".
In order to save power, the power supply and clock are turned off only when the device is not used for a certain period of time.

To this end, when resources are finished being used, for time measurement purposes,
If a timer is set but the resource is reclaimed before the timer expires, the timer is canceled 6. That is, in step 230, the timer expiration queue 10 is
5, a timer management table 130 having the device number 134 of the device involved in the resource for which access was requested.
If found, the timer management table 130 is deleted from the timer termination queue 105 in step 240, and timer measurement is stopped.

Next, in step 250, if the clock status 155 is "O" (not supplied), then in step 260, the value is set to "
1” (currently being supplied), and in step 270, PC5
Start supplying the clock to the target device via the .

Also, in step 280, similarly, the power status 15
If 6 is "O" (not supplied), then in step 290 the value is changed to "l" (supplied) and in step 300.

Power supply to the target device is started via the PC5.

After performing the above processing for all devices involved in the resource to be accessed (step 310), the process shown in FIG. 6 (C
) By performing the process shown in step 1240, normal operation of the hardware device is guaranteed.

The resource power-off process 400 shown in the flowchart of FIG. 1(b) is a process performed immediately after the input/output completion process 1300 (FIG. 6(d)) performed as the interrupt process 101 of FIG.

After deleting the input/output request management table 130 to which access has been completed according to the input/output completion processing 1300, first, in step 4)0, devices involved in the resource to which access has been completed are deleted from the resource device management table. 140 is "1" by searching for a device.

Then, for each determined device, steps 420 to
The process of step 510 is repeated.

That is, in step 420, it is determined by referring to the resource device management table 140 whether there are other resources related to the device, and if there are, all resources related to the device are checked. Check whether all input/output queues 104 are empty.

In step 420, if there is no resource being processed, the timeout flag 153 is checked in step 430, and if it is "1", in step 440, after the access is completed, if there is no access for a certain period of time, the power supply or a Since it is necessary to turn off the timer, a timer management table 130 is generated, connected to the timer termination queue 105, and time measurement is started.

At this time, measurement time 13 of timer management table 1.30
2, the value of the timeout period 154 of the device management table 15o is initially set, the timeout processing address 133 is set with the execution address of the timeout processing prepared according to each device, and the device number 134 is set with the value of the timeout processing execution address prepared for each device. Set the number of completed devices.

On the other hand, if the timeout flag 153 is "0" in step 430, the clock stop flag 151 is checked in step 450, and if it is "1" (stoppable), the value of the clock status 155 is set to "0" in step 460. ”
(not supplied), and in step 470, the clock supply to the target device is stopped via the PC 5.

Also, in step 480, similarly, the power stop flag 15
2 is also checked, and if it is "1" (can be stopped), in step 490, the value of the power status 156 is changed to "O" (not supplied), and in step 500, power is supplied to the target device via the PC 5. Stop supply.

With the above processing, the power supply and clock can be stopped immediately after all devices that are no longer in use are checked at the timing when input/output is completed (step 510).

In addition, by managing the relationship between devices and resources using the resource device management table 140, for example, D M
Even for devices shared by multiple resources, such as A and C4, whether or not they are in use can be easily determined by checking the status of the input/output queue 104 of all corresponding resources.

Next, the timeout flag 153 is "1", that is,
We will explain the case of a device that stops the power supply and clock if it is not used for a certain period of time.

In the resource power-off process 400 shown in the flowchart of FIG. 1(b), when a timer is set in step 440, the timer interrupt process 600 shown in the flowchart of FIG. 1(c) occurs at regular intervals.

In the timer interrupt processing 600, the timer termination queue 10
The following processing is performed for each timer management table 130 of No. 5.

First, in step 610, the timer interrupt cycle time is subtracted from the measurement time 620, and in step 620, the measurement time 6
20 is less than "O", that is, when the time initially set in the timer management table 130 has elapsed.

The timeout process 700 indicated by the timeout process address 133 is executed.

In the timeout processing 700, as shown in the flowchart of FIG. 1(d), first, in step 710, the timer management table 130 whose time has expired is removed from the timer termination queue 105, and in step 720, the clock stop flag is set. If the clock status 151 is "1" (stoppable), the value of the clock status 155 is set to "○" in step 730.
(not supplied), and in step 740, the clock supply to the target device is stopped.

Further, in step 750, the power stop flag 152 is set to “I
J (can be stopped), the value of the power status 156 is changed to "0" (not supplied) in step 760.

At step 770, power supply to the target device is stopped.

Through the above processing, when the device is not used for the time set in advance in the timeout time 154 of the device management table 150 of each device, power or clock supply to the device is stopped, thereby saving power.

As shown in the flowchart of FIG. 1(a), the stopped power supply or clock is restarted when the device starts inputting/outputting the resources involved.

Next, power consumption control processing 800 for CPU resources is shown in the flowchart of FIG. 1(e).

This process is performed by the dispatcher 102 shown in FIG.

Conventionally, in the debatcher 102, the CPU queue 103
(corresponding to step 820), C
When there is no task management table 110 in the PU queue 103, that is, when there is no task 60 to be executed by the CPU, the task enters an idle state and simply repeats a loop within the dispatcher 102.

In this embodiment, when entering the idle state, as shown in step 830, the CPU issues a sleeve command, which stops the CPU's own clock and wastes time when the CPU is in the idle state. Prevented power consumption from occurring.

When an interrupt occurs from the outside, the stopped CPUI immediately starts receiving clocks and executes interrupt processing, so there is no problem in controlling each peripheral hardware device.

Furthermore, when the interrupt processing is completed, the dispatcher 102
The processing returns to step 810, the input/output is completed by the interrupt processing, and the task! is added to the CPU queue 103. If the management table 110 is connected, execute the task 60,
If it is not connected, it will continue to issue sleeve commands.

As explained above, according to the present embodiment, for a device capable of supplying a clock or power 0N10FF in real time, by immediately stopping the supply of the clock or power while the device is not in use, without slowing down execution.

Power consumption of each device can be reduced.

Also, clock or power supply can be controlled by 0N10 in real time.
Also regarding devices that cannot be FF.

By using the timer management block 66 of 0862, it is possible to save power when the device is left unused by stopping the clock or power supply to the device that has not been used for a certain period of time.

Therefore, even while the user is actually using the information processing device, the clock and power supply to parts of the device unrelated to the user's processing can be stopped at any time, which affects processing speed. Therefore, the power consumption of the entire information processing device can be suppressed to the maximum limit without giving the power consumption.

In particular, one task is executed sequentially in response to key human input from the user, and the usage rate of the CPU and each peripheral device is a few percent.
In word processors and personal computers, where the power consumption is often only a few dozen percent, significant power savings can be achieved.

The above embodiment has been described on the assumption that the peripheral LSI is a C-MOS static type.

For dynamic LSI devices whose clock cannot be stopped, the PC 5 is provided with a function that changes the clock frequency to the lowest operable value instead of stopping the clock, and the same method as in the above embodiment is used. A similar effect can be obtained by controlling.

Furthermore, in the above embodiment, power consumption is suppressed by controlling the clock supply to each LSI, but recently, as LSIs have become more highly integrated, various functions can be combined into one LSI. In such control of clock supply to LSIs, it is difficult to effectively save power.

For example, in an LSI that includes a CPU, DMAC, and SCC all at once, power consumption can be reduced by stopping the clock to the LSI only when all of these are not used at the same time.

Therefore, in order to improve this problem, a switch is provided in the LSI chip that independently controls the clock supply for each component, and a mechanism that allows this switch to be turned on and off at will using an external signal from the LSI is developed. One possible method is to provide Such a switch can be easily realized using conventional semiconductor devices.

By adopting the above method, it is possible to perform detailed power consumption control according to the usage state of resources, even in LSIs that incorporate various functions and are becoming increasingly highly integrated.

[Effects of the Invention] As explained above, according to the present invention, it is possible to supply clocks and power to each hardware device only while it is being used, and to stop supplying them when they are no longer being used. There is an effect that it can be done.

Therefore, even while the user is actually using the information processing device, the power supply to hardware devices unrelated to the user's processing can be stopped at any time, so processing speed is not affected. There is an effect that the power consumption of the entire information processing device can be minimized without power consumption.

[Brief explanation of the drawing]

FIG. 1 is a flowchart showing the processing of a power consumption control method according to an embodiment of the present invention, FIG. 2 is a block diagram showing the hardware configuration of an information processing device to which the power consumption control method of this embodiment is applied, and FIG. Fig. 3 is a block diagram showing the software configuration in this embodiment, Fig. 4 is an explanatory diagram showing the operation of multitasking ○S, Fig. 5 is a processing structure of multitasking O8,
FIG. 6 is an explanatory diagram showing the queue and table structure, FIG. 6 is a flowchart showing the task control processing and input/output control processing of multitasking O8, and FIG. 7 is an explanatory diagram showing the table structure in this embodiment. 1... Arithmetic processing unit (CPU), 2... Main memory (
MM), 3... Clock generator'ta (CG), 4
...Direct memory access controller (
DMAC), 5...power controller (pc)
, 6... Display memory (VRAM), 7... Liquid crystal controller (LCDC), 8... Liquid crystal display device (LCD),
9... Backlight (BL), 10... Floppy disk controller (FDC), 11... Floppy disk drive (FDD) + 12... Communication controller (SCCI), 1.3 Keyboard (
KB)-14...Communication controller (SCC2), 1
5...Modem device (MU), 16...Communication controller (SCC3), 17...Image scanner (
Is), 18...Printer controller (PRC)-
19...Printer (PRT), 20...Main bus (
MB), 21...Power supply (PU), 60...Task, 61...Supervisor call (SVC), 62.
・Operating system (O3), 103・
...CPU queue, ]04...Entering power queue, 1
05...Timer end queue, 110...Task management table, 120...I/O request management table, 1
30... Timer management table, 140... Resource device management table, 150... Device management table.

Claims (1)

[Scope of Claims] 1. Clock supply control means for controlling supply/stop of clock to each component of an information processing device, and stopping clock supply to the component when the component becomes unused. a clock supply stop means for instructing the clock supply control means to stop supplying the clock to the component, if the clock supply can be stopped; a first power saving means, comprising a clock supply start means for instructing the clock supply control means to start supplying a clock to the component when the stopped component becomes in use; Power supply/supply for individual parts of information processing equipment
a power supply control means for controlling the stop; and a power supply control means for determining whether or not it is possible to stop the power supply to the part when the part becomes unused, and if it is possible to stop the power supply, the power supply control means; a power supply stopping means for instructing the means to stop the supply of power to the component; and a power supply control means for instructing the power supply control means to stop the power supply to the component when the component to which the power supply has been stopped is in use. , and a second power saving means provided with a power supply start means for instructing to start supplying power to the component. 2. A clock supply control means for controlling the supply/stop of a clock for each component of the information processing device, a clock switching means for switching the frequency of the clock between a value during normal operation and a lower value, and the above-mentioned When a component becomes unused, it is determined whether the clock supply to the component can be stopped, and if the clock supply can be stopped, the clock supply control means is instructed to stop the clock supply to the component. clock supply stop means for instructing the clock supply to stop, and if it is impossible to stop the clock supply, for instructing the clock switching means to lower the clock frequency to a value lower than that during normal operation; When the component whose clock frequency has been stopped becomes in use, the clock supply control means is instructed to start supplying the clock to the component, and the component whose clock frequency has been lowered becomes in use. 2. A power consumption control method, comprising: a clock supply start means for instructing the clock switching means to return the clock frequency to the value during normal operation when the clock frequency is changed to the normal operation value. 3. Whether there is a clock supply control means that controls the supply/stop of the clock for each component of the information processing device, and whether it is possible to immediately stop the clock supply to the component when the component becomes unused. If it is possible to immediately stop the clock supply, the clock supply control means is instructed to stop the clock supply to the part concerned, and if it is not possible to stop the clock supply immediately, the clock supply control means is Clock supply stop means for instructing the clock supply control means to stop supplying clocks to the component when the component continues to be in an unused state for a predetermined period of time; and the component. a first power saving means comprising a clock supply start means for instructing the clock supply control means to start supplying a clock to the information processing device when the information processing device is in use; A power supply control means that controls the supply/stop of power to each component, and a power supply control means that determines whether it is possible to immediately stop the power supply to the component when the component becomes unused, and then controls the power supply. If stopping is possible immediately,
Instructs the power supply control means to stop supplying power to the component, and if stopping the power supply immediately is not possible, the component remains unused for a certain period of time predetermined for each component. power supply stop means for instructing the power supply control means to stop supplying power to the component when the component continues to be in use; Power consumption control characterized by comprising at least one of the following: a power supply start means for instructing the means to start supplying power to the component; and a second power saving means. method. 4. When there is no process to be executed,
Clock input stop means for stopping the input of the clock supplied from the clock supply control means; and clock input start means for starting the input of the clock supplied from the clock supply control means when an external interrupt occurs. 4. The power consumption control method according to claim 1, further comprising an arithmetic processing unit provided with: 5. In an information processing device that has a function of managing the usage status of a group of parts that realize a series of processes as logical resources, the correspondence between each resource and its related parts and power control information for each part. and when the use of the above resources is started by a certain process, if the supply of power to the related parts has been stopped, the supply of power to the parts concerned is started and the use of the above resources is stopped. 1. A power consumption control method, characterized in that when the process ends, if the related component is not being used by another process, the power supply to the component is stopped. 6. In an information processing device that has the function of managing the usage status of a group of parts that realize a series of processes by treating them as logical resources, the correspondence between each resource and its related parts and the power control information for each part. and when the use of the above resources is started by a certain process, if the supply of power to the related parts has been stopped, the supply of power to the parts concerned is started and the use of the above resources is stopped. When the process is finished, if the related parts are not being used by other processes, a predetermined period of time is measured for each part, and after the certain period of time has elapsed, power is supplied to the part. A power consumption control method characterized in that the measurement is stopped when the use of the part is restarted within the certain period of time. 7. In an information processing device that has the function of managing the usage status of a group of parts that realize a series of processes as logical resources, the correspondence between each resource and its related parts and power control information for each part. A clock supply control means for controlling supply/stop of clock for each component; A power supply control means for controlling supply/stop of power for each component; When resource usage begins,
If the supply of the clock to the related component is stopped, a clock supply start means for instructing the clock supply control means to start supplying the clock to the component, and use of the resource is terminated. At this time, if the related component is not being used by other processing, it is determined whether or not it is possible to immediately stop the clock supply to the component, and if it is possible to immediately stop the clock supply, the clock supply control means to stop the clock supply to the part concerned, and if it is not possible to stop the clock supply immediately, when the part remains unused for a certain period of time predetermined for each part. a clock supply stop means for instructing the clock supply control means to stop supplying clocks to the component; and when use of the resource is started by a certain process,
If the power supply to the relevant parts is cut off,
a power supply start means for instructing the power supply control means to start supplying power to the component; and a power supply start means for instructing the power supply control means to start supplying power to the component; If so, it is determined whether or not it is possible to immediately stop the power supply to the component, and if it is possible to immediately stop the power supply, the power supply control means,
If it is not possible to stop the power supply immediately, the power supply will be turned off when the part remains unused for a certain period of time predetermined for each part. A power consumption control method comprising: power supply stop means for instructing the supply control means to stop supplying power to the component. 8. The resource management means includes, for each component related to each resource, information indicating whether a clock is being supplied to the component, information indicating whether power is being supplied to the component, and information indicating whether the component is being supplied with power. Information indicating whether it is possible to immediately stop the clock supply to the component when it becomes unused, and if it is not possible to immediately stop the clock supply to the component when the component becomes unused. For example, the value of a certain period of time until the clock supply to the component is stopped, information indicating whether it is possible to immediately stop the power supply to the component when the component becomes unused, and the component. is characterized by holding a value for a certain period of time until the power supply to the part is stopped if it is not possible to stop the power supply to the part immediately when the part becomes unused. Claim 7
Power consumption control method described. 9. A composite component configured by combining a plurality of components into one, characterized in that it is provided with clock supply control means for controlling supply/stop of clock to each component in response to instructions from the outside. parts. 10. The composite component according to claim 9, wherein the clock control means is constructed on the same semiconductor chip as the component.