JPH04196645A - Ultrahigh speed digital modulator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides an amplitude phase modulation (QAM) method and a phase variation t
)1 (PSK) system, the present invention relates to an ultra-high-speed digital modulator suitable for modulating ultra-high-speed digital signals.

[Conventional technology]

By applying digital signal processing technology and performing all modulation processing in digital circuits, digital modulators have been put into practical use that eliminate the need for modulator adjustment.

FIG. 5 is a block diagram showing the configuration of a conventional digital modulator used for multilevel amplitude phase modulation.

In the figure, waveform ROMs 51 . ．． In 51□, amplitude values of respective corresponding carrier signals are stored as data. The amplitude value of the carrier signal corresponding to each channel is sequentially read out from each waveform ROM 511.51□ using a carrier signal generation lock-operated counter 52. ．． 53□
sent to. In the digital multiplier 531.53□,
The baseband signal of each channel is sequentially multiplied by each amplitude value of the carrier signal, and a digital adder 54 adds the multiplication results corresponding to each channel.

The output of the digital adder 54 is connected to a digital-to-analog converter (D/A) 55 and a bandpass filter (BPF).
) 56 as a modulated signal.

[Problem to be solved by the invention]

In such a conventional digital modulator configuration, when the carrier signal is regenerated by sampling it by a factor of n, the digital multiplier, ROM, and other digital elements must operate at a speed n times the carrier signal frequency. No.

However, since there is a limit to the operating speed of digital devices, the upper limit of the carrier signal frequency is limited to 1/n of the maximum operating speed of those digital devices. That is, the transmission capacity (signal speed) has been limited by the operational limits of the digital elements constituting the digital modulator.

SUMMARY OF THE INVENTION An object of the present invention is to provide an ultra-high-speed digital modulator that can increase the carrier signal frequency to the same level as the maximum operating speed of a digital element and expand transmission capacity.

[Means for Solving the Problems] FIG. 1 is a block diagram showing the basic configuration of an ultrahigh-speed digital modulator of the present invention.

The present invention provides a digital modulator that inputs n-sequence baseband digital signals and performs modulation processing by calculation with the amplitude value of a carrier signal. m individual modulators that perform modulation calculation processing using amplitude values corresponding to the phases and output modulation calculation results at a signal speed r;
A parallel circuit that takes in the m modulation calculation results output from each of the individual modulators, converts them into serial signals according to the phase order of the amplitude values given to each individual modulator, and outputs them as modulation signals at a signal speed m−r. / serial converter.

[Function] The present invention performs modulation calculation processing individually at a predetermined sampling phase of a carrier signal in a plurality of individual modulators, and synthesizes the individually processed calculation results in phase order using a parallel/serial converter. Thus, a modulated signal can be obtained.

Therefore, the operating speed of the individual modulator can be kept low, and the parallel/serial converter can operate at a higher speed than the digital multiplier and ROM of the individual modulator. This makes it possible to increase the speed to the same level as the maximum operating speed.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention. In this embodiment, a case will be described in which eight samples are used as the carrier signal.

In the figure, an n-series input signal in which n bits are input in parallel is divided into two, and is processed as a channel baseband signal and a Q-channel baseband signal by digital filters 21, . 21. is input and roll-off waveform shaping is performed. Digital filter 21 for each channel. ．． The output signals of 21□ are sent to individual modulators 22, to 22. A modulation calculation process is performed on the amplitude value corresponding to each phase of the carrier signal, and a calculation result of the signal speed r (bps) is output for each phase. Each individual modulator 22. ~22. The output signal is input to a parallel/serial converter (P/5) 23 and converted into a serial signal, and then, as in the conventional configuration, a digital/analog converter (D/A) 55 and a band pass filter (BPF) are input. 56 as a modulated signal.

Here, a configuration example of the individual modulators 221 to 228 is shown in FIG. 3, and the amplitude values corresponding to each phase of the carrier signal given to each individual modulator and the phase order of the conversion operation in the parallel/serial converter 23 Figure 4 shows the relationship between

Each individual modulator 22. 228, fixed amplitude values corresponding to the predetermined phase of the carrier signal are given to each channel and Q channel, respectively, and the digital multipliers 311, 3L and digital adder 32 simultaneously combine the amplitude values with each other. The signal is subjected to modulation calculation processing and sent to the parallel/serial converter 23. In the parallel/serial converter 23, each individual modulator 221-22. By performing parallel/serial conversion processing according to the phase order of the amplitude values given to , it is possible to realize the same modulation calculation function as a conventional digital modulator.

[Effects of the Invention] As described above, the present invention can easily increase the carrier signal frequency to the maximum operating speed of each digital element by processing modulation calculations in parallel using a plurality of individual modulators. Transmission capacity can be expanded.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of the present invention. FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 3 is a block diagram showing an example of the configuration of an individual modulator. FIG. 4 is a diagram for explaining the relationship between the amplitude values corresponding to each phase of the carrier signal given to each individual modulator and the phase order of the conversion operation in the parallel/serial converter. FIG. 5 is a block diagram showing the configuration of a conventional digital modulator used for multilevel amplitude phase modulation. 21... Digital filter, 22... Individual modulator, 23... Parallel/serial converter (P/S), 3
1... Digital multiplier, 32... Digital adder, 51... Waveform ROM, 52... Counter, 53
...Digital multiplier, 54...Digital adder, 55...Digital/analog converter (A/D)
, 56...Band pass filter (BPF). Figure 1 Figure 3

Claims (1)

[Claims] (1) Input n series of baseband digital signals,
In a digital modulator that performs modulation processing by calculation with an amplitude value of a carrier signal, each of the n-sequence signals is taken in, and modulation calculation processing is performed using an amplitude value corresponding to a predetermined phase of the m-sampled carrier signal, m individual modulators that output modulation calculation results at a signal speed r, and m individual modulation calculation results output from each of the individual modulators, and according to the phase order of the amplitude value given to each individual modulator. Parallel / converts to serial signal and outputs as modulated signal at signal speed
An ultra-high-speed digital modulator characterized by comprising a serial converter.