JPH04198775A - Electrostatic breakdown testing method for semiconductor device - Google Patents

Electrostatic breakdown testing method for semiconductor device

Info

Publication number
JPH04198775A
JPH04198775A JP2335345A JP33534590A JPH04198775A JP H04198775 A JPH04198775 A JP H04198775A JP 2335345 A JP2335345 A JP 2335345A JP 33534590 A JP33534590 A JP 33534590A JP H04198775 A JPH04198775 A JP H04198775A
Authority
JP
Japan
Prior art keywords
semiconductor device
chip
voltage
outer mold
electrostatic breakdown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2335345A
Other languages
Japanese (ja)
Inventor
Susumu Mizobe
溝部 進
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2335345A priority Critical patent/JPH04198775A/en
Publication of JPH04198775A publication Critical patent/JPH04198775A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To improve the reliability of test data by connecting an outer mold and an electric wiring with a liquid. CONSTITUTION:When a switch 3 is closed to apply the voltage generated by a DC power source 2 to the external lead of a semiconductor device 1, the voltage is applied to an IC chip via a connected internal lead. The IC chip is connected to a metal bar 5 from a conducting liquid 6 via the outer mold of the device 1, the outer mold serves as a capacitor, and a charging current flows in the IC chip. The applied voltage is increased or decreased to change the voltage or current applied to the IC chip, and the actions are repeated until it breaks down. The connecting property between the outer mold and an electric wiring is improved, the reproducibility of connection is improved, and the reliability of the test data can be improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体デバイスの静電破壊試験方法に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for testing electrostatic discharge damage of semiconductor devices.

〔従来の技術〕[Conventional technology]

従来の半導体デバイスの静電破壊試験方法として第2図
に示すものがあった。図において、(1)は半導体デバ
イス(被試験試料) 、(21は直流電源、(3)は直
流電源(2)を半導体デバイス(1)に接続するスイッ
チ、(4)は半導体デバイス(1)の外装モールド部に
接触させた導電性例えばゴムなどのマットを示す。
A conventional electrostatic breakdown test method for semiconductor devices is shown in FIG. In the figure, (1) is the semiconductor device (test sample), (21 is the DC power supply, (3) is the switch that connects the DC power supply (2) to the semiconductor device (1), and (4) is the semiconductor device (1). A conductive mat, such as rubber, is shown in contact with the outer mold part of the.

次に動作について説明する。Next, the operation will be explained.

直流電源(2)で発生させた電圧をスイッチ(3)を閉
じろことにより、半導体デバイス(1)の外部リードに
印加すると、これに接続された内部リードを経由してI
Cチップに電圧が印加される。ICチップは半導体デバ
イス(1)の外装モールドを経て、導電性マツ!・4に
接続されるため、外装モールドがコンデンサとして作動
し、このコンデンサを充電するための電流がICチップ
内を流れる。この時に印加される直流電圧値を増減させ
て、ICチップに引加される電圧又は電流を変化させI
Cチップが破壊するまで、この動作を繰9返し実施する
When the voltage generated by the DC power source (2) is applied to the external lead of the semiconductor device (1) by closing the switch (3), the voltage is applied to the external lead of the semiconductor device (1) via the internal lead connected to it.
A voltage is applied to the C chip. After passing through the exterior mold of the semiconductor device (1), the IC chip is made of conductive pine!・Since it is connected to 4, the outer mold acts as a capacitor, and a current flows inside the IC chip to charge this capacitor. The DC voltage value applied at this time is increased or decreased to change the voltage or current applied to the IC chip.
This operation is repeated nine times until the C chip is destroyed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の半導体デバイスの静電破壊試験方法は、以下のよ
うに構成されていたので、半導体デバイスの外装モール
ドとの接触を導電性マットで取っており、固体と固体の
接触であるため、半導体デバイスを接続した時の接触抵
抗がその都度変化するという問題点があった。
The conventional electrostatic breakdown test method for semiconductor devices was configured as follows. Contact with the exterior mold of the semiconductor device is made with a conductive mat, and since it is a solid-to-solid contact, the semiconductor device There was a problem in that the contact resistance changed each time the two were connected.

この発明は上記の問題点を解決するためになされたもの
で、半導体デバイスの外装モールドと電気配線との結合
性を良くするとともに、再現性も改善された半導体デバ
イスの静電破壊試験方法を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and provides a method for electrostatic discharge damage testing for semiconductor devices that improves the connectivity between the exterior mold of a semiconductor device and electrical wiring, and also improves reproducibility. The purpose is to

〔lI!題をM訣するための手段〕[lI! Means to solve the problem〕

この発明に係る半導体デバイスの静電破壊試験方法は、
半導体デバイスの外装モールドを導電性を有する液体に
浸し、この液体と電気配線との結合を金属棒によって行
うようにしたものである。
The electrostatic breakdown test method for semiconductor devices according to the present invention includes:
The exterior mold of the semiconductor device is immersed in a conductive liquid, and the liquid and electrical wiring are connected using a metal rod.

〔作用〕[Effect]

この発明における半導体デバイスの静電破壊試験方法は
、半導体デバイスの外装モールドを導体電性を有する液
体に浸すようにしたので、半導体デバイスの外装モール
ドと電気配線との結合が良好となる。
In the electrostatic breakdown test method for a semiconductor device according to the present invention, the exterior mold of the semiconductor device is immersed in a liquid having conductive properties, so that the exterior mold of the semiconductor device and the electrical wiring can be bonded well.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図において、(6)は導電性を有する液体、(7)
は液体(6)を入れるきょう体、(5)は液体(6)と
電気配線との結合を行う金属棒を示す。なお、図中符号
(1)〜(3)は前記従来のものと同一につきその説明
は省略する。
In Figure 1, (6) is a conductive liquid, (7)
(5) is a metal rod that connects the liquid (6) with electrical wiring. Note that the reference numerals (1) to (3) in the figure are the same as those of the above-mentioned conventional device, and the explanation thereof will be omitted.

次に動作について説明する。直流電源(2)で発生させ
た電圧をスイッチ(3)を閉じることにより、半導体デ
バイス(11の外部リードに印加すると、これに接続さ
れた内部リードを経由してICチップに電圧が印加され
る。ICチップは半導体デバイス(11の外装モールド
を経て、導電性のある液体(6)から金属棒(5)に接
続されているため、外装モールドがコンデンサとして作
用し、このコンデンサを充電するための電流がICチッ
プ内を流れる。
Next, the operation will be explained. When the voltage generated by the DC power supply (2) is applied to the external lead of the semiconductor device (11) by closing the switch (3), the voltage is applied to the IC chip via the internal lead connected to this. Since the IC chip is connected to the metal rod (5) through the conductive liquid (6) through the semiconductor device (11), the exterior mold acts as a capacitor, and the capacitor is charged. Current flows within the IC chip.

この時に印加する電圧を増減させて、ICチップに印加
されろ電圧又は電流を変化させ、ICチップが破壊する
まで上記動作を繰り返し実施する。
The voltage applied at this time is increased or decreased to change the voltage or current applied to the IC chip, and the above operation is repeated until the IC chip is destroyed.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、半導体デバイスの外装
モールドと電気配線との結合を液体で行うようにしたの
で、外装モールドと電気配線との結合性が向上するとと
もに、結合の再現性も大幅に改善され、得られる試験デ
ータの信頼度が大幅に向上する効果がある。
As described above, according to the present invention, since the exterior mold of a semiconductor device and the electrical wiring are bonded using liquid, the connectivity between the exterior mold and the electrical wiring is improved, and the reproducibility of the coupling is also significantly improved. This has the effect of greatly improving the reliability of the test data obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例である半導体デバイスの静
電破壊試験装置の断面構造図、第2図は従来の半導体デ
バイスの静電破壊試験方法の断面構造図である。図にお
いて、(1)は半導体デバイス、(2)は直流電源、(
3)はスイッチ、(5)は金属棒、(6)は液体、(7
)はきょう体を示す。 なお、図中、同一符号は同一、または相当部分を示す。
FIG. 1 is a cross-sectional structural diagram of an electrostatic discharge breakdown testing apparatus for semiconductor devices which is an embodiment of the present invention, and FIG. 2 is a cross-sectional structural diagram of a conventional electrostatic discharge breakdown testing method for semiconductor devices. In the figure, (1) is a semiconductor device, (2) is a DC power supply, (
3) is a switch, (5) is a metal rod, (6) is a liquid, (7
) indicates a body. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] 静電破壊試験方法の1つである疑似パッケージ帯電法に
おいて、半導体デバイスのパッケージと試験端子の接触
面に液体を入れて、接触性を改善したことを特徴とする
半導体デバイスの静電破壊試験方法。
A method for testing electrostatic breakdown of semiconductor devices, which is characterized in that in the pseudo package charging method, which is one of the electrostatic breakdown testing methods, a liquid is poured into the contact surface between the package of the semiconductor device and the test terminal to improve contact properties. .
JP2335345A 1990-11-28 1990-11-28 Electrostatic breakdown testing method for semiconductor device Pending JPH04198775A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2335345A JPH04198775A (en) 1990-11-28 1990-11-28 Electrostatic breakdown testing method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2335345A JPH04198775A (en) 1990-11-28 1990-11-28 Electrostatic breakdown testing method for semiconductor device

Publications (1)

Publication Number Publication Date
JPH04198775A true JPH04198775A (en) 1992-07-20

Family

ID=18287486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2335345A Pending JPH04198775A (en) 1990-11-28 1990-11-28 Electrostatic breakdown testing method for semiconductor device

Country Status (1)

Country Link
JP (1) JPH04198775A (en)

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