JPH042031U - - Google Patents
Info
- Publication number
- JPH042031U JPH042031U JP1990041824U JP4182490U JPH042031U JP H042031 U JPH042031 U JP H042031U JP 1990041824 U JP1990041824 U JP 1990041824U JP 4182490 U JP4182490 U JP 4182490U JP H042031 U JPH042031 U JP H042031U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor integrated
- correcting
- utility
- manufacturing apparatus
- function
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/926—Multiple bond pads having different sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Description
第1図は本考案の実施例を示す図である。第2
図は従来のボンデイング位置修正方法を示す図で
ある。
1……ICチツプ、2……ボンデイングパツド
、3……インナーリード、4……マンピユレータ
。
FIG. 1 is a diagram showing an embodiment of the present invention. Second
The figure shows a conventional bonding position correction method. 1...IC chip, 2...bonding pad, 3...inner lead, 4...manpilator.
Claims (1)
て、ボンデイング位置修正時の修正可能範囲を任
意に設定できる機能を有することを特徴とする半
導体集積回路製造装置。 A semiconductor integrated circuit manufacturing apparatus having a function of arbitrarily setting a correctable range when correcting a bonding position in wire bonding of semiconductor integrated circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990041824U JP2514007Y2 (en) | 1990-04-19 | 1990-04-19 | Semiconductor integrated circuit manufacturing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990041824U JP2514007Y2 (en) | 1990-04-19 | 1990-04-19 | Semiconductor integrated circuit manufacturing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH042031U true JPH042031U (en) | 1992-01-09 |
| JP2514007Y2 JP2514007Y2 (en) | 1996-10-16 |
Family
ID=31552824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990041824U Expired - Lifetime JP2514007Y2 (en) | 1990-04-19 | 1990-04-19 | Semiconductor integrated circuit manufacturing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2514007Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0212932A (en) * | 1988-06-30 | 1990-01-17 | Mitsubishi Electric Corp | Wire bonding apparatus |
-
1990
- 1990-04-19 JP JP1990041824U patent/JP2514007Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0212932A (en) * | 1988-06-30 | 1990-01-17 | Mitsubishi Electric Corp | Wire bonding apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2514007Y2 (en) | 1996-10-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |