JPH042037B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a novel pedestal signal generation circuit, and in particular, to adjusting the pedestal level when video information arrives in each horizontal period without unnecessarily complicating the circuit configuration. The present invention aims to provide a novel pedestal signal generation circuit that enables the following.

Technical Background In a color video camera circuit, a luminance signal M and chroma signals I and Q are processed to obtain a color encoded signal, a so-called black burst signal is formed, and the black burst signal is added to the color encoded signal. A video signal is created by The black burst signal added to the color encode signal is obtained by giving a pedestal level to a signal consisting of an H/V synchronization signal and a burst signal. By the way, the size of the pedestal level is predetermined,
If the video signal is formed by, for example, an 8-bit binary signal, it is set to "60". Then, the composite signal obtained by adding the black burst signal whose pedestal level is set to "60" and the color encoded signal will create an almost black image if the level of the color information part is "60". has been done. However, as a practical matter, a completely black area captured by a camera does not appear as a completely black image on the screen of a television receiver, and people have slightly different perceptions of color. Therefore, the characteristics of the camera,
There is a demand for a system in which the pedestal level can be changed at the time of arrival of video information in each horizontal period according to the judgment of the videographer based on the situation of the shooting site, the intended video effect, etc.

Purpose: Therefore, the present invention seeks to provide a novel pedestal signal generation circuit that is capable of adjusting the pedestal level when video information arrives in each horizontal period without unnecessarily complicating the circuit configuration. It is something.

Technical Means for Achieving the Object The configuration of the present invention for achieving the above object is controlled by a composite blanking signal whose level differs depending on the presence or absence of video information, and a pedestal level bias signal that biases the pedestal level. , generates a pedestal signal having a digital value corresponding to a predetermined pedestal level when video information does not arrive in each horizontal period, and generates a pedestal signal having a digital value corresponding to a predetermined pedestal level when video information arrives in each horizontal period, depending on the presence or absence of the pedestal level deviation signal. a pedestal signal having a digital value corresponding to a level that is appropriately level-deviated from the pedestal level, or
A pedestal signal having a digital value corresponding to the predetermined pedestal level is generated.

Embodiments Hereinafter, the pedestal signal generating circuit of the present invention will be explained in detail according to embodiments shown in the accompanying drawings.

FIG. 1 is a circuit block diagram showing the entire color video camera equipped with the pedestal signal generation circuit of the present invention, in which 1 is a solid-state image sensor for obtaining an R signal component, and 2 is a solid-state image sensor for obtaining a G signal component. Element 3 is a solid-state image sensor for obtaining the B signal component, and these elements are composed of, for example, a CCD. The discrete output signals R, G, and B of the solid-state image sensors 1, 2, and 3 are appropriately amplified by preamplifiers 4, 5, and 6, and sample-and-hold circuits 7, 8, and 7 have both a sampling function and a waveform shaping function. 9 and A/D converters 10, 11, 12
and is converted there into a digital signal. The signal R converted into this digital signal,
G and B are subjected to signal processing such as γ correction, pedestal adjustment, clamping, clipping, etc. in process circuits 13, 14, and 15, and are input to matrix 16. Then, from the matrix 16, a luminance signal Y and chroma signals I and Q are outputted as follows: Y=0.30+0.59G+0.11B I=0.60-0.28G-0.32B Q=0.21-0.52G-0.31B It's becoming like that. The chroma signals I and Q are limited to a predetermined band by band limiting circuits 17 and 18, and then input to the NTSC color encoder 19 together with the luminance signal Y. The color encoder 19 performs color encoding expressed as Ee=Y+Qsin(ωcsc・t+33°)+Icos(ωcsc・t+33°) (here, ωcsc is the angular velocity of the color sub-carrier signal) and outputs the signal Ee.
It also functions to add the synchronization signal Es and burst signal Eb generated from the synchronization/burst mixing circuit 20 to the signal Ee. Thus, the color encoder 19 outputs an NTSC composite signal Ec.

Reference numeral 21 denotes a pedestal signal generating circuit according to the present invention, which generates a pedestal signal Ep for giving a pedestal level to the composite signal. This pedestal signal is added to the output signal of the color encoder 19, ie, the composite signal, by the adder circuit 22. Then, the output signal of the adder circuit 22, that is, the composite signal Ei given the pedestal level.
is converted into an analog video signal by the D/A converter 23 and transmitted to the outside.

FIG. 2 is a time chart showing waveforms of various signals in one horizontal period. In addition, in the same figure
Scb is a composite blanking signal,
This will be explained later.

FIG. 3 is a circuit diagram showing the pedestal signal generating circuit 21 of the present invention.

The pedestal signal generating circuit 21 includes AND circuits 24 to 28, a NOT circuit 29, and an adder circuit 30. The AND circuit 24 receives the setup signal Ssetup at one input terminal and the composite blanking signal Scb at the other input terminal.
The setup signal Ssetup is a signal for raising the pedestal level, which is normally "60", by a predetermined value, for example, "11" when video information arrives, and can be raised to "1" by operating a setup switch (not shown). , it becomes "0".
Further, the composite blanking signal is a signal that becomes "1" when video information arrives in each horizontal period, and becomes "0" at other times. The NOT circuit 29 inverts the output signal of the AND circuit 24, and the AND circuit 24 and the NOT circuit 29 are used to form an addend signal to be input to the adder circuit 30. AND circuit 24
The output signal is bit 0 of the 8-bit summand signal,
The signal is input to the adder circuit 30 as a signal representing bit 1 and bit 6. or. The output signal of the inverter 29 is input to the adder circuit 30 as a signal representing bits 3, 4, and 5 of the summand signal. Also, bit 2 of the summand signal always remains "1", and bit 7
That is, the most significant bit is always kept at "0".

Therefore, the output signal of the AND circuit 24 is "0"
The summand signals input to the adder circuit 30 at this time are "0", "0", "1",
"1", "1", "1", "0", "0", and the digital value is "60". When the output signal of the AND circuit 24 is "1", the summand signal input to the adder circuit 30 is shown in order from the least significant bit as follows:
"1", "1", "1", "0", "0", "0", "
1”,
"0", and its digital value becomes "71".

AND circuits 25 to 28 constitute a fine adjustment circuit 31, each of which receives the composite blanking signal at one input terminal, receives each bit of the fine adjustment signal Sad at the other input terminal, and sends the signal to an adder circuit 30. Forms the input addend signal. The signal that the AND circuit 25 receives as a part of the fine adjustment signal Sad is a sign signal Sads, and if this signal is "1", the fine adjustment signal Sad is processed in the adder circuit 30 as a signal indicating a two's complement. . Similarly, the signal received by the AND circuit 26 is the bit 2 signal.
Sad2, the signal received by the AND circuit 27 is bit 1
The signal Sad1 received by the AND circuit 28 is the signal Sad0 of bit 0.

Therefore, the fine adjustment circuit 31 made up of the AND circuits 25 to 28 can add any numerical value between -8 and +7 to the addition circuit 30.

Operation The operation of the pedestal signal generation circuit 21 shown in FIG. 3 will be explained below.

Since the composite blanking signal Scb maintains "0" when no video information arrives in each horizontal period, the output of the AND circuit 24 becomes "0", the output of the inverter 29 becomes "1", and the adder circuit 3
The summand signals input to 0 are shown in order from the least significant bit: "0", "0", "1", "1", "1",
"1", "0", "0", and the digital value is "60"
,
becomes. Also, at that time, the outputs of the AND circuits 25 to 28 will all be "0" regardless of what is inside the fine adjustment signal Sad, and the digital value thereof will be "0".
Therefore, the digital value of the pedestal signal sent from the adder circuit 30 to the adder circuit 22 when no video information arrives is "60".

Since the composite blanking signal becomes "1" when the video information arrives in each horizontal period, the output signal of the AND circuit 24 and the output signals of the AND circuits 25 to 28 at that time are the contents of the setup signal Ssetup and the fine adjustment signal Sad. The signal will be generated accordingly. When the setup signal Ssetup is "0", the summand input to the adder circuit 30 is always "60";
In the case of "1", the summand is "71".

On the other hand, the AND circuit 2 input to the adder circuit 30
The addend from 5 to 28 is the same signal as the fine adjustment signal Sad, and is any number from "-8" to "+7". This addend can be arbitrarily set between -8 and +7 by operating a fine adjustment switch or the like.

Therefore, the pedestal level when the video information arrives can be arbitrarily set in the range from "78 (71+7)" to "52 (60-8)".

Application Example In the above embodiment, the pedestal level can be finely adjusted in the range of "-8" to "+7" by the fine adjustment circuit 31, but the range depends on the number of AND circuits in the fine adjustment circuit 31. can be arbitrarily changed by changing the number of bits of the fine adjustment signal Sad applied to the fine adjustment circuit 31.
This fine adjustment circuit 31 is not necessarily required.

Also, when setting up the pedestal level, the pedestal level must be set to 7.5 IRE according to the standard.
This 7.5IRE is
If the video signal is composed of an 8-bit signal, and the original pedestal level is set to a digital value of "60" and the 100% white level is set to a digital value of "200", the digital value corresponds to "70.5". and,
In the above embodiment, "71", which is "70.5" rounded to the nearest whole number, is set as the level of the set-up pedestal signal. However, the level of the set-up pedestal signal may be set to "70", which is the value of "70.5" rounded down to 1 or less.

Effects As described above, the pedestal signal generation circuit of the present invention is controlled by a composite blanking signal whose level changes depending on the presence or absence of video information and a pedestal level deviation signal which biases the pedestal level, and each horizontal When video information does not arrive in a period, a pedestal signal having a digital value corresponding to a predetermined pedestal level is generated, and when video information arrives in each horizontal period, the signal is shifted from the predetermined pedestal level depending on the presence or absence of the pedestal level deviation signal. The pedestal signal is characterized in that it generates a pedestal signal having a digital value corresponding to a level with an appropriate level deviation or a pedestal signal having a digital value corresponding to the predetermined pedestal level, and therefore the pedestal level By applying or not applying the bias signal, the pedestal level at the time of arrival of the video information in each horizontal cycle can be made to deviate from a predetermined value, or can be kept at a predetermined value. Since digital technology can deviate the pedestal level from a predetermined value or maintain it at a predetermined value, the pedestal signal generation circuit can be configured by a combination of logic gates such as AND circuits and NOT circuits. The circuit configuration can be made extremely simple.

[Brief explanation of drawings]

The drawings are for explaining an example of the implementation of the pedestal signal generation circuit of the present invention. Fig. 1 is a block diagram showing the entire color video camera circuit in which the pedestal signal generation circuit of the present invention is used, and Fig. 2 shows various types of circuits. FIG. 3 is a circuit diagram of the pedestal signal generating circuit of the present invention. Explanation of symbols, 21...Pedestal signal generation circuit, Scb...Composite signal, Ssetup...Pedestal level deviation signal, Ep...Pedestal signal.

Claims (1)

[Claims] 1 The pedestal is controlled by a composite blanking signal whose level differs depending on the presence or absence of video information and a signal that biases the pedestal level, and has a digital value corresponding to a predetermined pedestal level when video information does not arrive in each horizontal period. a pedestal signal that generates a signal and has a digital value corresponding to a level that is appropriately level-deviated from the predetermined pedestal level depending on the presence or absence of the pedestal level deviation signal when video information arrives in each horizontal period; A pedestal signal generation circuit, characterized in that it generates a pedestal signal having a digital value corresponding to a pedestal level.