JPH04207384A - Digital convergence correcting device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention provides a method for performing distortion correction and convergence correction in the cathode #screen l of a television receiver or a display device (5-). This is about the Converzenith correction device.

[Prior Art] The intersection position that occurs when a cathode ray tube screen is divided into horizontal and vertical force directions is defined as a convergence adjustment point, and the convergence correction value at each adjustment point 11 is determined in advance.
It has a digital memory to store the digital correction data and (5), and reads out the γ digital correction data within the 5 molar range.
-1 signal is converted into an array signal by a D/A converter (D/A converter), and the convergence yaw (CY) is driven to drive the convergence signal. To correct the problem, the IT equipment used to correct the problem was conventionally used.
As shown in the publication; :Explains the configuration and operation of the Humver Zenith correction device.

FIG. 2 is a block diagram showing the configuration of a conventional imager λ1=] embersesis device. 1 or l', an atto L that generates a T dotos signal synchronized with the raster scan using the input synchronization signal as the standard.
＝It is a cow-blowing device.

3 is a memory for storing convergence correction data (hereinafter referred to as a correction data), which is a volatile memory whose data disappears when the power is turned off.

4 Analyzes the digital data read from the bar
A digital/analog L1 converter (1)/A converter) that converts into a cog correction signal, 5 is an I-P F (low pass filter), 6 is an amplifier for driving the convergence squawk, 7 is C'1'<convergence score).

8 is an instruction device such as a keyboard for instructing convergence adjustment, 9 is a CF for operating the memory 3 and controlling various calculations; 1., J (processing unit); 10 is a CPU
9 is a program memory storing the processing procedure, and 11 is a correction data storage memory for storing the correction data of Memo J No. 3. A nonvolatile memory is used in which the data does not disappear even when the power is turned off.

In addition, 13 and 14 are the CPU address bus,
It is a data bus.

First, the circuit operation when performing convergence correction will be explained.

Now, the address generator 2 generates an address signal synchronized with the raster scan, and reads out the convergence data stored in the memory 3. The data read from the memory 3 is converted into an analog correction signal by the /A converter 4, then interpolated by the LPF 5, amplified by the axial filter, and drives the convergence yoke 7. Then, convergence correction is performed using the magnetic field generated by the convergence squawk 7.

Next, circuit operation when performing convergence adjustment will be explained.

When adjusting the convergence, the adjuster looks at the screen of the cathode ray tube (not shown) on which the convergence correction described in -1- is being performed, and while checking the convergence state, determines the convergence state using the indicating device 81''. The CPU 9 sends an instruction to adjust the convergence according to the instructions stored in the program memory O and rewrites the correction data stored in the memory 3 according to the instruction received by the instruction device 8.

When the rewriting of the correction data stored in the memory 3 by the CP Ll 9 is completed and the adjuster sends an instruction to end the adjustment using the instruction device 8, the CPU! Ill reads the correction data from the memory 3 and writes it into the correction data storage memory 11. Since the correction data storage device 11 is a non-volatile memory, the correction data can be saved even if the power is turned off.

Note that the correction data stored in memory 3 will disappear when the power is turned off, so when the power is turned on, the correction data will be deleted.
Reads the correction data of January 1 in the correction data storage memo, and performs the convergence correction after working on the memo 3. 1. Problems to be solved by the invention] In the conventional configuration, For example, when performing initial convergence adjustment when assembling a television receiver, effective correction data is written in fX, 1.1, correction data maintenance memo 1/1, and memory 3. Sea 1-(Not present. Therefore, all correction data of Mesenri 3 is 7.7 rearranged. 2.
) Koshibazen 7 from 3 states! , make the adjustment
(C) A lot of work is required to adjust the convergence.

In addition, the supplementary data stored in the supplementary ET'-5 storage memory 11 may be lost due to malfunction or operation of the CPU 9.
) Even if the correction data in the memory 3 is cleared, the convergence adjustment S:: (-1, 1, 4', etc.) reduces the efficiency of the convergence adjustment work.

In addition, there is only one memory for storing supplementary data.
The first problem of the present invention is that it becomes impossible to readjust the J:5 base and [
First, when performing the initial adjustment of the Coniper system, or when the date correction date disappears due to a malfunction/J operation ('l mistake), the efficiency N, <71-verse (c) To provide a means for correcting the miscellaneous gases (L) with a means for compensating the amount of water.

A second object of the present invention is to provide inexpensive and non-rewritable;
Even with volatile Smori, readjustment of convergence is difficult.
There are 2 and 2 (-) that provide 1J-capable input input + 1 cosivergence supplement 1.

] stage] J', ", ', +! [! In order to achieve the first objective, the present invention adds specific correction data 7 to the conventional configuration.
Added memory for data storage. .

In addition, the conventional configuration (,8,-'f-equipment iF-7
] Hodai: Add 11 meeri, - and 1-, and stir -2, 1'[-1 can be achieved.]

The second object of the present invention is that a plurality of complements i', E 'li'
- By providing a memory for maintenance, this can be achieved.

1. Effect] First of all, (2. Standard correction data was stored in the conventional configuration.The operation of the jJh model with memory added will be explained.

When assembling a television receiver, etc.,
When performing initial adjustment of the system, read out standard correction data from a memory that stores specific correction data in advance.
Convergence adjustment is performed based on this. Since there are variations in the convergence yoke in each cell 1 of a television receiver, it is not possible to complete the two-verse adjustment using only standard correction data. However, if convergence adjustment is performed based on standard correction data, the convergence adjustment will end with only fine adjustments.・It is possible to improve the efficiency of space adjustment work.

Similarly, if the correction data disappears due to a malfunction or operational error, if the convergence adjustment is performed based on the standard correction data, the convergence adjustment will be completed with just a fine adjustment. The efficiency of adjustment work can be improved.

Next, an explanation will be given of the operation when a correction ball 1-data maintenance memory for f is added to the conventional configuration.

When adjusting the convergence, the correction data should be corrected in both the original memory and the spare correction data storage memory. Correction data disappears 5
However, since the i5 correction data can be obtained from the correction data storage memory of A and B, there is no need to start the adjustment from the beginning1.
It is possible to improve the convergence adjustment work efficiency when performing the initial adjustment of the base 5 and when the correction data is lost due to malfunction or operational error.

Next, we will explain the operation when a plurality of correction data storage memories are provided.

・Even if you use volatile memory that cannot be rewritten,
When convergence readjustment becomes necessary, the corrected data after readjustment can be written into an empty correction data storage memory among the plurality of correction data storage memories. Therefore, convergence readjustment can be performed multiple times until the supplementary data is written in all the correction data storage memories.

In ordinary television receivers, the frequency of convergence readjustment is low, so if you can readjust convergence a few times, you're done.

Therefore, an inexpensive non-volatile memory that cannot be rewritten can be used as a memory for storing correction data.

(Example 1) Hereinafter, as a first example of the present invention, the configuration and operation of a circuit will be explained using FIG.

FIG. 1 is a block diagram showing a first embodiment of the present invention.

In Figure 1, the components (1
~11, ]3.14), the same numbers as in FIG. 2 are added. Components in FIG. 1 that are different from those in FIG. 2 will be explained below.

In the figure, 12 is a standard correction data storage medium in which standard correction data is stored in advance, and a non-volatile memory is used. Standard correction data is, for example, the average correction data required for the same model of television receiver.8)
4. Obtained by technical means etc.

It is.

Please explain the operation of this embodiment below. ]'cormorant.

Since the circuit operation when performing convergence correction is the same as that of the conventional example shown in FIG. 2, its explanation will be omitted.

Next, the circuit operation when performing convergence adjustment will be explained.

First, when making initial convergence adjustments such as when assembling a television receiver, the adjuster should use the instruction device 8.
the CPU to read the standard correction data.
Upon receiving this instruction, the CPU 9 reads the standard correction data from the standard correction data storage memory 2 and writes it into the memory 3. As a result, rough convergence correction is first performed. Thereafter, as in FIG. 2, the adjuster watches the screen of the cathode ray tube (not shown) on which the convergence correction described in 1-1 is being performed, confirms the convergence state, and adjusts the convergence using the indicator W8. Send instructions on how to adjust the state and fine-tune convergence. Since the subsequent operation is the same as that shown in FIG. 2, the explanation will be omitted.

When re-adjusting the convergence after the convergence adjustment has been performed once, the re-adjustment is performed based on the stored correction data in the correction data storage memory 11.

However, due to a malfunction of the CPU9 or an operator error,
If the correction data stored in the correction data storage memory +1 disappears, perform convergence adjustment based on the correction data stored in the standard correction data storage memory 12, as in the case of initial convergence adjustment. conduct.

As explained below, this embodiment has the advantage of being able to efficiently perform convergence adjustment with only fine adjustments when performing initial convergence adjustment or when correction data is lost due to malfunction or operational error. I can do it.

Next, the configuration and operation of a second embodiment of the present invention, which can obtain the same effects as the first embodiment without increasing the number of memories, will be explained.

FIG. 3 is a block diagram showing a second embodiment of the invention.

In Figure 3, the components (1
~11.13.14), the same numbers as in FIG. 2 are added. Components in FIG. 3 that are different from those in FIG. 2 will be explained below.

In the figure, reference numeral 15 denotes a memory for storing programs and semi-correction data in which standard correction data is stored in advance together with the program of the CPU 9.

In this embodiment, the same operation 1 as in FIG. 1 is performed except that the program memory 10 in FIG. 1 and the memory 12 for storing standard correction data are shared.

Since it is not necessary to rewrite the l-data in both the program memory IO and the standard correction data storage memory 121J shown in FIG. 1, it is possible to share both as in this embodiment.

According to this embodiment, without increasing the number of memories (the first
By using a large-capacity, replaceable non-volatile memory, the program memory 10, supplementary data storage memory 11, and standard correction data shown in FIG. It is also possible to share the storage memory 12.

Further, even if standard correction data is created by functional calculation of C and P U 9, the same effect as in 5 can be obtained.

Next, a third embodiment of the present invention, which is provided with a memory for storing spare correction data, will be described.

FIG. 4 is a block diagram showing a third embodiment of the present invention.1 In FIG. 4, components that perform the same operations as in FIG.
~11.13, ) 4, the same numbers as in Figure 2 are added. Hereinafter, the third component, which is different from the second component, will be explained.

In the figure, reference numeral 16 denotes a preliminary function that stores preliminary correction data.
There is a method for data storage and rewriting [A non-volatile memory with IJ function is used.Hereafter, I will explain the operation of this embodiment.
Here, the circuit operation when parsing correction is performed is the second
Since it is the same as the conventional example shown in the figure, the explanation thereof will be omitted.

The circuit operation when performing convergence adjustment is also basically the same as the conventional example shown in FIG.

Hereinafter, only the differences in operation from the conventional example shown in FIG. 2 will be explained.

Similarly to Figure 2, after completing the shivergence adjustment, the memory 3
Memory 11 for reading data and storing supplementary data
Write to. At this time, when the adjuster sends an instruction from the instruction device 8 to create preliminary correction data, cp
t: 9 receives this instruction, reads the data of 'A193, writes it to the memory 16, and performs 2&.

Note that when the power is turned on, the CP1-9 reads out the correction data from the correction data storage memory 11, as shown in FIG.
After writing to memory 3, start convergence correction.

The difference from FIG. 2 is that if the correction data stored in the correction data storage memory 11 disappears due to a malfunction of the CP Ll 9 or an operational error by the adjuster, the adjuster must operate the instruction device 8. and a memory 16 for storing spare standard correction data.
The correction data stored in is transferred to the memory 3, and convergence can be readjusted using this as a reference.

As explained above, according to this embodiment, convergence readjustment can be carried out efficiently when correction data disappears due to CPU malfunction or operational error.

Finally, a fourth embodiment of the present invention will be described in which a large number of correction data storage memories are provided.

FIG. 5 is a block diagram showing a fourth embodiment of the present invention.

In Figure [), the components that perform the same operations as in Figure 2 (
1, 11, 13, 14), and the same numbers as in Figure 2. Below, we will explain the configuration monitoring in Figure 3, which is different from Figure 2. It uses writable non-volatile memory.

The operation of the five embodiments will be explained below.

The circuit operation when performing convergence correction is the same as the conventional example shown in Figure 2, so its explanation will be omitted4. The circuit operation when performing convergence adjustment is also basically the same as the conventional example shown in Figure 2. It's the same.

Hereinafter, only a tentative explanation will be given of the operation which is different from the conventional example shown in FIG.

After the convergence adjustment is completed, the adjuster sends an instruction to the instruction device 8, and upon receiving this instruction, the CP L, + 9 reads out the correction data of memos 1 and 3 (the read correction data is used for the correction Of the data storage memory memo ~20, t, to which correction data has not yet been written, is (-written).

Then, when the power is turned on, the correction data in the correction data storage memory in which the latest correction data has been written is read out, written into the memory 3, and then the convergence correction is started.

If you write the correction data to all 1" memory, you will not be able to write more than 1" correction data, so you may need to replace the correction data storage memories 17 to 20 with new memories. Take the following measures.

However, in a typical 1° vision receiver, the need for convergence retranslation is very low, so it is sufficient to have several memories for storing correction data.

According to this embodiment, as a memory for storing correction data,
Since an inexpensive non-volatile memory (one-time FROM) that cannot be redrawn can be used, the cost of the circuit can be reduced.

JN, correction data, -data storage method) 7 to 2 () are expressed as multiple independent blocks, but,
It is also possible to divide one entry amount by a single stretch and store multiple supplementary eta (-).

[Effect of the invention] Shameful invention 1. In case of initial adjustment of convergence in the day-butar convergence supplementary device, or when the 11 correction de-reduction is eliminated due to malfunction or manual operation, etc., it can be used efficiently. Convergence adjustment can be made using the 7th button for fine adjustment. 1. Also, many supplementary J]
7 By providing memory for data storage, it is possible to reduce the cost of rewriting and volatile memory (one-time PR,
OM) can be used to increase i+J function and reduce circuit cost1.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a first embodiment of the present invention, and Fig. 2 shows a conventional digital convergence correction device (
3 is a block diagram showing the second embodiment of the present invention, FIG. 4 is a block diagram showing the third embodiment of the present invention, and FIG. 4 is a block diagram showing the third embodiment of the present invention. Third embodiment of the invention
, ]nick diagram, and FIG. 5 is a vine diagram showing a fourth embodiment of the present invention. . 2 At I/S valve generator, 3...'A memory 4 Digital/'Analog I7 converter, 5...Low pass filter,
6.anib, 7.coverse yoke, 8.instruction device, 9.CPU, 10.program memory, 11.
Memory for storing correction data, ]2 Memory for storing standard correction data, 15 Memory for storing programs and standard correction data, I6 Memory for storing spare correction data,
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Claims (1)

[Claims] 1. In a television receiver or display using a cathode ray tube using a raster scan method, the display screen of the cathode ray tube is divided into a plurality of regions, and a convergence correction value in each region is used as convergence correction data. a memory for storing the convergence correction data, and an address generating means for generating an address signal in synchronization with raster scanning of the cathode ray tube and reading out the convergence correction data stored in the memory by inputting the address signal to the memory; a digital/analog converter that converts the convergence correction value read from the memory into an analog signal; an input device that instructs convergence adjustment; and a process that operates the convergence correction value in the memory according to instructions from the input device. A digital convergence correction device configured by the device is characterized in that, in addition to a memory for storing convergence correction data individually necessary for a television receiver, a memory is provided in which specific convergence correction data is stored in advance. , digital convergence correction device. 2. The digital convergence correction device according to claim 1, wherein the specific convergence correction data is stored in advance together with a program of the processing device. 3. The digital convergence correction device according to claim 1, further comprising means for creating the specific convergence correction data. 4. The digital convergence correction device according to claim 1, further comprising a memory for storing a plurality of sets of convergence correction data. 5. The digital convergence correction device according to claim 4, wherein a non-volatile memory that cannot be rewritten is used as the memory for storing the plurality of sets of convergence correction data.