JPH04209551A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent deteriorations of characteristics and reliability by previously selectively removing a second oxide film of a part in which a volumetric expansion occurs due to formation of a third oxide film to provide a gap at a polysilicon buried in a groove, and forming a second antioxidative film by covering with a first oxide film. CONSTITUTION:An insulating film including a first antioxidative film 26 is formed on a substrate 23, and selectively etched to form openings 28a, 28b and grooves 29a, 29b. Then, a first oxide film 30a is formed on the wall of the substrate 23, a second antioxidative film 31 and a second oxide film 32a are sequentially formed thereon, and burying member films 33a, 33b are buried in the grooves 29a, 29b. The film 32a interposed between the film 31 and the films 33a, 33b of the upper walls of the grooves 29a, 29b is selectively removed by etching, the films 33a, 33b exposed in the grooves 29a, 29b are oxidized to form third oxide films 34a, 34b. Thus, deteriorations of characteristics and reliability can be prevented without affecting a distortion to the peripheries of the grooves.

Description

[Detailed description of the invention]

[00011

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device that includes a step of embedding a polydinocon film or the like in a trench used for element isolation. [0002] [Prior Art] Figs. 6(a) to (C) 9 Figs. 7(d) to (f)
) and FIG. 8(g) are cross-sectional views illustrating a conventional method of forming an element isolation trench filled with a polysilicon film. [00031 FIG. 6(a) shows S! for selective oxidation on a Si substrate. This shows a state in which an opening for forming a groove is formed in a multilayer insulating film including a J4 film, and reference numeral 2 in the figure shows a state in which impurities are diffused in a high concentration to form a collector lead-out layer formed on a Si substrate 1. Si layer 3 is Si in which impurities are diffused at a high concentration.
Si layer on which transistors are formed, 4a to 4C
5 is a thick SiO2 film selectively formed on the isolation region on the Si layer by the LOCO3 method, 5 is a thin 5i02 film for stress relaxation in the element formation region, and 6 is an S! film covering the 5iOz film. J<film, 7 is 5ixN<PSG film on film 6, 8a,
8b is the PSG film 7/5j3N4 film 6/5 in the element isolation region.
This is an opening for forming a groove formed by penetrating the iOz films 4a and 4c. Note that Si substrate 1. High concentration Si layer 2 and S
The i-layer 3 constitutes a Si substrate 13.

[o o o 4] First, in this state, as shown in FIG. 6(b), the Si substrate 13 at the bottom of the openings 8a and 8b is selectively anisotropically etched to form grooves 9a and 9b for element isolation. form. [0005] Next, the Si substrate 13 on the wall surfaces of the grooves 9a and 9b
5in2 films 10a and 10b are formed on the (FIG. 6(c))
). [0006] Next, a polysilicon film] 1 is formed on the entire surface so as to fill the trenches 9a and 9b (FIG. 7(d)). [0007] Next, S! The polysilicon film 11 is polished using the 3N+ film 6 as a stopper, leaving the polysilicon film 11a in the grooves 9a and 9b (FIG. 7(c)). [0008] Next, the surface of the polydinocon film 11a exposed in the grooves 9a and 9b is oxidized, and an insulating 5i (l film 1
2a and 12b, polysilicon films 11a and 12b are formed.
Grooves 9a and 9b for element isolation in which llb is embedded are formed (FIG. 7(f)). [0009] Thereafter, a base region layer 14. is formed in the element forming region through normal steps. An emitter layer 15 and a collector extraction region layer 16 are formed, and a corresponding base layer 15 is formed. al17.
An emitter electrode 18 and a collector electrode 19 are formed to complete the bipolar transistor (FIG. 8(g)). [00101 [Problem to be solved by the invention] By the way, FIG. 7(f)
As shown in FIG. 2, an insulating 5iOz film 12a is formed on the surfaces of the polysilicon films 11a and llb exposed in the grooves 9a and 9b.
, 12b inevitably causes volumetric expansion, which causes distortion in the peripheral areas of the grooves 9a, 9b. For this reason,
There is a problem that the crystallinity of the semiconductor formed such as the base layer 14 deteriorates, and the collector/emitter cutoff current increases. [00111 The present invention has been made in view of such conventional problems, and it is possible to avoid straining the periphery of the trench when forming an insulating oxide film on the surface of the polysilicon film embedded in the trench. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can perform the following steps. [0012] [Means for Solving the Problems] The above problems first include a step of forming an insulating film including at least a first oxidation-resistant film on the surface of a semiconductor substrate, and selectively etching the insulating film. forming an opening to expose the semiconductor substrate;
selectively etching the exposed semiconductor substrate through the opening to form a groove; forming a first oxide film on the wall surface of the semiconductor substrate in the groove; a step of sequentially forming a second oxidation-resistant film and a second oxide film by covering the first oxide film on the wall surface; a step of embedding a embedding member film in the trench; , second
the second oxidation-resistant film sandwiched between the oxidation-resistant film and the embedded member film;
A method for manufacturing a semiconductor device comprising a step of selectively etching and removing an oxide film, and a step of oxidizing a buried member film exposed in the trench to form a third oxide film, Second, the first and second oxidation-resistant films are S! The Jt film was coated with the first. This is achieved by the method of manufacturing a semiconductor device according to the first invention, characterized in that SiO2 films are used as the second and third oxide films, and a polysilicon film is used as the buried member film. [0013]

According to the method of manufacturing a semiconductor device of the present invention, the second oxidation-resistant film is formed by covering the first oxide film formed on the semiconductor substrate on the wall surface of the trench. For example, the second oxide film may be a Sin film, and the second oxidation-resistant film may be a S film.
! If an aN4 film is used, the second oxide film can be selectively removed in advance. (0014) Therefore, before forming the third oxide film for insulation on the polysilicon film buried in the trench, the second oxide film is preliminarily removed in the area where the volume expansion will occur due to the formation of the third oxide film. Since the second oxidation-resistant film is formed by selectively removing the polysilicon film to form a gap and covering the first oxide film, when the polysilicon film embedded in the trench is thermally oxidized, the semiconductor No new oxide film is formed on the substrate, and volumetric expansion can be suppressed to a minimum. Therefore, even if the third oxide film is formed on the polysilicon film, the formed third oxide film reliably spreads over the removed portion of the second oxide film and does not exert stress on the wall surface of the trench. [0015]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. [0016] Figure 2 (a) to (c), Figure 3 (d) to
(f) 3 FIGS. 4(g) to 4(i) and FIGS. 5(j) to 5(1) are cross-sectional views illustrating a conventional method for forming element isolation trenches filled with polysilicon films. [0017] First, as shown in FIG. 2(a), n-type S
An Si layer 21 in which n-type impurities are diffused at a high concentration is formed on the i-substrate 20, which will serve as a collector extraction layer. A low concentration Si layer 22 is formed by epitaxial growth. Note that these constitute the Si substrate (semiconductor substrate) 23. [0018] Next, a 5iOz film 2 with a thickness of 6000 was applied to the region that would become the separation region by the well-known LOCO3 method.
4a to 24c are formed. Subsequently, an SiO2 film 25 having a thickness of 50 OA is formed in the element formation region by thermal oxidation under a temperature condition of 900° C. in order to relieve stress from the SIJ< film (FIG. 2(b)). Next, a Si3N4 film (first oxidation-resistant film) 26 with a thickness of 2000 mm and a PSG film 27 with a thickness of IILm are formed on the entire surface (FIG. 2(c)). In addition, PSG film 27/S! 3
The N4 film 26/SiO2 films 24a and 24c are the insulating film 41
Configure. [00191 Next, using a resist pattern (not shown) as a mask, the PSG film 27/
S! , +N4 film 26/5i02 film 24a, 24
openings 28a and 28b are formed by penetrating through the
d)). [00201 Next, R using a chlorine-based etching gas
The Si substrate 2 at the bottom of the openings 28a and 28b is removed using the IE method.
3 is selectively anisotropically etched to penetrate the Si layer 21 in which impurities are diffused at a high concentration to form trenches 29a for element isolation.
29b (FIG. 3(e)). [00211 Next, Si on the wall surfaces of the grooves 29a and 29b
A SiO2 film (first
oxide film) 30a. 30b is formed by thermal oxidation (FIG. 3(f)). [0022] Next, the sin of the wall surfaces of the grooves 29a and 29b
: Membrane 30a. 30b and a Si3N+ film (second
oxidation-resistant film)31. After forming the 8102 film (second oxide film) 32 with a film thickness of 500A by CVD method,
: On the film 32, a polysilicon film (buried member film) 33 with a film thickness of 1 μm is deposited by CVD so as to fill the grooves 29a and 29b.
(Fig. 4(g)). [00231 Next, using an amine-based polishing liquid containing colloidal silica, S! Using the 3N4 film 31 as a stopper, the polydinocon film 33 and the Sin: film 32 are polished to form the groove 29.
The polysilicon films 33a and 33b remain in the regions a and 29b (FIG. 4(h)). [0024] Next, the 5i02 films 32a and 32b on the upper walls of the grooves 29a and 29b sandwiched between the 513N4 film 31 and the polysilicon films 33a and 33b are etched by wet etching using an HF solution. At this time, the Si3N4 film 31 and the polysilicon films 33a, 33
Since the etching selectivity between SiO2 films 32a and 32b is sufficiently high, only the SiO2 films 32a and 32b above the walls of grooves 29a and 29b can be selectively removed (FIG. 4(t)). [00251] Next, the surfaces of the polydinocon films 33a and 33b exposed in the grooves 29a and 29b are thermally oxidized to form a 5iOz film (third oxide film) with a thickness of 2000 Å for insulation.
After forming 34a and 34b, the polysilicon film 33
a, an element isolation groove 29a in which 33b is embedded;
29b is formed (FIG. 50)). At this time, the groove 29a
, Si3N4 film 3 is applied to cover the Si substrate 23 in 29b.
1, new 5i0 is formed on the Si substrate 23.
2 membranes are not formed, and volumetric expansion can be suppressed to a minimum. Therefore, the 5i02 films 34a, 34b formed on the polysilicon films 33a, 33b reliably spread to the removed portions of the previously formed SiO2 films 32a, 32b, and do not exert stress on the walls of the grooves 29a, 29b. [0026] Next, S! exposed on the surface of the Si substrate 23! 3
After removing the N+ film 31.26 (FIG. 5(k)), a p-type base region layer 35.26 is formed in the element formation region through normal steps. n
A type emitter region layer 36 and an n-type collector extraction region layer 37 are formed, and a corresponding base electrode 38 . After forming the emitter electrode 39 and collector electrode 40, the bipolar transistor is completed (FIG. 5(1)). [0027] As described above, according to the embodiment of the present invention, the insulating 5i (h films 34a, 34b
As shown in FIG. 4(i), before forming the 5i02 films 32a and 32b, the portions where volume expansion occurs due to the formation of the Sin films 34a and 34b are selectively removed in advance to create gaps. , as shown in Figure 5(j), 5iO
Even if the Z films 34a and 34b are formed, the grooves 29a and 2
The distortion does not extend to the periphery of 9b. As a result, the groove 29
a. The base region layer 38 and the like are formed on the periphery of the Si layer 29b.
Since the crystallinity of the layer 22 can be maintained without deterioration, deterioration of the characteristics and reliability of the bipolar transistor can be prevented. [0028]

As described above, according to the method of manufacturing a semiconductor device of the present invention, before forming the third oxide film for insulation on the polysilicon film embedded in the trench, the third oxide film is removed. The second oxide film is selectively removed in advance in areas where volumetric expansion occurs due to film formation, a gap is created, and the second oxidation-resistant film is formed by covering the first oxide film. When thermally oxidizing the polysilicon film embedded in the trench, no new oxide film is formed on the semiconductor substrate, and volumetric expansion can be suppressed to a minimum. Therefore, even if the third oxide film is formed on the polysilicon film, the formed third oxide film is
The oxide film spreads reliably to the removed portion of the groove, and does not apply stress to the wall of the trench. This makes it possible to maintain the crystallinity of the Si layer in which the base layer and the like are formed around the groove without deteriorating it, thereby preventing deterioration of the characteristics and reliability of the bipolar transistor.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of the principle of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view (part 1) illustrating a method for manufacturing a bipolar transistor according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view (Part 2) illustrating a method for manufacturing a bipolar transistor according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view (Part 3) illustrating a method for manufacturing a bipolar transistor according to an embodiment of the present invention.

FIG. 5 is a cross-sectional view (No. 4) illustrating a method for manufacturing a bipolar transistor according to an embodiment of the present invention.

FIG. 6 is a cross-sectional view (part 1) illustrating a method of manufacturing a bipolar transistor according to a conventional example.

FIG. 7 is a cross-sectional view (Part 2) illustrating a method for manufacturing a bipolar transistor according to a conventional example.

FIG. 8 is a cross-sectional view (part 3) illustrating a method for manufacturing a bipolar transistor according to a conventional example.

[Explanation of symbols]

1, 20 Si substrate, 2.21 Si layer with high concentration of impurities diffused, 3, 22
Si layer. 4a to 4c, 5.10a, 10b, 12a,
12b, 24a to 24c, 25. 32.3
2a, 32b SiO: @, 6 SI3N4 film, 7.27 PSG film, 8a, 8b, 28a, 28b opening, 9a,
9b, 29a, 29b groove, 11, lla
, llb polysilicon film, 13Si substrate, 1435 base region layer, 1536 emitter region layer, 1637 collector extraction region layer, 1738 base electrode, 18.39 emitter electrode, 1940 collector electrode, 23Si substrate (semiconductor substrate), 26 Si3N4 film ( first oxidation-resistant film), 30 a
, 30b Sioz film (first oxide film), 3
1 S! :+N<film (second oxidation-resistant film), 33, 3
3a, 33b polysilicon film (buried member film),
34a, 34b 5i02 film (second oxide film), 4
1 Insulating film.

[Figure 1]

[Figure 5]

Claims (2)

[Claims] 1. A step of forming an insulating film including at least a first oxidation-resistant film on a surface of a semiconductor substrate, and selectively etching the insulating film to form an opening to expose the semiconductor substrate. a step of selectively etching the exposed semiconductor substrate through the opening to form a groove; a step of forming a first oxide film on a wall surface of the semiconductor substrate in the groove; a step of sequentially forming a second oxidation-resistant film and a second oxide film by covering the first oxide film on the wall surface in the trench; a step of embedding a embedding member film in the trench; selectively etching and removing the second oxide film sandwiched between the second oxidation-resistant film and the buried member film on the upper wall surface; and oxidizing the buried member film exposed in the groove. and forming a third oxide film. 2. The first and second oxidation-resistant films are made of Si.
2. The method of manufacturing a semiconductor device according to claim 1, wherein a SiO_2 film is used as the first, second and third oxide films, and a polysilicon film is used as the buried member film.