JPH04209596A - Materials for circuit boards - Google Patents
Materials for circuit boardsInfo
- Publication number
- JPH04209596A JPH04209596A JP40622690A JP40622690A JPH04209596A JP H04209596 A JPH04209596 A JP H04209596A JP 40622690 A JP40622690 A JP 40622690A JP 40622690 A JP40622690 A JP 40622690A JP H04209596 A JPH04209596 A JP H04209596A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- nickel
- copper
- chromium
- buffer layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
[00017 [00017
【産業上の利用分野]本発明は、コンピューター、ワー
ドプロセッサー等の電子回路基板に使用される回路基板
用素材に関する。
[0002]
【従来技術】従来、回路基板用素材としては、ガラスエ
ポキシ、ポリイミド、ポリエステル等の高分子フィルム
上に銅層を設けた素材が用いられていた。
[0003][Industrial Field of Application] The present invention relates to a circuit board material used for electronic circuit boards such as computers and word processors. [0002] Conventionally, as materials for circuit boards, materials in which a copper layer is provided on a polymer film such as glass epoxy, polyimide, or polyester have been used. [0003]
【発明が解決しようとする課題】しかしながら、前記の
高分子フィルム上に銅層を設けた素材は高分子フィルム
と銅層との密着性が低い為、回路形成の為のエツチング
処理、錫メツキの前処理、穴あけ等の機械加工、半田付
は時の熱処理等によって双方が剥離してしまうという問
題があった。このようなことから、素材として用いる高
分子フィルムについての表面処理法が種々研究されたが
十分な改善に到らず、又高分子フィルムと銅層の間にク
ロム又はニッケルをバッファとして介在させる方法が提
案されたが、クロムを用いた場合はクロム層と銅層の間
が剥離し易く、又ニッケルを用いた場合はニッケル層と
高分子フィルムとの間が剥離し易いというような問題が
あった。
[0004][Problems to be Solved by the Invention] However, since the above-mentioned material in which a copper layer is provided on a polymer film has low adhesion between the polymer film and the copper layer, it is difficult to perform etching treatment and tin plating for circuit formation. There was a problem in that pretreatment, machining such as drilling, and soldering caused both parts to peel off due to heat treatment and the like. For this reason, various surface treatment methods for the polymer film used as the material have been studied, but no sufficient improvement has been achieved. was proposed, but when using chromium, the chromium layer and the copper layer tend to separate, and when nickel is used, the nickel layer and the polymer film tend to separate. Ta. [0004]
【課題を解決する為の手段】本発明はかかる状況に鑑み
鋭意研究を行った結果なされたもので、その目的とする
ところは、導体となす銅層の基材との密着性が良好な、
高分子フィルムを基材とする回路基板用素材を提供する
ことにある。即ち、本発明の回路基板用素材は、高分子
フィルム上に、クロム層又はクロムを50重量部以上含
有するニッケルクロム合金層、及びニッケル層又はニッ
ケルを50重量部以上含有する銅ニッケル合金層、及び
銅層を順次設けたことを特徴とするものである。本発明
の回路基板用素材は、高分子フィルム上に高分子フィル
ムと密着性のよいクロム層又はクロムを50重量部以上
含有するニッケルクロム合金層(以下第1バッファ層と
称す)を設け、その上に銅層及び上記第1バッファ層と
の密着性に優れたニッケル層又はニッケルを50重量部
以上含有する銅ニッケル合金層(以下第2バッファ層と
称す)を設け、この第2バッファ層上に銅層を設けて、
基材の高分子フィルムと回路を形成する為の銅層とを強
固に密着させるようにしたものである。
[00051本発明の回路基板用素材において、基材と
なる高分子フィルムには、ガラス−エポキシ、ポリイミ
ド、ポリエステル、エチレン・フロロエチレン共重合体
等のフィルム体が適用し得るが、特にポリイミドフィル
ムが第1バッファ層との密着性に優れている。父上記の
高分子フィルム上に第1バッファ層を設けるに先立ち、
高分子フィルムを窒素ガス、酸素ガス、アルゴンガス等
の雰囲気中でプラズマ処理して活性化しておくと高分子
フィルムと第1バッファ層との密着性が向上するので望
ましい。本発明の回路基板用素材の基材である高分子フ
ィルム上に設ける第1バッファ層及び第2バッファ層の
それぞれの厚さは、1000Aを超えると素材を巻取っ
たりする際、上記の第1バッファ層や第2バッファ層に
クラックが入るので、いずれの層も1000八以下、更
に言えば、それぞれの厚さが300人を超えると高分子
フィルムとの熱膨張差で得られる素材がカールすること
があるので、300八以下とするのが好ましい。又第1
バッファ層及び第2バッファ層のそれぞれの厚さは、5
A未満では第1バッファ層及び第2バッファ層を均一な
厚さに設けるのが困難になる。このようなことから、第
1バッファ層及び第2バッファ層のそれぞれの厚さは、
300A〜5人の範囲にするのが最も好ましい。又、基
材である高分子フィルム上に第1バッファ層及び第2バ
ッファ層を設ける方法としては、化学蒸着法やスパッタ
蒸着法等が用いられるが、特にスパッタ蒸着法によると
密着性に優れたものが形成でき好ましい。又第1バッフ
ァ層と第2バッファ層とはインラインで連続してスパッ
タ蒸着により設けるのが密着性が向上して好ましい。又
銅層は第2バッファ層上にスパッタ蒸着法等で0. 1
〜1μm程度薄く予備コーティングしておいて、あとか
ら電気メツキ等の方法により必要厚さに形成するのが、
銅層と第2バッファ層との密着性が向上して好ましい。
又銅層の予備コーティングも第1バッファ層及び第2バ
ッファ層に続けてインラインで連続して行うのが相互の
密着性が向上して好ましい。
[0006][Means for Solving the Problems] The present invention was made as a result of intensive research in view of the above situation, and its purpose is to improve the adhesion of the copper layer that serves as a conductor to the base material.
The purpose of the present invention is to provide a material for circuit boards based on a polymer film. That is, the circuit board material of the present invention includes, on a polymer film, a chromium layer or a nickel-chromium alloy layer containing 50 parts by weight or more of chromium, and a nickel layer or a copper-nickel alloy layer containing 50 parts by weight or more of nickel. and a copper layer are sequentially provided. The circuit board material of the present invention includes a chromium layer having good adhesion to the polymer film or a nickel-chromium alloy layer containing 50 parts by weight or more of chromium (hereinafter referred to as the first buffer layer) on the polymer film. A nickel layer having excellent adhesion to the copper layer and the first buffer layer or a copper-nickel alloy layer containing 50 parts by weight or more of nickel (hereinafter referred to as the second buffer layer) is provided on the second buffer layer, and A copper layer is provided on the
The polymer film as the base material and the copper layer for forming the circuit are tightly adhered to each other. [00051 In the circuit board material of the present invention, films such as glass-epoxy, polyimide, polyester, and ethylene/fluoroethylene copolymer can be applied to the polymer film serving as the base material, but polyimide films are particularly suitable. It has excellent adhesion to the first buffer layer. Prior to providing a first buffer layer on the above polymer film,
It is desirable to activate the polymer film by plasma treatment in an atmosphere of nitrogen gas, oxygen gas, argon gas, etc., because this improves the adhesion between the polymer film and the first buffer layer. If the thickness of each of the first buffer layer and the second buffer layer provided on the polymer film that is the base material of the circuit board material of the present invention exceeds 1000A, when the material is wound up, Cracks will occur in the buffer layer and the second buffer layer, so if any layer is less than 1000m thick, and more specifically, if the thickness of each exceeds 300mn, the material obtained will curl due to the difference in thermal expansion with the polymer film. Therefore, it is preferable to set it to 3008 or less. Also the first
The thickness of each of the buffer layer and the second buffer layer is 5
If the thickness is less than A, it becomes difficult to provide the first buffer layer and the second buffer layer with uniform thickness. For this reason, the thickness of each of the first buffer layer and the second buffer layer is
The most preferred range is 300A to 5 people. In addition, as a method for forming the first buffer layer and the second buffer layer on the polymer film that is the base material, chemical vapor deposition method, sputter deposition method, etc. are used, but especially sputter deposition method has excellent adhesion. It is preferable that things can be formed. Further, it is preferable to provide the first buffer layer and the second buffer layer continuously in-line by sputter deposition to improve adhesion. Further, the copper layer is deposited on the second buffer layer by sputter deposition or the like. 1
It is best to pre-coat to a thickness of ~1 μm and then form it to the required thickness using methods such as electroplating.
This is preferable because the adhesion between the copper layer and the second buffer layer is improved. Further, it is preferable that the preliminary coating of the copper layer is performed continuously in-line after the first buffer layer and the second buffer layer, since mutual adhesion is improved. [0006]
【実施例】以下に本発明を実施例により詳細に説明する
。
実施例1
厚さ50μmのポリイミドフィルムをアルゴン雰囲気中
でプラズマ処理して活性化したのち、このフィルム上に
クロムを50A、ニッケルを50A、銅を1μm厚さに
順次スパッタ蒸着して複合素材となし、次にこの複合素
材の銅層上に銅を35μm厚さに電気メツキして回路基
板用素材となした。尚、クロム、ニッケル、銅のスパッ
タ蒸着はインラインで連続して行い、又スパッタ蒸着の
キャリアガスにはアルゴンガスを用いた。
実施例2
実施例1において、クロム、ニッケル、銅のスパッタ蒸
着を別々にバッチ式に行った他は、実施例1と同じ方法
により回路基板用素材を製造した。
実施例3
実施例1において、ポリイミドフィルム上に設けたクロ
ム層及びニッケル層を、それぞれクロムを50重量部以
上含有するニッケルクロム合金及びニッケルを50重量
部以上含有する銅ニッケル合金を用いて形成した他は、
実施例1と同じ方法により回路基板用素材を製造した。
比較例1
実施例1において、クロム層又は/及びニッケル層を設
けなかった他は、実施例1と同じ方法により回路基板用
素材を製造した。
[0007]このようにして製造した各々の回路基板用
素材について、引張りによる銅層の剥離試験、フォトリ
ソグラフィ法による銅層への導体パターンの形成、前記
形成した導体パターンの粘着テープを用いた剥離試験を
行って銅層の密着性を調べた。結果は表1に示した。
尚、引張りによる銅層の剥離試験は、上記素材を10m
m巾に切出して試験片となし、この試験片の一端はポリ
イミドフィルムを残して除去し、又他端は銅層を残して
除**去して、両端のポリイミドフィルムと銅層をそれ
ぞれチャックに噛ませて引張って、破断時の荷重を測定
して行った。又フォトリソグラフィ法による銅層上への
導体パターンの形成は、銅層をアルカリ現像タイプのレ
ジスト膜で覆い、次いで巾50μm、ピッチ1100I
Lの導体パターンをカセイソーダとカセイカリの混合ア
ルカリ液にて現像したのち、露出した銅層を塩化第二鉄
水溶液でエツチングして除去し、次いでレジスト膜をア
セトンにて除去し、最後に塩酸とテトラフルオロ硼酸に
て酸性化フ した塩化第一錫水溶液中に浸漬して導体パ
ターン上に錫を無電解メツキして行った。又上記導体パ
ターンの粘着テープによる剥離試験は、導体パターン上
に500g/cm相当の粘着力を有する粘着テープを張
り付け、このテープを引き剥がす方法で行った。
[0008][Examples] The present invention will be explained in detail below using examples. Example 1 A polyimide film with a thickness of 50 μm was activated by plasma treatment in an argon atmosphere, and then 50 A of chromium, 50 A of nickel, and copper were sequentially sputter-deposited onto the film to a thickness of 1 μm to form a composite material. Next, copper was electroplated to a thickness of 35 μm on the copper layer of this composite material to obtain a material for a circuit board. Incidentally, sputter deposition of chromium, nickel, and copper was performed continuously in-line, and argon gas was used as a carrier gas for sputter deposition. Example 2 A circuit board material was manufactured in the same manner as in Example 1, except that chromium, nickel, and copper were sputter-deposited separately in a batch manner. Example 3 In Example 1, the chromium layer and nickel layer provided on the polyimide film were formed using a nickel-chromium alloy containing 50 parts by weight or more of chromium and a copper-nickel alloy containing 50 parts by weight or more of nickel, respectively. Others are
A circuit board material was manufactured by the same method as in Example 1. Comparative Example 1 A circuit board material was manufactured in the same manner as in Example 1, except that the chromium layer and/or nickel layer was not provided. [0007] For each circuit board material produced in this way, a peeling test of the copper layer by tension, formation of a conductor pattern on the copper layer by photolithography, and peeling of the formed conductor pattern using adhesive tape were performed. Tests were conducted to determine the adhesion of the copper layer. The results are shown in Table 1. In addition, in the peeling test of the copper layer by tension, the above material was
A test piece was cut out to a width of m. One end of the test piece was removed leaving the polyimide film, and the other end was removed leaving the copper layer. The polyimide film and copper layer at both ends were chucked. The test was carried out by biting the material and pulling it, and measuring the load at break. In addition, to form a conductive pattern on a copper layer by photolithography, the copper layer is covered with an alkali-developed type resist film, and then a conductive pattern is formed with a width of 50 μm and a pitch of 1100 μm.
After developing the L conductor pattern with a mixed alkaline solution of caustic soda and caustic potash, the exposed copper layer was removed by etching with an aqueous ferric chloride solution, the resist film was then removed with acetone, and finally the resist film was etched with hydrochloric acid and tetrahydrochloride. Electroless plating of tin was performed on the conductive pattern by immersing it in an aqueous solution of stannous chloride acidified with fluoroboric acid. Further, the peel test using an adhesive tape for the conductor pattern was performed by pasting an adhesive tape having an adhesive force equivalent to 500 g/cm on the conductor pattern and peeling off the tape. [0008]
【表1】
表1より明らかなように、本発明品(No1〜3)は、
いずれの試験によっても銅層の密着性は良好であった。
特にバッファ金属層をインラインで連続してスパッタ蒸
着したもの(Nol、3)は、バッチ式のもの(No
2 )に較べて引張試験で高い値を示した。又バッファ
金属の種類では純金属と合金とで差がなかった。これに
対し、比較品(No 4〜6)はいずれも密着性に劣る
もので、フォトリソグラフィ法による導体パターン形成
においては、形成後導体パターンに剥離が認められ、又
この導体パターンは粘着テープによる剥離試験で全て剥
離してしまった。尚、No5又はNo6の剥離部位は、
それぞれニッケル層とポリイミド層間又はクロム層と銅
層間であった。
[0009][Table 1] As is clear from Table 1, the products of the present invention (Nos. 1 to 3) are:
The adhesion of the copper layer was good in all tests. In particular, the one in which the buffer metal layer is continuously sputter-deposited in-line (No. 3) is different from the batch-type one (No.
2) showed higher values in the tensile test. Furthermore, there was no difference in the type of buffer metal between pure metal and alloy. On the other hand, the comparative products (Nos. 4 to 6) all had poor adhesion, and peeling was observed in the conductor pattern after formation when the conductor pattern was formed by photolithography, and this conductor pattern was not formed using adhesive tape. Everything peeled off in the peel test. In addition, the peeling site No. 5 or No. 6 is as follows:
They were between the nickel layer and the polyimide layer or between the chromium layer and the copper layer, respectively. [0009]
【効果】以上述べたように、本発明の回路基板用素材は
基材の高分子フィルムと銅層の密着性が良好であり、電
子回路基板に用いて高い信頼性が得られ、工業上顕著な
効果を奏する。[Effects] As described above, the material for circuit boards of the present invention has good adhesion between the base polymer film and the copper layer, and can be used in electronic circuit boards to achieve high reliability, which is remarkable in industry. It has a great effect.
Claims (1)
を50重量部以上含有するニッケルクロム合金層、及び
ニッケル層又はニッケルを50重量部以上含有する銅ニ
ッケル合金層、及び銅層を順次設けたことを特徴とする
回路基板用素材。Claim 1: A chromium layer or a nickel-chromium alloy layer containing 50 parts by weight or more of chromium, a nickel layer or a copper-nickel alloy layer containing 50 parts by weight or more of nickel, and a copper layer are sequentially provided on a polymer film. A material for circuit boards that is characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP40622690A JPH04209596A (en) | 1990-12-07 | 1990-12-07 | Materials for circuit boards |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP40622690A JPH04209596A (en) | 1990-12-07 | 1990-12-07 | Materials for circuit boards |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04209596A true JPH04209596A (en) | 1992-07-30 |
Family
ID=18515836
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP40622690A Pending JPH04209596A (en) | 1990-12-07 | 1990-12-07 | Materials for circuit boards |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04209596A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006159632A (en) * | 2004-12-07 | 2006-06-22 | Furukawa Circuit Foil Kk | Copper metallized laminated sheet and its manufacturing method |
| JP2006159631A (en) * | 2004-12-07 | 2006-06-22 | Furukawa Circuit Foil Kk | Copper metallized laminated sheet and its manufacturing method |
-
1990
- 1990-12-07 JP JP40622690A patent/JPH04209596A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006159632A (en) * | 2004-12-07 | 2006-06-22 | Furukawa Circuit Foil Kk | Copper metallized laminated sheet and its manufacturing method |
| JP2006159631A (en) * | 2004-12-07 | 2006-06-22 | Furukawa Circuit Foil Kk | Copper metallized laminated sheet and its manufacturing method |
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