JPH04218955A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high withstand-voltage planar type semiconductor device having stable element characteristics and also having high current gain and high reliability, even if a reverse bias voltage is applied between the collector and emitter of a Darlington transistor. CONSTITUTION:The relation in distance between parts ranging between the outer periphery of regions 7, 8 formed in the manner of coming out to the main surface of a semiconductor substrate 1 consisting of a first conductive type, composed of a second conductive type on the side opposite to the semiconductor substrate side and forming PN junction in the semiconductor substrate and the outer periphery of an annular region 9 consisting of the first conductive type higher in impurity concentration than the semiconductor substrate, can be set arbitrarily in the title device.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] This invention relates to semiconductor devices, particularly
The present invention relates to a high-voltage planar semiconductor device having at least a front-stage transistor and an output-stage transistor constituting a Darlington circuit formed in a semiconductor substrate.

0002

2. Description of the Related Art FIGS. 2A and 2B are a plan view and a cross-sectional view showing a conventional semiconductor device, and a Darlington-connected NPN transistor will be explained here as an example. As shown in FIG. 2, for example, selective diffusion is applied to a selected portion of one main surface (2) of a semiconductor substrate (1) of a first conductivity type, for example, an N type, in which an N− layer is grown on an N+ high impurity concentration layer. By technology, a first base region (3) and a second base region (4) of a second conductivity type, for example, a P type, have their surfaces as the main surface (2).
formed by exposure to In the first base region (3) and the second base region (4), an N-type first emitter region is formed, for example, by selective diffusion technique, with its surface exposed to the main surface (2). (5) and a second emitter region (6) are provided. Further, the N- layer is formed to be exposed on the main surface (2) so as to separate the first base region (3) and the second base region (4).

[0003] Around the first PN junction region (7) and second PN junction region (8) formed as described above, these P
An N-type channel stopper (9) is diffused at the same time as the first emitter region (5) and the second emitter region (6) so as to surround the range where the depletion layer can expand when a reverse bias is applied to the N junction. is formed.

[0004] Thus, an oxide film (10) made of SiO2 is formed on the main surface (2). Note that (C) is the substrate (
The collector electrode is in ohmic contact with the other main surface (11) of 1).

Further, the first emitter region (5) and the second base region (4) are electrically connected by a metal electrode on the oxide film (10), and the first base region (3) and the second emitter region (6) are provided with a base electrode (B) and an emitter electrode (E), respectively.

[0006]

[Problems to be Solved by the Invention] Since the conventional semiconductor device has the above structure, the collector electrode (C)
When a reverse bias voltage is applied between the emitter electrode (E) and the emitter electrode (E), the range in which the depletion layer can expand is between the outer periphery of the first PN junction region (7) or the second PN junction region (8) and the channel stopper (9). It is determined by the distance of the area spanning the outer periphery (referred to as (x) and (y), respectively), and is determined by the shorter of the two distances. For this reason, these distances (x) and (y) are determined according to the breakdown voltage characteristics of the semiconductor device, but generally the distance (x) and distance (y) are
) are set equal.

However, in the conventional semiconductor device, even though the distances (x) and (y) are set to be equal, electrical breakdown always occurs at one of the shorter distances. Therefore, the breakdown voltage of the semiconductor device was determined. As a result, due to the Darlington circuit, the distance (distance (x)) between the first PN junction region (7) and the channel stopper (9) is
The collector-emitter current ICE(x) flowing during breakdown determined by (Fig. 3(a)) and the distance (distance (
As shown in FIG. 3, the collector-emitter current ICE(y) (FIG. 3(b)) which flows during breakdown determined by ICE(y)) has a difference of about hFE times.

Moreover, the timing at which breakdown occurs depends on variations in the manufacturing process of the semiconductor device, so conventionally it has been impossible to obtain a Darlington-connected transistor with stable device characteristics. was there.

The present invention was made to solve the above-mentioned problems, and provides a high-voltage planar type transistor having stable device characteristics when a reverse bias voltage is applied between the collector and emitter of a Darlington-connected transistor. The purpose of this invention is to obtain a semiconductor device.

0010

[Means for Solving the Problems] A semiconductor device according to the present invention is formed so as to be exposed on one main surface of a semiconductor substrate of a first conductivity type, and is formed of a semiconductor substrate of a second conductivity type opposite to the semiconductor substrate. a region of the semiconductor substrate in which a PN junction is formed; and a ring-shaped region of the semiconductor substrate that is located around the region of the semiconductor substrate and is of the same conductivity type as the semiconductor substrate and has a high impurity concentration. The distance relationship between the portion extending between the outer periphery of the region forming the PN junction and the outer periphery of the annular region is made flexible.

[0011]

[Operation] In this invention, the distance between the outer periphery of the region forming the PN junction and the outer periphery of the annular region determines the withstand voltage characteristics of the semiconductor device, and by freely setting this distance, Determine the breakdown voltage of each of the front-stage transistor and output-stage transistor that constitute the Darlington circuit.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1(a) is a plan view showing an embodiment of a semiconductor device according to the present invention, and FIG. 1(b) is a sectional view thereof. In the figure, parts corresponding to those in FIG. 2 are denoted by the same reference numerals, and detailed explanation thereof will be omitted. In Figure 1, the first
The distance of the region spanning the outer periphery of the PN junction region (7) and the annular region, that is, the outer periphery of the channel stopper (9) is denoted by code (Z).
and the distance relationship is (Z)<(y).

Next, the operation of this embodiment will be explained. When a reverse bias voltage is applied between the collector electrode (C) and the emitter electrode (E), the range in which the depletion layer can expand is:
It is determined only by the short distance (Z) of the region spanning the outer periphery of the first PN junction region (7) and the outer periphery of the channel stopper (9), and the breakdown voltage is determined at this point. As a result, the collector-emitter current ICE (Z) that flows at the time of breakdown flows in a constant relationship with the above-mentioned breakdown voltage, that is, the relationship between voltage and current at the time of breakdown of the PN junction.

[0014] In the above embodiment, the distance relationship of the region spanning the outer periphery of the PN junction region and the outer periphery of the channel stopper was set as (Z)<(y), but it may also be (Z)>(y), and the above The same effects as in the embodiment are achieved.

[0015]

Effects of the Invention As described above, the present invention is formed so as to be exposed on one main surface of a semiconductor substrate of a first conductivity type, and is of a second conductivity type opposite to said semiconductor substrate. A region of the semiconductor substrate that forms a PN junction, and an annular region that is located around the region of the semiconductor substrate that forms the PN junction, and that is the same as the semiconductor substrate and is of a first conductivity type and has a high impurity concentration. Since the distance relationship between the outer periphery of the region forming the PN junction and the outer periphery of the annular region is made flexible, even if a reverse bias voltage is applied between the collector and emitter of the Darlington-connected transistor, a stable element can be obtained. It is possible to obtain a high breakdown voltage planar type semiconductor device having characteristics, high current gain, and high reliability.

[Brief explanation of the drawing]

FIG. 1 is a plan view and a cross-sectional view showing an embodiment of a semiconductor device according to the present invention.

FIG. 2 is a plan view and a cross-sectional view showing a conventional semiconductor device.

FIG. 3 is a diagram for explaining collector-emitter current flowing during breakdown of a semiconductor device.

[Explanation of symbols]

1 Semiconductor substrate 3 First base area 4 Second base area 7 First PN junction region 8 Second PN junction region 9 Channel stopper

Claims (1)

[Claims] 1. A semiconductor substrate formed to be exposed on one main surface of a semiconductor substrate of a first conductivity type, and of a second conductivity type opposite to the semiconductor substrate, and within the semiconductor substrate.
The PN junction includes a region forming an N junction, and an annular region located around the region of the semiconductor substrate forming the PN junction and having a first conductivity type that is the same as the semiconductor substrate and has a high impurity concentration; A semiconductor device characterized in that a distance relationship between a portion extending between an outer periphery of a region where a junction is formed and an outer periphery of the annular region is made flexible.