JPH04236459A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form metal wiring easily and stably by a method wherein a hollow between adjacent storage nodes is filled easily and the surface is flattened. CONSTITUTION:Interlayer insulating films 4, 6 are formed on a silicon substrate 1 where a switching transistor 101 has been formed. A storage node 10 which has been connected electrically to active regions 100 for the switching transistor 101 is formed; a dielectric film 11 is formed on the surface of the storage node 10; and after that, a conductive film is formed. After that, the conductive film is etched back; a plate electrode 12 whose surface is flat is formed.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] This invention is particularly applicable to dynamic
The present invention relates to a random access memory (DRAM) and a method of manufacturing a semiconductor device.

0002

2. Description of the Related Art Semiconductor technology now forms the basis of various industries, and the technology continues to advance at a rapid pace. In particular, dynamic random access memory (hereinafter referred to as
DRAM. ) is a measure of technological progress1
It is one of the indicators. DRAM structures can be roughly divided into two types: stack type and trench type, and the stack type is considered promising because of its ease of manufacture and high soft error resistance. A memory cell consists of a switching transistor and a storage node, and a stacked memory cell is one in which the switching transistor and storage node are stacked on a semiconductor substrate.

FIGS. 3A to 3G are step-by-step cross-sectional views showing a conventional method for manufacturing a semiconductor device. Figure 3(a)
As shown in FIG. 1, after forming an SiO2 film 3 serving as a gate insulating film and a word line 2 serving as a gate electrode on a p-type silicon substrate 1, an n+ type active region 100 is formed, and a switching transistor 101 is formed. be done. Next, as shown in FIG. 3B, an interlayer insulating film 4 is deposited over the entire surface, and an opening window reaching the n+ type active region 100 of the switching transistor 101 is formed in this interlayer insulating film 4. Then, a bit line 5 electrically connected to the n+ type active region 100 is formed through this opening window.

Next, as shown in FIG. 3(c), an interlayer insulating film 6 is deposited on the interlayer insulating film 4 and the bit line 5. Then, a resist pattern 7 is formed on this interlayer insulating film 6. Next, as shown in FIG. 3(d), the switching transistor 101 to which the bit line 5 is not connected
An opening window X reaching the n+ type active region 100 is formed by etching. Then, a conductive polysilicon film 80 is deposited on this opening window X and on the interlayer insulating film 6,
Furthermore, a resist pattern 9 is formed on this conductive polysilicon film 80.

Next, as shown in FIG. 3E, by etching the conductive polysilicon film 80 using the resist pattern 9, a storage node 210 is formed. A dielectric film 110 is then formed on this storage node 210. Next, as shown in FIG. 3(f), a plate electrode 120 is formed by depositing a conductive polysilicon film on the dielectric film 110.

Thereafter, as shown in FIG. 3(g), an interlayer insulating film 130 is formed on the entire surface, and this interlayer insulating film 130
An aluminum wiring 140 is formed.

[0007]

[Problems to be Solved by the Invention] However, in such a conventional semiconductor device manufacturing method, the interlayer insulating film 13
It was difficult to fill the depressions between adjacent storage nodes 210 and to flatten the surface. That is, since there is a step between interlayer insulating film 6 and storage node 210, a step also occurs on the surface of interlayer insulating film 130 formed on interlayer insulating film 6 and storage node 210. As a result, when forming the aluminum wiring 140 on the interlayer insulating film 130, there was a problem in that it was difficult to form a photo pattern and to etch the aluminum wiring material.

In view of the above-mentioned problems, an object of the present invention is to manufacture a semiconductor device that can easily and stably form metal interconnections by easily filling recesses between adjacent storage nodes and flattening the surface. The purpose is to provide a method.

[0009]

A method of manufacturing a semiconductor device according to claim 1 is carried out as follows. An interlayer insulating film is formed on a semiconductor substrate on which a switching transistor is formed. An opening window reaching the active region of the switching transistor is formed in this interlayer insulating film. A storage node is formed that is electrically connected to the active region of the switching transistor through this opening window. A dielectric film is formed on the surface of this storage node. A conductive film is deposited on this dielectric film. This conductive film is etched back to form a plate electrode.

The method for manufacturing a semiconductor device according to the second aspect of the present invention is as follows. An interlayer insulating film is formed on a semiconductor substrate on which a switching transistor is formed. An opening window reaching the active region of the switching transistor is formed in this interlayer insulating film. A conductive film is deposited which is electrically connected to the active region of the switching transistor through the opening window. This conductive film is etched to form a storage node having a forward tapered portion on the side surface.

[0011]

According to the structure of claim 1, a storage node electrically connected to the active region of the switching transistor is formed on the semiconductor substrate on which the switching transistor and the interlayer insulating film are formed, and the storage node is formed on the surface of the storage node. After forming the dielectric film, a conductive film is formed on the dielectric film, and the conductive film is etched back to form a plate electrode. Therefore, the recess between adjacent storage nodes can be easily filled with a conductive film serving as a plate electrode, and the surface of the plate electrode can be flattened.

According to the second aspect of the invention, after forming a conductive film electrically connected to the active region of the switching transistor on the semiconductor substrate on which the switching transistor and the interlayer insulating film are formed, the conductive film is is etched to form a storage node having a forward tapered portion on the side surface. Therefore, the level difference between the storage node and the interlayer insulating film can be made gentler.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1A to 1G are step-by-step sectional views showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention. As shown in FIG. 1(a), a p-type silicon substrate 1
After forming an SiO2 film 3 serving as a gate insulating film and a word line 2 serving as a gate electrode thereon, an n+ type active region 100 is formed, and a switching transistor 101 is formed.
form.

Next, as shown in FIG. 1B, an interlayer insulating film 4 is deposited over the entire surface, and an opening window 4a reaching the n+ type active region 100 of the switching transistor 101 is formed in this interlayer insulating film 4. Form. And this opening window 4a
A bit line 5 is formed which is electrically connected to the n+ type active region 100 via the n+ type active region 100. Next, as shown in FIG. 1(c), an interlayer insulating film 6 is deposited on the interlayer insulating film 4 and the bit line 5, and a resist pattern 7 is formed on the interlayer insulating film 6.
form.

Next, as shown in FIG. 1(d), the switching transistor 10 to which the bit line 5 is not connected
An opening window X reaching one n+ type active region 100 is formed. Then, a film with a thickness of 5 mm is formed on this opening window X and on the interlayer insulating film 6.
A conductive polysilicon film 8 with a thickness of 0.00 μm is deposited, and a resist pattern 9 is further formed on this conductive polysilicon film 8.
form.

Next, as shown in FIG. 1E, by etching the conductive polysilicon film 8 using the resist pattern 9, electricity is supplied to the active region 100 of the switching transistor 101 through the opening window X. A storage node 10 is formed which is connected to each other. Then, a dielectric film 11 is formed on this storage node 10. next,
As shown in FIG. 1(f), a film with a thickness of 1 [
After depositing a conductive polysilicon film (not shown) having a thickness of 300 nm, a plate electrode 12 with a flat surface is formed by etching back the conductive polysilicon film to a thickness of 300 nm.

Then, as shown in FIG. 1(g), an interlayer insulating film 13 made of an SiO2 film containing boron and phosphorus is deposited on the plate electrode 12 to a thickness of about 400 nm, and then heat treated to flatten it. , an aluminum wiring 14 is formed on this flat interlayer insulating film 13. As described above, according to the first embodiment, when forming the plate electrode 12 in the step shown in FIG. By etching back this thick conductive polysilicon film, a plate electrode 12 with a flat surface is formed. Therefore, the adjacent storage node 10
It is possible to easily fill in the depression between the plate electrodes 12 with the plate electrodes 12, and to flatten the surface of the plate electrodes 12. As a result, the interlayer insulating film 1 formed on the plate electrode 12
3 can be easily flattened, and the aluminum wiring 14 can be easily and stably formed on this surface.

FIGS. 2(a) to 2(f) show the second embodiment of the present invention.
FIG. 3 is a step-by-step cross-sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. As shown in FIG. 2(a), after forming a SiO2 film 3 serving as a gate insulating film and a word line 2 serving as a gate electrode on a p-type silicon substrate 1, an n+ type active region 100 is formed. switching transistor 10
form 1.

Next, as shown in FIG. 2(b), an interlayer insulating film 4 is deposited on the entire surface, and an opening window 4a reaching the n+ type active region 100 of the switching transistor 101 is formed in this interlayer insulating film 4. Form. And this opening window 4a
A bit line 5 electrically connected to the n+ type active region 100 via the n+ type active region 100 is formed. Next, as shown in FIG. 2(c), an interlayer insulating film 6 is formed on the interlayer insulating film 4 and the bit line 5.
is deposited, and a resist pattern 7 is formed on this interlayer insulating film 6.

Next, as shown in FIG. 2(d), the switching transistor 10 to which the bit line 5 is not connected
An opening window X reaching the No. 1 n+ type active region 100 is formed by etching. Then, a conductive polysilicon film 8 having a thickness of 500 [μm] is deposited on this opening window X and on the interlayer insulating film 6. This conductive polysilicon film 8 is connected to the switching transistor 101 through the opening window X.
It is electrically connected to the + type active region 100. Then, a resist pattern 9 is further formed on this conductive polysilicon film 8.

Next, as shown in FIG. 2E, the conductive polysilicon film 8 is etched using the resist pattern 9 to form the switching transistor 10.
A storage node 10b electrically connected to one n+ type active region 100 is formed. At this time, by controlling the etching conditions, a forward tapered portion 10a is formed on the side surface of the storage node 10b. This makes the difference in level between storage node 10b and interlayer insulating film 6 gentle. Note that this etching condition uses an ECR microwave etcher, and the gas used is SiCl4: flow rate 30 [s
ccm], C4 F8: flow rate 70 [sccm], cooling He: flow rate 10 [sccm], gas pressure 2.0 [Pa],
Microwave power 200 [mA], RF power 160 [
W]. Further, the angle A of the forward tapered portion is greater than 0 degrees and less than 90 degrees with respect to one principal surface of the silicon substrate 1, preferably 45 degrees or more and 80 degrees or less, and more preferably 6 degrees.
It is about 0 degrees. And this storage node 10b
A dielectric film 11 is formed thereon.

Thereafter, as shown in FIG. 2(f), a plate electrode 12 is formed by depositing a conductive polysilicon film with a thickness of 250 μm on the dielectric film 11. Then, on this plate electrode 12, an interlayer insulating film 13 made of an SiO2 film containing boron and phosphorus is formed to a thickness of 40 mm.
After depositing about 0 [nm] and planarizing it by heat treatment, an aluminum wiring 14 is formed on this interlayer insulating film 13.

As described above, according to the second embodiment, as shown in FIG.
), by controlling the etching conditions when forming the storage node 10b, the step between the storage node 10b and the interlayer insulating film 6 is reduced by forming the forward tapered portion 10a on the side surface of the storage node 10b. Be gradual. Therefore, the depression between adjacent storage nodes 10b can be easily filled with plate electrode 12, and interlayer insulating film 13 with a flat surface can be formed. Therefore, in the process shown in FIG. 2(f), the aluminum wiring 14 can be easily and stably formed on the interlayer insulating film 13.

[0024] In the first and second embodiments,
Although a p-type silicon substrate is used, an n-type silicon substrate may also be used.

[0025]

According to the method of manufacturing a semiconductor device according to claim 1, a storage node electrically connected to an active region of the switching transistor is formed on a semiconductor substrate on which a switching transistor and an interlayer insulating film are formed, After forming a dielectric film on the surface of this storage node, a conductive film is formed on this dielectric film, and a plate electrode is formed by etching back this conductive film. Therefore, the recess between adjacent storage nodes can be easily filled with a conductive film serving as a plate electrode, and the surface of the plate electrode can be flattened.

As a result, the surface of the interlayer insulating film to be formed on the plate electrode in order to form metal wiring in a later step becomes flat, so that metal wiring can be formed easily and stably. According to the method of manufacturing a semiconductor device according to claim 2, after forming a conductive film electrically connected to the active region of the switching transistor on the semiconductor substrate on which the switching transistor and the interlayer insulating film are formed, the conductive film is The film is etched to form a storage node having a forward tapered portion on the side surface. Therefore, the level difference between the storage node and the interlayer insulating film can be made gentler.

As a result, the surface of the interlayer insulating film to be formed on the storage node and the interlayer insulating film in order to form metal wiring in a later process becomes flat, which allows metal wiring to be formed easily and stably. can do.

[Brief explanation of the drawing]

1A to 1G are step-by-step cross-sectional views showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention; FIG.

2A to 2F are step-by-step cross-sectional views showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIGS. 3(a) to 3(g) are step-by-step cross-sectional views showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 Silicon substrate (semiconductor substrate) 4, 6
Interlayer insulating film 10a Forward taper portions 10, 10b Storage node 11 Dielectric film 12 Plate electrode 100 Active region 101 Switching transistor X Opening window

Claims (2)

[Claims] 1. A step of forming an interlayer insulating film on a semiconductor substrate on which a switching transistor is formed, a step of forming an opening window in the interlayer insulating film reaching an active region of the switching transistor, and a step of forming an opening window through the opening window. forming a storage node electrically connected to the active region of the switching transistor; forming a dielectric film on the surface of the storage node; depositing a conductive film on the dielectric film; A method for manufacturing a semiconductor device, including a step of etching back the conductive film to form a plate electrode. 2. A step of forming an interlayer insulating film on a semiconductor substrate on which a switching transistor is formed, a step of forming an opening window in the interlayer insulating film reaching an active region of the switching transistor, and a step of forming an opening window through the opening window. Manufacturing a semiconductor device including the steps of depositing a conductive film electrically connected to the active region of the switching transistor, and etching the conductive film to form a storage node having a forward tapered portion on the side surface. Method.