JPH0423965B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a counting device, and particularly to a counting device suitable for obtaining current position information of a positioning device or the like by combining a counter circuit and a microcomputer circuit. It is.

[Background of the invention]

In conventional counting devices of this type, in order to obtain absolute current position information from the two-phase signal output of an incremental encoder, a counter circuit and a microcomputer circuit are combined.
When a carry or borrow signal is generated in the counter circuit by the software processing of the microcomputer, the value in the count value storage section in the memory of the microcomputer circuit is incremented or decremented in response to this, and the upper digits are carried up. , is carried down, and the output of the counter circuit is assigned to the 1's digit, and the count value storage section is assigned to the upper digits of the 10's digit or higher, thereby obtaining the current positions of many digits.

In other words, the carry and borrow signal outputs of the counter circuit are given as interrupt input signals of the microcomputer circuit, and the signal output of the direction determination circuit that determines the current counting direction from the phase of the two-phase signal output of the encoder is used to carry up the digit. For example, if a carry signal is generated in the counter circuit, and an interrupt signal is generated from the counter circuit to the microcomputer circuit, the microcomputer will execute the specified interrupt process. At this time, the processing content selection signal output from the direction determining circuit indicates a count up, so the count value storage section is incremented and carried to the nearest ten.

However, in such a counting device, if the positioning target is a node position where the 1's digit is 0 at which the counter circuit generates a carry/borrow signal, the count up is performed around this position in the process of convergence of the positioning operation. , a countdown takes place,
At this time, if a high-speed one-count up-down occurs due to the reversal of the encoder's rotational direction, the microcomputer's processing cannot keep up with the increment or increment of the higher-order digits, and the microcomputer starts interrupt processing with the carry signal when the count up occurs. However, at the timing when the processing content selection signal output of the direction discriminating circuit is checked in the middle of processing, the output already indicates a countdown, so the digit of 10 is carried down, and for example,
A decimal counter had the disadvantage that the current position information would be incorrect by 10 counts.

[Purpose of the invention]

An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, to be able to appropriately process changes in the counting direction due to high-speed reversal of the rotational direction of the encoder, and to prevent errors from occurring in current position information. Our goal is to provide a counting device that can.

[Summary of the invention]

The present invention is characterized by comprising a direction discrimination circuit that outputs a logic signal corresponding to the counting direction of an up-down counter, and a storage circuit that is triggered by a carry or borrow signal and stores the output signal of the direction discrimination circuit. The computer inputs the above-mentioned carry or borrow signal as an interrupt signal, performs carry-up or carry-down processing according to the interrupt routine, and also checks whether the signal output of the direction determination circuit and the signal output of the storage circuit match. If they match, a carry or a carry is executed in response to the output of the direction determining circuit, and if they do not match, the digit is not moved up or down.

[Embodiments of the invention]

The present invention will be explained in detail below with reference to the embodiments shown in FIGS. 1 and 3 and FIG. 2.

Fig. 1 is a block diagram showing an embodiment of the counting device of the present invention, and Fig. 2 shows the signal output state of each part in Fig. 1 during the process in which the rotation direction is reversed immediately after the carry signal is generated and a borrow signal is output. This is a time chart showing. In Figure 1, 1 is a DC power supply, 2 is a positioning motor, 3 is a rotary encoder that outputs a two-phase signal and is directly connected to the output shaft of motor 2, and 4
7 to 7 are transistors, and 8 to 11 are flight back diodes connected in parallel to transistors 4 to 7, respectively, forming an H-type bridge circuit. 12-15 are resistors connected to the bases of transistors 4-7, respectively; 16
-19 are buffer drivers, respectively. 20
is a microcomputer circuit which outputs ON signals 21 to 24 for transistors 4 to 7 to buffer drivers 16 to 19, respectively. That is, the on signal 22 from the microcomputer circuit 20,
When 24 is output, transistors 4 and 7 are turned on, and the positioning motor 2 rotates clockwise.On the other hand, when on signals 21 and 23 are output, transistors 5 and 6 are turned on, and the positioning motor 2 is turned on. 2 rotates counterclockwise, and positioning operation is performed by these.

25 and 26 are rotary encoders 3, respectively.
27 is a multivibrator that outputs a pulse at the rising edge of the φA signal, 28 is a not gate that inverts the logic of the φA signal, and 29 is an input terminal that outputs a pulse at the rising edge of the output signal of the not gate 28. It is a multi-vibrator that outputs. 30 and 31 are Nand Gate, respectively.
32 is an up-down counter serving as a counter circuit, and NAND gate 30 is a multivibrator 27.
inputs the Q signal and φB signal of , outputs the up count signal 33 to the up down counter 32,
It inputs the Q signal and the φB signal, and outputs the down count signal 34 to the up down counter 32. 35 is a direction discrimination circuit, NAND gate 36,
A latch circuit is constructed by cross-coupling two gates 37, and outputs a direction signal 38 to the microcomputer circuit 20. That is, when one of the input terminals of the NAND gate 36 becomes "L" level due to the up count signal 33 during up counting, the direction signal 38 at the "H" level is output; One of the input terminals of the NAND gate 37 becomes "L" level, and the direction signal 38 of "L" level
Output. 39 and 40 are a carry signal and a borrow signal of the up-down counter 32, respectively; 41 is an AND gate that ANDs these signals 39 and 40; and 42 is a first The D-type flip-flop serves as a transmission circuit, and its D input terminal is pulled up, its logic input is fixed at the "H" level, and a set signal 43 at the "H" level is output from the Q output terminal in response to a trigger. 4
4 is a multivibrator, and when the set signal 43 of the flip-flop 42 rises, a pulse signal of "L" level is sent from the output terminal of the multivibrator to the microcomputer circuit 20 as an interrupt signal 45.
output to the interrupt input pin. Reference numeral 46 denotes a D-type flip-flop which serves as a second storage circuit that is triggered by the rising edge of the set signal 43; the direction signal 38 is input to its D input terminal, and the direction latch signal 47 is sent to the microcomputer circuit 20 from its Q output terminal. Output. A reset signal 50 is output from the microcomputer circuit 20 and is output to the clear input terminal CLR of the flip-flop 42. 51 is output from the up-down counter 32 to the microcomputer circuit 20, for example,
This is the lowest information of 1 byte of current position information, and 52 is a random access memory (RAM) which is a storage section provided in the microcomputer circuit 20 and stores upper information of the current position information. .

Figure 3 shows the microcomputer circuit 2 in Figure 1.
1 is a flowchart showing an example of software processing in 0. Next, the operation of the above configuration will be explained with reference to FIGS. 2 and 3. As shown in FIG. 2, when the φB signal 26 is in an up-count state leading in phase to the φA signal 25, the multivibrator 27 is triggered at the rising edge of the φA signal 25, and the NAND gate 30
An "H" level pulse is output to one input terminal of. At this time, the "H" level φB signal 26 arrives at the other input terminal of the NAND gate 30, so
The NAND gate 30 outputs the "L" level up count signal 33 to the direction determining circuit 35 and the counter 3.
The direction signal 38 of the direction determining circuit 35 remains at the "H" level, and the counter 32 counts up when the up count signal 33 rises. In this state, the φA signal 25
The multivibrator 29 is triggered by the fall of φB, and a high level pulse is output to one input terminal of the NAND gate 31, but
Since the signal 26 is at the "L" level at this timing, the down count signal 34 of the NAND gate 31 is kept at the "H" level. When the counter 32 overflows while the counter 32 is counting up, a carry signal 39 of "L" level is output, and a set signal 43 of "H" level is output from the flip-flop 42 to the multivibrator 44 and the flip-flop 4.
6 is output. At this moment, the direction signal 38 is at the "H" level since it is an up count, and the direction latch signal 47 is fixed at the "H" level. The microcomputer circuit 20 executes interrupt processing in response to the "L" level interrupt signal output 45 of the multivibrator 44.

To explain the interrupt processing according to the flowchart of FIG. 3, first, the direction latch signal 47 is checked, and since it is at the "H" level here, it is determined whether the direction signal 38 is at the "H" level or not. Proceed to judgment processing. If there is no reversal of the rotational direction of the rotary encoder 3 by this time, the logical output of the direction signal 38 is at the "H" level, and the process proceeds to increment processing of the higher-order information of the current position information. That is, if the upper position information stored in the N address of the RAM 52 is incremented and a carry signal is generated as a result, the N address of the RAM 52 is incremented.
The higher position information stored at address -1 is incremented, the current position information is updated, and at the end of the process, the reset signal 50 is outputted as an "L" level pulse, and the flip-flop 42 is temporarily turned off. Clear and new carry signal 39
Alternatively, the flip-flop 42 is set by the borrow signal 40, allowing the interrupt signal 45 to be generated, and the process is terminated.

Next, the operation for high-speed one-count up-down, which is the main point of the present invention, will be explained. The microcomputer circuit 20 executes interrupt processing in response to the "L" level interrupt signal output 45 of the multivibrator 44, and checks the direction latch signal 47 according to the flowchart in FIG. Since the latch signal 47 is at the "H" level, the direction signal 38 is also at the "H" level.
The process is the same as described above until proceeding to the process of determining whether or not the level is reached, but before this point, the rotation direction of the rotary encoder 3 is reversed,
When a borrow signal is generated in the counter 32 and the countdown is in progress, the logic output of the direction signal 38 is inverted from the previous "H" level to the "L" level by the first down count signal 34. Therefore, the current position information is not incremented, only the "L" level pulse output processing of the reset signal 50 is performed, and the processing is ended.

In the above explanation, we have talked about the down count processing that occurred immediately after the carry signal 39 was generated due to the up count, but even if the up count occurs immediately after the generation of the borrow signal 40 due to the down count, the current It is clear that unnecessary lowering of the upper-level information of the location information is not performed.

〔Effect of the invention〕

According to the present invention described above, the direction latch signal and the direction signal are output to the microcomputer circuit, the logical states of these two signals are determined during interrupt processing, and the presence or absence of inversion of the rotary encoder is checked. If a reversal has occurred, unnecessary incrementation and decrement of the upper information of the current location information is not performed, so there is no error in the current location information, and accurate positioning is always possible. effective.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the counting device of the present invention, and Fig. 2 shows the signal output state of each part in Fig. 1 during the process in which the rotation direction is reversed immediately after the carry signal is generated and a borrow signal is output. Time chart showing,
FIG. 3 is a flowchart showing one embodiment of software processing in the microcomputer circuit of FIG. 2...Positioning motor, 3...Rotary encoder, 20...Microcomputer circuit,
25...φA signal, 26...φB signal, 27,2
9, 44...Multi-vibrator, 32...Up-down counter, 35...Direction discrimination circuit, 4
2, 46...Flip-flop, 51...Current position information, 52...RAM.

Claims (1)

[Claims] 1. An up-down counter that inputs the two-phase signal from the encoder and performs up-down counting;
A direction determining circuit that outputs a logic signal corresponding to the counting direction of the up-down counter, in a microcomputer that inputs the lowest information of the counter and carries up or down with a carry or borrow signal; and a memory circuit that is triggered by the carry or borrow signal and stores the output signal of the direction determination circuit, and the microcomputer inputs the carry or borrow signal as an interrupt signal and performs a carry or a carry down according to an interrupt routine. It also determines whether the signal output of the direction discrimination circuit and the signal output of the storage circuit match, and if they match, performs a carry or a digit in response to the output of the direction discrimination circuit. A counting device characterized by having a configuration in which the digit is lowered and if there is a discrepancy, the digit is not raised or lowered.