JPH04243323A - Afc circuit - Google Patents
Afc circuitInfo
- Publication number
- JPH04243323A JPH04243323A JP3003946A JP394691A JPH04243323A JP H04243323 A JPH04243323 A JP H04243323A JP 3003946 A JP3003946 A JP 3003946A JP 394691 A JP394691 A JP 394691A JP H04243323 A JPH04243323 A JP H04243323A
- Authority
- JP
- Japan
- Prior art keywords
- sweep
- frequency
- oscillator
- circuit
- afc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【0001】[発明の目的][Object of the invention]
【0002】0002
【産業上の利用分野】本発明はAFC回路(自動周波数
制御回路)に係り、特にAFC回路内の電圧制御発振器
の制御を安定に行うAFC回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AFC circuit (automatic frequency control circuit), and more particularly to an AFC circuit that stably controls a voltage controlled oscillator within the AFC circuit.
【0003】0003
【従来の技術】従来、この種のAFC回路は、ミキサと
位相比較器と掃引用発振器とループフィルタと電圧制御
発振器とを備え、前記電圧制御発信器を制御し該電圧制
御発振器の出力を前記ミキサに加えて前記掃引用発振器
が出力する基準信号の周波数に受信周波数を同期させる
ようにしていた。2. Description of the Related Art Conventionally, this type of AFC circuit includes a mixer, a phase comparator, a sweep oscillator, a loop filter, and a voltage controlled oscillator, and controls the voltage controlled oscillator to control the output of the voltage controlled oscillator. The reception frequency is synchronized with the frequency of the reference signal output by the sweep oscillator in addition to the mixer.
【0004】この従来のAFC回路ではPLLループに
ミキサを用い、掃引用発振器の出力を加えてVCOを制
御するようにしていたため、掃引用発振器の動作点がA
FCループの影響で変わり、PLLのループによる受信
信号の引込み方向と掃引用発振器による掃引方向が逆の
場合は遅くなり、同一方向の時は速くなるという現象が
生じた。In this conventional AFC circuit, a mixer is used in the PLL loop, and the output of the sweep oscillator is added to control the VCO, so the operating point of the sweep oscillator is A.
This is due to the influence of the FC loop, and a phenomenon has occurred in which when the direction in which the received signal is pulled in by the PLL loop and the sweep direction by the sweep oscillator are opposite, the speed becomes slower, and when they are in the same direction, the speed becomes faster.
【0005】このため、掃引を行ってからの引き込み動
作速度にばらつきを生じ、又、掃引周波数範囲も変わっ
てしまうという問題も生じた。[0005] For this reason, there are problems in that the speed of the pull-in operation after the sweep is performed varies, and the sweep frequency range also changes.
【0006】[0006]
【発明が解決しようとする課題】上述の如く、従来のA
FC回路によると、掃引用発振器の出力をミキサにより
AFCループに加えていたためVCOの制御において掃
引速度及び周波数範囲にばらつきが生じるという問題が
あった。[Problems to be Solved by the Invention] As mentioned above, the conventional A
According to the FC circuit, since the output of the sweep oscillator is added to the AFC loop by a mixer, there is a problem in that the sweep speed and frequency range vary in controlling the VCO.
【0007】そこで、本発明はこの問題点に鑑みてなさ
れたもので、掃引速度が一定でかつ掃引周波数範囲が変
わらない安定な引き込み動作をすることのできるAFC
回路を提供することを目的とする。[0007] The present invention was made in view of this problem, and provides an AFC capable of performing stable pull-in operation with a constant sweep speed and an unchanged sweep frequency range.
The purpose is to provide circuits.
【0008】[発明の構成][Configuration of the invention]
【0009】[0009]
【課題を解決するための手段】ミキサと位相比較器と掃
引用発振器とループフィルタと電圧制御発振器とを備え
、前記電圧制御発信器を制御し該電圧制御発振器の出力
を前記ミキサに加えて前記掃引用発振器が出力する基準
信号の周波数に受信周波数を同期させるAFC回路にお
いて、前記位相比較器の出力から前記掃引用発振器が出
力する基準信号の周波数と前記ミキサの出力周波数との
差の判定を行う周波数差判定回路と、前記周波数差判定
回路の判定出力に基づいてAFCループ引込み範囲外で
は前記掃引用発振器をループフィルタに接続し前記位相
比較器と前記ループフィルタとを切断し、AFCループ
引込み範囲内では前記掃引用発振器を介さずに前記位相
比較器と前記ループフィルタとを接続する手段とを具備
したことを特徴とする。[Means for Solving the Problems] A mixer, a phase comparator, a sweep oscillator, a loop filter, and a voltage controlled oscillator are provided, and the voltage controlled oscillator is controlled and the output of the voltage controlled oscillator is added to the mixer. In an AFC circuit that synchronizes a reception frequency with a frequency of a reference signal outputted by a sweep oscillator, the difference between the frequency of the reference signal outputted by the sweep oscillator and the output frequency of the mixer is determined from the output of the phase comparator. Based on the determination output of the frequency difference determination circuit, the sweep oscillator is connected to the loop filter, the phase comparator and the loop filter are disconnected, and the AFC loop is pulled in based on the determination output of the frequency difference determination circuit. Within this range, the present invention is characterized by comprising means for connecting the phase comparator and the loop filter without using the sweep oscillator.
【0010】0010
【作用】本発明のAFC回路では、前記周波数差判定回
路により前記掃引用発振器が出力する基準信号の周波数
と前記ミキサの出力周波数との差を判定し、この判定出
力に基づいてAFCループ引込み範囲外では前記掃引用
発振器をループフィルタに接続し前記位相比較器と前記
ループフィルタとを切断し、AFCループ引込み範囲内
では前記掃引用発振器を介さずに前記位相比較器と前記
ループフィルタとを接続するようにしている。[Operation] In the AFC circuit of the present invention, the frequency difference determination circuit determines the difference between the frequency of the reference signal outputted by the sweep oscillator and the output frequency of the mixer, and based on this determination output, the AFC loop pull-in range is determined. Outside, the sweep oscillator is connected to the loop filter and the phase comparator and the loop filter are disconnected, and within the AFC loop pull-in range, the phase comparator and the loop filter are connected without going through the sweep oscillator. I try to do that.
【0011】[0011]
【実施例】以下、添付図面を参照して、本発明の実施例
について詳細に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
【0012】図1は本発明のAFC回路の一実施例のブ
ロック図である。FIG. 1 is a block diagram of an embodiment of the AFC circuit of the present invention.
【0013】図1において、1はミキサ、2は電圧制御
発振器(VCO)、3はループフィルタ、4は掃引用発
振器、5は掃引切替回路、6は位相比較器である。又、
12は基準発振器である。In FIG. 1, 1 is a mixer, 2 is a voltage controlled oscillator (VCO), 3 is a loop filter, 4 is a sweep oscillator, 5 is a sweep switching circuit, and 6 is a phase comparator. or,
12 is a reference oscillator.
【0014】図2は前記掃引切替回路5の詳細ブロック
図であり、この掃引切替回路5の周波数差判定回路8は
コンパレータ回路9、直流分検波回路10、ローパスフ
ィルタ11を備えている。FIG. 2 is a detailed block diagram of the sweep switching circuit 5. The frequency difference determining circuit 8 of the sweep switching circuit 5 includes a comparator circuit 9, a DC subdetection circuit 10, and a low-pass filter 11.
【0015】以下、図1、図2を参照して、本実施例の
構成、動作について説明する。The configuration and operation of this embodiment will be explained below with reference to FIGS. 1 and 2.
【0016】図1において、ミキサ1の出力と基準発振
器12の出力は位相比較器6に入力され、この位相比較
器6の位相比較出力は掃引切替回路5の周波数差判定回
路8に入力される。In FIG. 1, the output of the mixer 1 and the output of the reference oscillator 12 are input to a phase comparator 6, and the phase comparison output of the phase comparator 6 is input to the frequency difference determination circuit 8 of the sweep switching circuit 5. .
【0017】周波数差判定回路8では、前記位相比較器
6の出力をローパスフィルタ11に加えてその低域成分
を取り出し、更に検波回路10で直流分を検波する。検
波された直流分はコンパレータ回路9で波形整形されア
ナログスイッチ7の制御信号となり、アナログスイッチ
7の切り替えを制御する。In the frequency difference determination circuit 8, the output of the phase comparator 6 is applied to a low-pass filter 11 to extract its low-frequency component, and a detection circuit 10 further detects the DC component. The detected DC component is waveform-shaped by the comparator circuit 9 and becomes a control signal for the analog switch 7, which controls switching of the analog switch 7.
【0018】この制御により、AFCループ引込み範囲
外ではアナログスイッチ7の接点をa側にして掃引用発
振器4をループフィルタ3に接続しループフィルタ3と
位相比較器6とを切断して、掃引用発振器4による掃引
を開始する。この掃引開始後、AFCループ引込み範囲
内になると周波数差判定回路8から出力される制御信号
によってアナログスイッチ7の接点がb側にされ掃引用
発振器4を介さずに位相比較器6とループフィルタ3と
が接続されて、ミキサ1、位相比較器6、基準発振器1
2、ループフィルタ3、VCO2からなるAFCループ
を形成する。これによりAFCループにおけるロックが
容易に行われ、ミキサ1に入力される受信周波数は基準
発振器12から出力される基準信号の周波数と同期する
。 上述のようになされることにより掃引時及び位相
同期保持時の切替を確実にし、VCO2の制御が安定に
行われる。With this control, outside the AFC loop pull-in range, the contact of the analog switch 7 is set to the a side, the sweep oscillator 4 is connected to the loop filter 3, the loop filter 3 and the phase comparator 6 are disconnected, and the sweep The sweep by the oscillator 4 is started. After the start of this sweep, when the AFC loop pull-in range is reached, the contact point of the analog switch 7 is set to the b side by the control signal output from the frequency difference determination circuit 8, and the phase comparator 6 and the loop filter 3 are connected without going through the sweep oscillator 4. are connected to mixer 1, phase comparator 6, and reference oscillator 1.
2. An AFC loop consisting of a loop filter 3 and a VCO 2 is formed. This facilitates locking in the AFC loop, and the reception frequency input to the mixer 1 is synchronized with the frequency of the reference signal output from the reference oscillator 12. By doing as described above, switching during sweeping and maintaining phase synchronization is ensured, and control of the VCO 2 is stably performed.
【0019】[0019]
【発明の効果】以上説明したように、本発明のAFC回
路では、前記周波数差判定回路により前記基準信号発振
器が出力する基準信号の周波数と前記ミキサの出力周波
数との差を判定し、この判定出力に基づいてAFCルー
プ引込み範囲外では前記掃引用発振器をループフィルタ
に接続し前記ループフィルタと前記位相比較器とを切断
し、AFCループ引込み範囲内では前記掃引用発振器を
介さずに前記位相比較器と前記ループフィルタとを接続
するようにしている。As explained above, in the AFC circuit of the present invention, the frequency difference determining circuit determines the difference between the frequency of the reference signal output from the reference signal oscillator and the output frequency of the mixer, and Based on the output, outside the AFC loop pull-in range, the sweep oscillator is connected to the loop filter and the loop filter and the phase comparator are disconnected, and within the AFC loop pull-in range, the phase comparison is performed without going through the sweep oscillator. The loop filter is connected to the loop filter.
【0020】このため、電圧制御発振器(VCO)の制
御が安定になり、掃引速度が一定でかつ掃引周波数範囲
が変わらない安定な引き込み動作をすることができる。[0020] Therefore, the control of the voltage controlled oscillator (VCO) becomes stable, and a stable pull-in operation can be performed in which the sweep speed is constant and the sweep frequency range remains unchanged.
【図1】本発明のAFC回路の一実施例のブロック図。FIG. 1 is a block diagram of an embodiment of an AFC circuit of the present invention.
【図2】図1に係る掃引切替回路の詳細ブロック図。FIG. 2 is a detailed block diagram of the sweep switching circuit according to FIG. 1;
1…ミキサ 2…電圧制御発信器(VCO) 3…ループフィルタ 4…掃引用発振器 5…掃引切替回路 6…位相比較器 7…アナログスイッチ 8…周波数差判定回路 9…コンパレータ回路 10…検波回路 11…ローパスフィルタ 12…発振器 1...Mixer 2...Voltage control oscillator (VCO) 3...Loop filter 4...Sweeping oscillator 5...Sweep switching circuit 6...Phase comparator 7...Analog switch 8...Frequency difference judgment circuit 9...Comparator circuit 10...Detection circuit 11...Low pass filter 12...Oscillator
Claims (1)
ループフィルタと電圧制御発振器とを備え、前記電圧制
御発信器を制御し該電圧制御発振器の出力を前記ミキサ
に加えて前記掃引用発振器が出力する基準信号の周波数
に受信周波数を同期させるAFC回路において、 前
記位相比較器の出力から前記掃引用発振器が出力する基
準信号の周波数と前記ミキサの出力周波数との差の判定
を行う周波数差判定回路と、前記周波数差判定回路の判
定出力に基づいてAFCループ引込み範囲外では前記掃
引用発振器を前記ループフィルタに接続し、AFCルー
プ引込み範囲内では前記位相比較器と前記ループフィル
タとを接続する手段とを具備したことを特徴とする。1. A mixer, a phase comparator, a sweep oscillator, a loop filter, and a voltage controlled oscillator, the voltage controlled oscillator is controlled and the output of the voltage controlled oscillator is applied to the mixer, so that the sweep oscillator is controlled. In an AFC circuit that synchronizes a reception frequency with a frequency of a reference signal to be output, a frequency difference determination for determining the difference between the frequency of the reference signal output from the sweep oscillator and the output frequency of the mixer from the output of the phase comparator. and connecting the sweeping oscillator to the loop filter outside the AFC loop pull-in range, and connecting the phase comparator and the loop filter within the AFC loop pull-in range based on the determination output of the frequency difference determination circuit. It is characterized by comprising means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3003946A JPH04243323A (en) | 1991-01-17 | 1991-01-17 | Afc circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3003946A JPH04243323A (en) | 1991-01-17 | 1991-01-17 | Afc circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04243323A true JPH04243323A (en) | 1992-08-31 |
Family
ID=11571288
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3003946A Pending JPH04243323A (en) | 1991-01-17 | 1991-01-17 | Afc circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04243323A (en) |
-
1991
- 1991-01-17 JP JP3003946A patent/JPH04243323A/en active Pending
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