JPH0424566A - Voltage detector - Google Patents

Abstract

PURPOSE:To detect a voltage level precisely by constructing an overvoltage detecting element of a first comparator comparing a voltage to be measured with a reference voltage and by constructing a voltage level detecting element of an integrator and a second comparator comparing a divided-voltage output obtained by synthesizing a sawtooth wave from the integrator and the reference voltage and by dividing the voltage thus obtained, with the voltage to be measured. CONSTITUTION:An oscillation circuit 3 generates a reset pulse 1 at a prescribed period. An integrator 4, to which the reset pulse from the oscillation circuit 3 is inputted, outputs a sawtooth wave 2 repeatedly at a prescribed period. A voltage-divider circuit 15 synthesizes the sawtooth wave 2 inputted from the integrator 4 and a regulated reference voltage VREF 5 inputted through a buffer 14, divides the voltage thus obtained, prepares a voltage waveform 3 as the result and inputs it to a (+) terminal of a comparator 7. A voltage Ed to be measured is inputted to a (-) terminal of the comparator 7. As a result, a pulse having a pulse width T being proportional to the amplitude (level) of the voltage Ed to be measured is outputted from the comparator 7 as a waveform as seen in Edp, and a voltage level is detected therefrom.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides an overvoltage detection unit that detects that a voltage to be measured is an overvoltage exceeding a certain reference voltage, and a voltage detector that detects the voltage level of the voltage to be measured. The present invention relates to a voltage detection device having a level detection section.

[Prior Art] Types of voltage detection include overvoltage detection, which detects that the voltage to be measured exceeds a certain reference voltage, and voltage level detection, which detects the magnitude of the voltage itself.

As a voltage level detection circuit, a voltage pulse width conversion circuit that converts a voltage value into a pulse width is known. Further, in the voltage pulse width conversion circuit, in order to increase the accuracy of the pulse width, there is a voltage detection circuit that limits the voltage range to be detected and detects a voltage value higher than a certain voltage.

FIG. 3 is a circuit diagram showing a conventional example of a voltage detection device having an overvoltage detection section and a voltage level detection section.

In the figure, Ed is the voltage to be measured, 1 is the variable resistor, and 2
is a comparator, 3 is an oscillation circuit, 4 is an integrator, 5 is an addition circuit,
6 is an offset voltage circuit, 7 is a comparator, and 8 is a logic circuit.

FIG. 4 is a waveform diagram showing voltage waveforms at various parts in the circuit of FIG. 3.

The circuit operation will be explained with reference to FIGS. 3 and 4.

Regarding overvoltage detection, the reference voltage adjusted by the variable resistor 1 and the measured voltage Ed are compared in the comparator 2, and when the measured voltage Ed is an overvoltage exceeding the reference voltage, an output is generated from the comparator 2. Then, it is detected that the voltage to be measured Ed is an overvoltage.

The voltage level detection is as follows. Oscillation circuit 3
In this case, a reset pulse as shown in (■) in FIG. 4 is generated at regular intervals. The integrator 4 receives the reset pulse from the oscillation circuit 3 and repeatedly outputs a sawtooth wave at a constant period, as shown in (■) in FIG. 4. On the other hand, the offset voltage circuit 6 generates an offset voltage as shown in (■) in FIG.

The adder circuit 5 adds the sawtooth wave from the integrator 4 and the offset voltage from the offset voltage circuit 6 to create a voltage waveform as shown in (■) in FIG. input to the (+) terminal of the The voltage to be measured Ed is input to the (-) terminal of the comparator 7. As a result, the magnitude (level) of the voltage to be measured Ed is determined from the comparator 7.
A pulse with a pulse width T proportional to Edp in FIG.
It is output as a waveform as shown in , and the voltage level is detected.

Here, when the output pulse width of the comparator 7 is T and the offset voltage from the offset voltage circuit 6 is Ve, the voltage to be measured Edp is expressed by the following equation.

Ed p=K −T+V e However, K is a proportionality constant determined by the slope of the sawtooth wave which is the output of the integrator 4.

Generally, such a voltage detection device is often used for the purpose of protection, so highly accurate detection is required, and an adjustment element is necessarily added.

[Problem to be solved by the invention]

A conventional voltage detection device that does not have an adjustment element in its voltage level detection section is composed of an integrator, an offset voltage circuit, and an addition circuit. Therefore, errors in individual circuits directly affect the output pulse width, and since there is no adjustment element, it is not corrected and contains a certain amount of error.

An object of the present invention is to provide a voltage detection device equipped with a highly accurate voltage level detection section without adding any adjustment elements.

[Means to solve the problem]

In order to solve the above problem, in the present invention, in a voltage detection device having an overvoltage detection section and a voltage level detection section, the overvoltage detection section is configured with a first comparator that compares the voltage to be measured and a reference voltage, The voltage level detection section is composed of an integrator that generates a sawtooth wave,
a voltage dividing circuit that combines and divides the sawtooth wave and the reference voltage from the integrator and outputs the voltage; a second comparator that compares the divided voltage output from the voltage dividing circuit and the voltage to be measured; It was constructed by

[Effect]

The first comparator compares the voltage to be measured and the reference voltage, and crosses the output when the voltage to be measured exceeds the reference voltage.

The integrator generates a sawtooth wave by being reset at regular intervals. The voltage dividing circuit takes in the sawtooth wave and the reference voltage from the integrator, synthesizes it, divides the voltage, and outputs the voltage. The second comparator compares the divided voltage output from the voltage dividing circuit with the voltage to be measured and outputs a pulse having a pulse width proportional to the level of the voltage to be measured.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In the figure, Ed is the voltage to be measured, 1 is the variable resistor, and 2
3 is a comparator, 3 is an oscillation circuit, 4 is an integrator, 14 is a bumper, 15 is a voltage dividing circuit, 7 is a comparator, and 8 is a logic circuit.

FIG. 2 is a waveform diagram showing voltage waveforms at various parts in the circuit of FIG. 1.

The circuit operation will be explained with reference to FIGS. 1 and 2.

For overvoltage detection, the reference voltage V @tF adjusted by the variable resistor 1 and the voltage to be measured Ed are connected to the comparator 2.
The measured voltage Ed is the reference voltage V REF
When the overvoltage exceeds the voltage Ed, the comparator 2 generates an output to detect that the voltage Ed to be measured is an overvoltage, and there is no difference from the conventional method. Here, the variable resistor 1 also plays a role as an adjustment element for adjusting the reference voltage VRIF, as in the conventional case.

The voltage level detection is as follows. Oscillation circuit 3
In this case, a reset pulse as shown in (■) in FIG. 2 is generated at regular intervals. The integrator 4 receives the reset pulse from the oscillation circuit 3 and repeatedly outputs a sawtooth wave at a constant period, as shown in (■) in FIG.

The voltage dividing circuit 15 synthesizes and divides the sawtooth wave ■ input from the integrator 4 and the adjusted reference voltage VIIEF ■ input via the buffer 14, and as a result, the second A voltage waveform as shown in (■) in the figure is created and input to the (+) terminal of the comparator 7. The voltage to be measured Ed is input to the (-) terminal of the comparator 7. As a result, a pulse having a pulse width T proportional to the magnitude (level) of the voltage to be measured Ed is outputted from the comparator 7 as a waveform as shown in Edp in FIG. 2, and the voltage level is detected.

By inputting the output of the comparator 7 and the output of the oscillation circuit (reset circuit) 3 to the logic circuit 8, an effective pulse width output can be obtained as its output.

In this case, the signal voltage input to the comparator 7 as a reference for comparison is generated from the adjusted reference voltage VIIEF and the output of the integrator 4. For example, the output of the integrator 4 changes from O■ to a certain voltage ■1, and the reference voltage is set to V with a sawtooth wave.
Since RlF is set and the partial pressure ratio is increased, -T (VIEF +
v1).

Therefore, if the reference voltage VILEF is the maximum voltage (overvoltage, etc.) detected on the voltage detection circuit, the detection range will be from the maximum voltage T to the maximum voltage.

Here, if the pulse width of the output of the logic circuit 8 is T, the value of the voltage to be measured is expressed by the following equation.

E d P-T(K-T+VllEF) where K is a proportionality constant determined by the slope of the sawtooth wave which is the output of the integrator 4.

〔Effect of the invention〕

This invention uses a reference voltage adjusted in a separate circuit and an integrator 4.
By dividing the sawtooth wave generated by the voltage dividing circuit 15, the accuracy of the voltage level measurement results is improved. Using the voltage level equation obtained as the measurement result shown in the example, the accuracy of each term will be explained below.

Edp=T(K-T+VuEr) was the equation for the voltage level obtained.

Among them, VREF: By using a reference voltage adjusted by a variable resistor, the error is eliminated.

Accuracy can be easily increased (conventionally (better accuracy than adder).

K: Accuracy due to the time constant of the integrator is determined. This item was previously Similar to the example.

As a result of the above, compared to the conventional example, the accuracy is improved at least by using the reference voltage.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
FIG. 3 is a circuit diagram showing a conventional example of a voltage detection device, and FIG. 4 is a waveform diagram showing voltage waveforms at various parts in the circuit of FIG. 3. Explanation of symbols Ed... Voltage to be measured, 1... Variable resistor, 2...
Comparator, 3...Oscillation circuit, 4...Integrator, 14...
・Buffer, 15... Voltage divider circuit, 7... Comparator, 8
...Logic circuit agent Patent attorney Akio Namiki Figure 1 Figure 2 Figure E3 Figure 6 Offset is king circuit Figure 4

Claims (1)

[Claims] 1) A voltage detection device that includes an overvoltage detection section that detects that the voltage to be measured is an overvoltage exceeding a certain reference voltage, and a voltage level detection section that detects the voltage level of the voltage to be measured. In the above, the overvoltage detection section is configured by a first comparator that compares the voltage to be measured and a reference voltage and generates an output when the voltage to be measured exceeds the reference voltage, and is reset at a constant cycle to cause the saw an integrator that generates a wave; a voltage divider circuit that takes in and synthesizes the sawtooth wave and the reference voltage from the integrator, divides the voltage, and outputs the voltage; and a divided voltage output from the voltage divider circuit and the voltage to be measured. and a second comparator that outputs a pulse having a pulse width proportional to the level of the voltage to be measured.