JPH0424856B2 - - Google Patents
Info
- Publication number
- JPH0424856B2 JPH0424856B2 JP57026285A JP2628582A JPH0424856B2 JP H0424856 B2 JPH0424856 B2 JP H0424856B2 JP 57026285 A JP57026285 A JP 57026285A JP 2628582 A JP2628582 A JP 2628582A JP H0424856 B2 JPH0424856 B2 JP H0424856B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- substrate support
- resin
- frame
- strips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
本発明は樹脂封止形半導体装置の製造方法に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a resin-sealed semiconductor device.
近年、比較的大きな電力を取り扱うことのでき
る半導体装置、たとえば、パワートランジスタと
呼ばれるような大型半導体装置も樹脂封止形構造
が用いられている。この場合、半導体装置の放熱
特性については十分に配慮する必要がある。 In recent years, resin-sealed structures have been used for semiconductor devices that can handle relatively large amounts of power, such as large semiconductor devices called power transistors. In this case, sufficient consideration must be given to the heat dissipation characteristics of the semiconductor device.
第1図および第2図は、上述の樹脂封止形パワ
ートランジスタの製造工程途上における状態を示
すものの一例であり、以下、本発明をこれらの図
示装置を参照して詳しくのべる。 FIGS. 1 and 2 are examples of the state of the above-mentioned resin-sealed power transistor in the middle of the manufacturing process, and the present invention will be described in detail below with reference to these illustrated devices.
このパワートランジスタの製造工程をのべる
と、先ず、所定のプレス加工法で仕上げられたリ
ードフレームと称す構体の枠体1と一体形成され
た半導体基板支持体の上に所定半導体基板を、通
常のダイボンド法で固定したのち、各電極結線を
行なつて、ついで、これを成型樹脂2で封止す
る。前記リードフレーム1はこれに多数の外部リ
ード3を連結してなり、そのうちの1つが半導体
基板支持体につながつている。そして、前記外部
リード3と半導体基板上の各電極とは、たとえ
ば、アルミニウム細線で結線される。また、前記
成型樹脂2の外枠他端に突出し、もう1つの枠体
4に連結された細条5は半導体基板支持体とつな
がつており、前記成型樹脂2の形成時に半導体基
板支持体の浮動を阻止する、いわゆる位置規正に
用いるものである。すなわち、この半導体基板支
持体の位置規正用細条5は、樹脂成形時の金型と
同半導体基板支持体との間の位置を規正し、同半
導体基板支持体の裏面に薄く均一な樹脂層を形成
し、同樹脂層が十分な電気的絶縁とともに、放熱
効果の支障とならないようにするためのものであ
る。 To explain the manufacturing process of this power transistor, first, a specified semiconductor substrate is placed on a semiconductor substrate support body integrally formed with a frame body 1 of a structure called a lead frame, which is finished by a specified press processing method, and then is placed on a semiconductor substrate support using a normal die bonding method. After fixing with a method, each electrode is connected, and then this is sealed with molded resin 2. The lead frame 1 has a number of external leads 3 connected thereto, one of which is connected to a semiconductor substrate support. The external lead 3 and each electrode on the semiconductor substrate are connected by, for example, a thin aluminum wire. Further, a strip 5 protruding from the other end of the outer frame of the molded resin 2 and connected to another frame 4 is connected to the semiconductor substrate support, so that when the molded resin 2 is formed, the semiconductor substrate support is floating. This is used for so-called position adjustment, which prevents That is, the position regulating strip 5 of the semiconductor substrate support regulates the position between the mold and the semiconductor substrate support during resin molding, and forms a thin and uniform resin layer on the back surface of the semiconductor substrate support. This is to ensure that the resin layer provides sufficient electrical insulation and does not interfere with the heat dissipation effect.
樹脂成形工程が完了すると、第1図中のX−X
およびY−Yの線に沿つて切断し、前記外部リー
ド3とその枠体1および前記細条5とその枠体4
をそれぞれ切り放して、第2図の半導体装置単体
を得る。ところが、単に枠体1および枠体4から
切り放しただけの上記半導体装置は、前記細条5
の切断端面が前記成型樹脂2の外面から突出した
ままの状態であり、これを電子機器の所定位置に
取り付けた際、前記細条5の切断端面での接触事
故ないしは絶縁不良の発生の危惧がある。なお、
外形構造中に設けられた貫通孔6は、この半導体
装置を電子機器に組み込む際に用いる取付け孔で
ある。 When the resin molding process is completed, X-X in Figure 1
and the external lead 3 and its frame 1 and the strip 5 and its frame 4.
are each cut away to obtain a single semiconductor device as shown in FIG. However, in the semiconductor device simply cut out from the frame 1 and the frame 4, the strip 5
The cut end surface of the strip 5 remains protruding from the outer surface of the molded resin 2, and when it is attached to a predetermined position of an electronic device, there is a risk of contact accident or insulation failure at the cut end surface of the strip 5. be. In addition,
The through hole 6 provided in the external structure is a mounting hole used when incorporating this semiconductor device into an electronic device.
本発明は、前記細条5の切断端面の突出部を除
去する工程をそなえることにより、上述の問題点
をも排除し、安定な半導体装置を提供するもので
ある。 The present invention eliminates the above-mentioned problems by providing a step of removing the protrusion on the cut end surface of the strip 5, thereby providing a stable semiconductor device.
第3図は本発明の実施によつて実現した半導体
装置の一部切欠断面図であり、前記細条5の切断
端面の突出部を科学的に溶解解除して、同端面を
前記成型樹脂2の外面から窪む位置まで引つ込め
たものである。前記細条5の切断端面の突出部を
取り除く方法は、強酸(例えば、塩酸)で前記突
出部の金属面を食刻除去する工程による。また、
前記細条5は、銅材を主体としたものであるか
ら、この部分を機械的方法、たとえば、ドリルで
研削することによつても、その端面を前記成型樹
脂2の外面から窪む位置まで削り除くことが可能
である。なお、図中の7が放熱板を兼ねる半導体
基板支持体である。 FIG. 3 is a partially cutaway sectional view of a semiconductor device realized by carrying out the present invention, in which the protruding portion of the cut end surface of the strip 5 is chemically dissolved and the end surface is replaced with the molded resin 2. It is recessed from the outside surface to a recessed position. The method for removing the protrusion on the cut end surface of the strip 5 is to etch away the metal surface of the protrusion with a strong acid (for example, hydrochloric acid). Also,
Since the strip 5 is mainly made of copper material, the end surface of the strip 5 can be polished from the outer surface of the molded resin 2 to a recessed position even by grinding this portion mechanically, for example, with a drill. It is possible to remove it. Note that 7 in the figure is a semiconductor substrate support that also serves as a heat sink.
さらに、前記細条5の端面部は、上記の除去工
程で形成された窪み部分に絶縁性樹脂を詰め込む
ことにより、一段と安定化がはかられる。すなわ
ち、この端面が絶縁性樹脂で覆われていると、塵
埃の堆積、あるいは端面金属の腐食物生成による
絶縁性の劣化が少なく、経時安定性が良好であ
る。 Further, the end face portion of the strip 5 can be further stabilized by filling the recessed portion formed in the above-mentioned removal process with an insulating resin. That is, when this end face is covered with an insulating resin, there is little deterioration in insulation due to accumulation of dust or formation of corrosive substances on the end face metal, and stability over time is good.
以上に実施例で詳しくのべたように、本発明
は、放熱板を兼ねる半導体基板支持体の一方の側
から導出される外部リードをつなぐ枠体と、前記
半導体基板支持体の他方の側から導出される細条
をつなぐ枠体とを有するリードフレームを用い
て、所定半導体基板を前記半導体基板支持体の表
面に載置したのち、同支持体を前記外部リードと
前記細条とによつて金型に固定して、前記半導体
基板支持体の裏面に薄い樹脂層が形成されるよう
に樹脂封止成型したのち、前記外部リードおよび
前記細条をそれぞれの枠体から切り離す工程、前
記細条の切断端面を樹脂封止成型部の外部から窪
む位置まで引つ込める端面処理工程および前記端
面処理により形成された窪み部分を絶縁性樹脂で
埋める工程をそなえた樹脂封止形半導体装置の製
造方法である。本発明によれば、放熱特性ならび
に電子機器類に装着して使用する際の絶縁性を十
分に保障し得る樹脂封止形構造の大型半導体装置
を実現することができ、同半導体装置の信頼性を
向上させることができる。 As described in detail in the embodiments above, the present invention provides a frame body that connects external leads led out from one side of a semiconductor substrate support that also serves as a heat sink, and a frame body that connects external leads led out from the other side of the semiconductor substrate support. A predetermined semiconductor substrate is placed on the surface of the semiconductor substrate support using a lead frame having a frame that connects the external leads and the strips. After fixing in a mold and resin sealing molding so that a thin resin layer is formed on the back surface of the semiconductor substrate support, a step of separating the external leads and the strips from their respective frames; A method for manufacturing a resin-sealed semiconductor device, comprising an end-face treatment step of retracting a cut end surface from the outside of a resin-sealed molded part to a recessed position, and a step of filling the recessed portion formed by the end-face treatment with an insulating resin. It is. According to the present invention, it is possible to realize a large semiconductor device with a resin-sealed structure that can sufficiently guarantee heat dissipation characteristics and insulation properties when used in electronic equipment, and the reliability of the semiconductor device can be improved. can be improved.
第1図および第2図は本発明の実施過程におけ
る状態を示す斜視図、第3図は本発明の実施例に
より得られた半導体装置の一部切欠断面図であ
る。
1……リードフレームの枠体、2……成型樹
脂、3……外部リード、4……枠体、5……細
条、6……貫通孔、7……半導体基板支持体。
1 and 2 are perspective views showing the state in the process of implementing the present invention, and FIG. 3 is a partially cutaway sectional view of a semiconductor device obtained according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Frame of lead frame, 2... Molded resin, 3... External lead, 4... Frame, 5... Strip, 6... Through hole, 7... Semiconductor substrate support.
Claims (1)
から導出される外部リードをつなぐ枠体と、前記
半導体基板支持体の他方の側から導出される細条
をつなぐ枠体とを有するリードフレームを用い
て、所定半導体基板を前記半導体基板支持体の表
面に載置したのち、同支持体を前記外部リードと
前記細条とによつて金型に固定して、前記半導体
基板支持体の裏面に薄い樹脂層が形成されるよう
に樹脂封止成型したのち、前記外部リードおよび
前記細条をそれぞれの枠体から切り離す工程、前
記細条の切断端面を樹脂封止成型部の外部から窪
む位置まで引つ込める端面処理工程および前記端
面処理により形成された窪み部分を絶縁性樹脂で
埋める工程をそなえた樹脂封止形半導体装置の製
造方法。1. A lead frame having a frame that connects external leads led out from one side of a semiconductor substrate support that also serves as a heat sink, and a frame that connects strips led out from the other side of the semiconductor substrate support. After placing a predetermined semiconductor substrate on the surface of the semiconductor substrate support, the support is fixed to a mold by the external leads and the strips, and a semiconductor substrate is placed on the back surface of the semiconductor substrate support. After performing resin sealing molding to form a thin resin layer, separating the external leads and the strips from their respective frames, and recessing the cut end surfaces of the strips from the outside of the resin sealing molding part. 1. A method for manufacturing a resin-sealed semiconductor device, comprising the steps of processing an end surface so as to retract the end surface, and filling a recessed portion formed by the end surface treatment with an insulating resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57026285A JPS58143538A (en) | 1982-02-19 | 1982-02-19 | Manufacture of resin seal type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57026285A JPS58143538A (en) | 1982-02-19 | 1982-02-19 | Manufacture of resin seal type semiconductor device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11722691A Division JPH0618241B2 (en) | 1991-05-22 | 1991-05-22 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58143538A JPS58143538A (en) | 1983-08-26 |
| JPH0424856B2 true JPH0424856B2 (en) | 1992-04-28 |
Family
ID=12189016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57026285A Granted JPS58143538A (en) | 1982-02-19 | 1982-02-19 | Manufacture of resin seal type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58143538A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57147260A (en) * | 1981-03-05 | 1982-09-11 | Matsushita Electronics Corp | Manufacture of resin-sealed semiconductor device and lead frame used therefor |
| JPS60128646A (en) * | 1983-12-16 | 1985-07-09 | Hitachi Ltd | Semiconductor device and lead frame used for manufacturing the same device |
| JPS60128645A (en) * | 1983-12-16 | 1985-07-09 | Hitachi Ltd | Semiconductor device |
| JPS60172346U (en) * | 1984-04-23 | 1985-11-15 | 新電元工業株式会社 | Resin-sealed semiconductor device |
| JPS60247952A (en) * | 1984-05-23 | 1985-12-07 | Nec Corp | Resinous insulation type semiconductor device |
| JPS62180957U (en) * | 1986-05-06 | 1987-11-17 |
-
1982
- 1982-02-19 JP JP57026285A patent/JPS58143538A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58143538A (en) | 1983-08-26 |
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