JPH04252520A - Multi-channel d/a converter - Google Patents

Abstract

PURPOSE:To reduce the circuit scale by using a series resistor in a ladder type resistor circuit in common between channels. CONSTITUTION:The current summing system is adopted, in which number of channel number is (n) and number of input bits is (m). Resistors of (m+1) sets whose resistance is R/n each are connected in series between signal lines whose reference voltages are L1 and L2 in a ladder resistor circuit network 1 of one channel. m-Sets of separation resistors whose resistance is 2R are connected to each of m-sets of input terminals. Moreover, m-sets of separate resistors whose resistance is 2R are connected to each connecting point of the series and separate resistors in the circuit network 1 in (n-1) channels of ladder resistor circuit networks 21-2n-1. The other terminal of the separate resistors is connected to the signal line whose reference voltage is L2 or relevant channel current summing nodes A1-An based on the digital control data D and a conversion circuit 4 converts a current into a voltage. Thus, the series resistor comprising the resistors of (m+1) sets whose resistance is R/n each is used in common between channels.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current addition type multi-channel digital/analog (D/A) converter. In recent years, microcontrollers need to perform a large number of controls, and therefore require a large number of D/A converters. Therefore, regardless of whether the D/A converter is mounted on a microcontroller, it is desirable that the circuit scale of the D/A converter be as small as possible.

0002

2. Description of the Related Art FIG. 3 shows a circuit configuration of a multi-channel D/A converter as an example of a conventional type. The illustrated circuit has a current addition type configuration in which the number of channels is n and the number of input bits is m. Each channel consists of a series resistor of m+1 resistors R connected in series between a signal line of a high-potential reference voltage REFH and a signal line of a low-potential reference voltage REFL; An R-2R ladder resistor network consisting of m 2R shunt resistors, one end of which is connected to each input end of the series resistor, and each shunt based on m bits of digital control data Di. A switch group Gi (i=1 to n), that is, switches S1 to Sm, switches and connects the other end of the resistor to the signal line of the reference voltage REFL or the current addition node Ai (i=1 to n).
and an operational amplifier OPi (i=1 to n) that converts the current at the current addition node to a voltage and generates the output OUTi (i=1 to n), that is, current/voltage (I/
V) conversion circuit.

As shown in the figure, in the conventional configuration, if the number of channels is n, then n D/A converters are also required. Since the D/A converter originally has a large circuit scale, if a large number of D/A converters are used, the circuit scale becomes quite large. Particularly when installed in a microcontroller, a considerable increase in chip size is unavoidable. Here, in order to reduce the size of the R-2R ladder resistor network that occupies most of the circuit scale of the D/A converter, the sizes of the resistors R and 2R and the transistors as switching elements must be reduced.

However, the accuracy of the D/A converter depends on the resistance values of resistors R and 2R and the switch (that is, transistor).
Since it is determined by the ratio of the on-resistance of the switch, the resistance value (R) must be considerably larger than the on-resistance of the switch in order to achieve the desired accuracy. In other words, the resistor R,2
Making both R and the switch (transistor) small is the direction to reduce this ratio, so the size of the ladder resistor network is ultimately determined by accuracy.

[0005]

[Problems to be Solved by the Invention] As mentioned above, in the conventional configuration, in order to keep the circuit scale small, resistors R and 2R
This method has the disadvantage that it is not possible to obtain the desired accuracy because both the transistor and the switch (transistor) must be made small. On the other hand, in order to maintain accuracy at a predetermined value, it is necessary to make the resistance value (R) considerably larger than the on-resistance of the switch (in other words, make the resistor large).
This method has the disadvantage that it is not possible to reduce the circuit scale.

The present invention was created in view of the problems in the prior art, and is a multi-channel D system that can reduce the circuit scale without reducing accuracy.
/A converter.

[0007]

[Means for Solving the Problems] In order to solve the above problems, the present invention actively utilizes (shares) portions that can be shared in the ladder resistor network for each channel. FIG. 1 shows the basic configuration of a multi-channel D/A converter according to the present invention. The illustrated D/A converter has a current addition type configuration in which the number of channels is n and the number of input bits is m.

In the figure, 1 indicates a ladder-type resistor network (for one channel), in which m+1 resistor networks are connected in series between the signal line of the first reference voltage L1 and the signal line of the second reference voltage L2. a series resistor with a resistance R/n, and m resistors 2, each of which has one end connected to the input terminal side of each of the m series resistors.
It has a shunt resistor of R. 21 to 2n-1 each indicate a ladder-shaped resistance network (for n-1 channels), and one end of each is connected to each connection point of the series resistor and shunt resistor in the ladder-shaped resistance network 1. Each of the circuits has m shunt resistors each having a resistance of 2R, and is configured to share the series resistor as a series resistor.

Reference numeral 3 indicates a switch circuit which, based on digital control data D, switches ladder-shaped resistor networks 1 and 21.
~2n-1 (each channel) for switching and connecting the other ends of the m shunt resistors to the signal line of the second reference voltage or the current addition nodes A1 to An of the corresponding channel. be. Further, 4 indicates a current/voltage (I/V) conversion circuit that converts the current at the current addition node for each channel into a voltage.

[0010] The ratio of the on-resistance to the resistance R of each switch in the switch circuit, which is related to accuracy, is the usual R-2R.
If the same accuracy as a ladder resistor network is required, this method can be used as is.

[0011]

[Operation] According to the above-described configuration, the ladder-shaped resistance network 1
Since m+1 series resistors of R/n are used in common between each channel, the circuit scale of the entire D/A converter can be relatively reduced. For example, when n = 2 (that is, 2 channels), the circuit size is approximately 75% compared to the conventional type that has an R-2R ladder resistor network (see Figure 3) for 2 channels.
%. In this case, when n is increased, the reduction ratio approaches 2/3. However, if n is made too large, the resistance ratio becomes large and it becomes difficult to achieve the desired accuracy, so it is necessary to select the size of n appropriately.

[0012] In this way, in the case of a D/A converter having several channels, it is possible to reduce the circuit scale without significantly reducing accuracy. This contributes to reducing manufacturing costs. Note that other structural features and details of the operation of the present invention will be explained using the embodiments described below with reference to the accompanying drawings.

[0013]

Embodiment FIG. 2 shows a circuit configuration of a D/A converter as an embodiment of the present invention. In this embodiment, a case of 6-bit digital input and 3 channels will be explained as an example. In the same figure, numeral 10 indicates an R/3-2R ladder resistor network that constitutes the basic configuration of the circuit of this embodiment, and includes a signal line for a high-potential reference voltage REFH and a low-potential reference voltage REFH.
7 resistors R/3 connected in series between FL signal lines
It consists of a series resistor, and six 2R shunt resistors, one end of which is connected to each input end of the six series resistors. 20 is the resistance R of the resistor network 10
A two-channel resistor ladder network configured to share a series resistor of R/3 and each channel having a series resistor of R/3 and a shunt resistor of R/3 in the resistor network 10 is shown. It has six 2R shunt resistors with one end connected to each connection point of the device.

Reference numeral 30 denotes a switch circuit, which connects the other ends of the six shunt resistors for each channel to the signal line of the reference voltage REFL or the current of the corresponding channel based on 6-bit digital control data D0 to D5. This is for switching connection to addition nodes A1 to A3. The switch circuit 30 has a p-channel transistor (indicated by P) and an n-channel transistor (indicated by N) for each bit in each channel, and the p-channel transistor and the n-channel transistor are turned on and off alternately. It has become. In this embodiment, the other end of the shunt resistor of each channel is connected to the signal line of the reference voltage REFL when the p-channel transistor is on;
When the n-channel transistor is on, it is connected to current addition nodes A1 to A3. Further, 40 indicates an I/V conversion circuit including operational amplifiers OP1 to OP3 that convert the current at the current addition node of the corresponding channel into voltage to generate outputs OUT1 to OUT3, respectively.

In the above configuration, when the upper and lower limits of the reference voltage are input to the signal lines REFH and REFL, respectively, and the digital data D0 to D5 are set to each channel CH1 to CH3, the outputs OUT1 to O
An analog voltage corresponding to the digital value of each channel is output to the UT3. According to the configuration of FIG. 2, since the seven series resistors of resistance R/3 in the ladder resistor network 10 are used in common between each channel, the 3-channel D/3 resistor is The circuit scale of the A converter as a whole can be relatively reduced. Therefore, it is also possible to reduce manufacturing costs.

[0016]

[Effects of the Invention] As explained above, according to the present invention, D
When a multi-channel /A converter is installed, it is possible to reduce the circuit scale without significantly reducing accuracy, which greatly contributes to reducing manufacturing costs.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle configuration of a multi-channel D/A converter according to the present invention.

FIG. 2: 3-channel D/A as an embodiment of the present invention
FIG. 2 is a circuit diagram showing the configuration of a converter.

FIG. 3 is a circuit diagram showing the configuration of a multi-channel D/A converter as an example of a conventional type.

[Explanation of symbols]

1, 21 ~2n-1...Ladder-shaped resistance network 3...Switch circuit 4...Current/voltage (I/V) conversion circuit L1...First reference voltage L2...Second reference voltage D...Digital control data A1... An...Current addition node

Claims (1)

[Claims] [Claim 1] The number of channels is n and the number of input bits is m.
A current addition type D/A converter including m+1 resistors R/A converter connected in series between a signal line for a first reference voltage (L1) and a signal line for a second reference voltage (L2). a one-channel resistor ladder network (1) having n series resistors and m 2R shunt resistors, one end of which is connected to each input end of m of the series resistors; and m shunt resistors each having a resistance of 2R, one end of which is connected to each connection point of the series resistor and the shunt resistor, and the series resistors are shared as series resistors. An n-1 channel ladder resistor network (21 to 2n-1) configured in
D), the switch circuit (3) switches and connects the other ends of the m shunt resistors for each channel to the signal line of the second reference voltage or the current addition node (A1 to An) of the corresponding channel. ) and a current/voltage conversion circuit (4) that converts the current at the current addition node for each channel into a corresponding voltage, and the m+1
A multi-channel D/n characterized in that a series resistor with a resistance R/n of
A converter.