JPH04253032A - Manufacture of liquid crystal display device - Google Patents

Abstract

PURPOSE:To make the step coverage excellent and improve the yield by forming a conduction part as the 1st layer of a switching element, formed on a transparent insulating substrate, by a lift-off method. CONSTITUTION:The transparent insulating substrate 31 is coated with photoresist 32, which is patterned by removing resist corresponding to a gate, a gate line, and a storage element; and a gate material 33 is adhered to the entire surface. Then this resist is peeled and then the gate 34, gate line 35, and storage element 36 formed between photoresist parts 32 are formed gently by the lift-off method at the same time. Namely, the conductive film can be patterned only by the removal of the resist without etching the conductive film. Further, the difference in level at the side part of the conductive film can gently be formed, the step coverage is prevented from deteriorating, and the drain line is prevented from being broken or short-circuited.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly to a first layer component of a switching element constituting a liquid crystal display device, or one of a row line or a column line integrated with this component. The present invention relates to a method of manufacturing a liquid crystal display device which can form a step difference in a good manner, and which reduces defects in switching elements and improves the yield of the liquid crystal display device.

0002

2. Description of the Related Art There are generally two types of liquid crystal displays: segment display and matrix display. Here, the matrix display will be described. In particular, when displaying detailed images on televisions, etc., high-resolution images are required.
Matrix displays have started to attract attention. This active matrix display can be driven using a MOS transistor array, a thin film transistor array, a varistor element, or an MIM (metal insulator).
It can be roughly divided into driving methods using ulator (metal) elements. The above matters are described in detail in, for example, ``Latest Technology of Liquid Crystals'' published by Kogyo Research Association Co., Ltd. and ``Flat Panel Display 1991'' published by Nikkei BP.

These liquid crystal displays need to be dramatically improved by solving various problems such as an increase in the number of pixels, an increase in yield, and a decrease in cost. In particular, in order to increase the number of pixels, it is necessary to miniaturize the device, and to take urgent measures to prevent disconnections and short circuits in the conductive parts and active regions that make up the device, and to improve characteristics. Below, in order to specifically explain these problems,
76526, which describes an active matrix liquid crystal display device using TFTs, will be explained below.

First, in FIG. 14, reference number (10) is a transparent insulating substrate made of glass or the like. A transparent conductive film (11) made of ITO and Cr,
A metal film (12) made of Ni, Mo, etc. is formed, and the laminated films (11) and (12) are etched by photolithography to form a pixel electrode portion (13) in a matrix shape. Further, a gate electrode (14) and a gate line (15) corresponding to this pixel electrode (13) are formed.

[0005] Here, a resist pattern is formed on the metal film (12) by resist coating, exposure, and development.
Exposed metal film (12) and underlying transparent electrode (11)
The gate electrode (14) and gate line (
15) and a pixel electrode section (13). Subsequently, as shown in FIG. 15, a gate insulating film (16) and two amorphous silicon layers (17) and (18) are successively laminated using a plasma CVD method so as to cover the metal film (12). . Here, the gate insulating film (16) is a silicon nitride film, and the amorphous silicon layer consists of an active amorphous silicon layer (17) and an ion-doped amorphous silicon layer (18). The stacked gate insulating film (16) and two amorphous silicon layers (17) and (18) are then processed by photolithography, and here the gate electrode (14) and gate line (
The gate insulating film (16) and 2
Processing is performed so that the amorphous silicon layers (17) and (18) of the layers remain.

Next, as shown in FIG. 16, aluminum is deposited to cover the amorphous silicon layers (17) and (18), a resist film (19) is formed by photolithography, and a metal film (20) made of aluminum is formed. Etch the drain electrode (21) and drain line (22).
) and a source electrode (23) are formed. Furthermore, as shown in FIG. 17, the ion-doped amorphous silicon layer (18) exposed on the surface and the metal film (12) of the pixel electrode part (13) are removed with the resist film (19) remaining.
) is removed by etching.

Finally, when the resist film (19) is removed, a transparent pixel electrode (24) is formed on the upper surface of the insulating substrate (10) as shown in FIG. are formed in an electrically connected state.

[0008]

[Problems to be Solved by the Invention] The following problems occur in the above-mentioned manufacturing method. First of all, the gate electrode (
14) and the gate line (15), the resist forming part is not etched, but the resist non-forming part is etched, so as shown in FIG.
14) and the gate line (15) create a step. In particular, when anisotropic dry etching is performed, the stepped portions on the sides are formed at approximately right angles. Therefore, as shown in FIGS. 15 to 18, a gate insulating film (16), amorphous silicon layers (17), (18) and a drain electrode (2) are formed on this.
1) and the drain line (22) are stacked one on top of the other, the steps on the sides are almost perpendicular, resulting in poor step coverage and the problem of disconnection or short-circuiting of the drain line (22), etc.

Furthermore, as mentioned above, since this is a normal etching process in which the surface is covered with a resist, the etching shown in FIG.
In etching the gate electrode (14) and gate line (15) in step 4, there is a possibility that the glass substrate (10) will be etched, which may cause defects etc. in the glass substrate (10), which may affect the characteristics of the switching element. lead to deterioration. Also, during etching, a resist film is formed on the gate electrode (14) and gate line (15), and when this resist film forms the gate insulating film (16), the gate electrode (14) and gate line (15) are formed. There is a possibility that it exists as dust on line (15). Furthermore, since there is a possibility that the lower layer of the object to be etched may also be etched, there is a problem of deterioration of the characteristics of the switching element.

Furthermore, in the series of manufacturing steps shown in FIGS. 14 to 18, deposition of the object to be etched, deposition of the entire surface of the resist, pattern etching of the resist, and etching of the object through the patterned resist. Since etching is repeatedly performed, the number of steps increases, resulting in problems such as deterioration of characteristics and reduction in yield.

[0011]

[Means for Solving the Problems] The present invention has been made in view of the above-mentioned problems, and provides at least a first layer conductive portion (34) of a switching element (45) formed on a transparent insulating substrate (31). , (35) by the lift-off method.

0012

[Operation] First, the lift-off method will be explained. A resist is formed in a region other than the region where a structure is to be formed, and a desired resist pattern is formed. Subsequently, a conductive film, which is one of the components, is formed over the entire surface, and the resist is removed. As a result, a conductive film is formed between the removed resists.

The first effect produced by this method is that patterning of the conductive film can be realized only by removing the resist and without etching the conductive film. Therefore, in the process of forming the gate (34) and gate line (35), etching of the gate material is not required, which has the effect of reducing the number of steps. Here, lift-off is applied to the gate (34) and gate line (35), but it can also be performed after the gate formation process, so the number of steps can be further reduced. Therefore, by reducing the number of processes, the adhesion of dust can be reduced.
Defects can be reduced and yields can be prevented from decreasing.

[0014] The second effect is that, for example, the steps on the side portions of the conductive film, which is one of the components, can be formed smoothly. As mentioned above, when using methods such as sputtering and vapor deposition to deposit a conductive film between resists, the sides of the conductive film cannot be formed smoothly because the resist does not allow the deposited atoms or molecules to wrap around. It becomes possible. Therefore, it has the effect of preventing deterioration of step coverage and preventing disconnection and short circuits of drain lines and the like.

[0015]

[Example] The present invention will be explained below. As is clear from the above description, the present invention provides switching elements formed in a matrix on a transparent insulating substrate, and row lines or column lines electrically connected to the switching elements divided into a plurality of layers. For example, T
It has excellent effects in those using FT, those using TFD, etc.

In the lift-off method, formation of a structure such as a gate or a gate line (corresponding to a cathode electrode or an anode electrode in a TFD, or a row line or a column line connected to the cathode electrode or anode electrode) is performed using a patterned resist. In between, a conductive material for the gate or gate line is formed, and the resist is etched, leaving only the conductive material between the resists. At this time, the resist is formed to be thick, about 2 to 6 μm, and the conductive material is formed thin, about 2000 Å, compared to this resist. Therefore, when a conductive material is formed by, for example, sputtering or vapor deposition, due to the presence of the resist,
It becomes difficult for the conductive material to reach the side portions of the gate or gate line, and as a result, the gate or gate line can be formed smoothly.

As a result, the step coverage of the source electrode, drain electrode, and drain line formed on the gate or gate line via the insulating film is improved, and disconnection or short-circuiting of these electrodes can be prevented. In addition, since the gate or gate line can be formed in four steps: resist coating, resist patterning, deposition of the conductive material, and resist peeling, the number of steps can be reduced by one, so that an improvement in yield can be expected.

Moreover, since the lift-off method does not use an etching solution or etching gas for forming the gate or gate line, the insulating substrate around the gate or gate line is not etched. Therefore, further improvement in yield can be expected. The effects of utilizing lift-off have been generally described above, but one embodiment of a liquid crystal device using TFTs will be specifically described with reference to FIGS. 1 to 9.

First, an insulating substrate (31) that transmits light is prepared and cleaned. Next, a photoresist (32) is applied, the resist corresponding to the gate, gate line, and storage electrode is removed and patterned, and the entire surface is covered with gate material (33). Here, aluminum and titanium or aluminum and copper are used as gate materials and formed by sputtering. This is shown in Figure 1. The drawings below are divided into left and right by wavy lines, with the left side showing the transistor and the right side showing the drain terminal.

[0020] Subsequently, the resist is removed. Figure 2
As shown in FIG. 3, the resist is completely removed, and at the same time, a gate (34), a gate line (35), and a storage electrode (36) are formed between the resists (32). FIG. 11 is an enlarged plan view of the cell, in which the gate (34) and gate line (35) are shown by dotted lines above and below. Furthermore, storage electrodes (36) are formed vertically like a fishbone with dotted lines. The above steps are the first characteristic steps of the present invention, and because they are formed by a so-called lift-off method, the steps of the gate (34), gate line (35), and storage electrode (36) are formed gently. be done. That is, as shown in FIG. 1, the resist (32) becomes a wall when forming the gate material, making it difficult for the gate material to wrap around the region adjacent to the resist.

Subsequently, a ring-shaped mask such as a metal mask (39) is formed to cover the terminal portion of FIG. 12, here the gate terminal (37) and the drain terminal (38), and an insulating film (40) such as silicon ticker is formed. An amorphous silicon film (41) and a highly concentrated N-type amorphous silicon film (42) are formed. Also on this is a chromium film (43
) may be formed continuously or by sputtering.

The reason why the metal mask (39) is used in this process is that the drain line (44) and the drain terminal (3
8) This is because a contact hole is not formed when connecting the gate line (35) and the gate terminal (37). This is also because the temperature rises to about 300 degrees during CVD and the like. If there is a material other than metal that can withstand this high temperature, it may be used as a mask. Conventionally, a liquid crystal device is formed as shown in FIG. The small squares formed in a matrix in the center are a set of TFTs, display electrodes formed around the TFTs, gate lines (100), drain lines (101), auxiliary capacitors, and auxiliary capacitor lines (102). A drain line (101) extends from left to right and is connected to a drain terminal (103), and a relief line (104) is formed across the drain line (101). On the other hand, the gate line (100
) and an auxiliary capacitor line (102) extend, the gate line (100) is connected to the gate terminal (105), and the auxiliary capacitor line (102) is connected in parallel with a connection line (106) across the gate line (100). It is connected to the. This drain line (101) and relief line (104)
), since the connection line (106) and the gate line (100) cross, they cannot be formed in the same layer and are crossed over. Therefore, two contact holes are formed above and below one gate line. Furthermore, two pairs of contact holes are formed on the left and right sides for one drain line (101). This contact hole is
As the number of pixels increases and becomes smaller, yields decrease. In other words, since the number of contact holes is very large and also very small, this results in poor formation of contact holes, poor contact, and defects due to an increase in the number of steps. How to make contact will be explained in the description of the steps below, so it will be omitted here.

Subsequently, the metal mask (39) is removed and photoresist is applied to achieve the shape shown by the rectangular solid line on the gate (34) in FIG.
Exposure and development are performed, and the chromium film (43) and amorphous silicon (42) and (41) are chemically etched, leaving only the region corresponding to the gate of the TFT (45). Also, here, the intersection (46) of the gate line (35) and drain line (44) is also etched as shown by the solid line. Subsequently, the resist is removed. For the above, refer to FIG. 4.

Subsequently, as shown in FIG. 5, a transparent electrode material, here ITO (47), is formed on the entire surface. Furthermore, as shown in FIG. 6, a drain electrode (48), a drain line (44),
Patterning is performed so that the resist (51) remains on regions corresponding to the source electrode (49), display electrode (50), drain terminal (38), and gate terminal (37). After etching the ITO (47), the resist (5) is etched.
1), the chromium film (43) and amorphous silicon film (4) corresponding to the channel of the TFT (45) are
2) and peel off the resist (51). As a result, a shape as shown in FIG. 7 is achieved. In FIG. 11, the ITO (47) corresponds to the drawing number (52) indicated by a broken line, and includes a drain line (44), a drain electrode region formed integrally with this drain line (44),
A display electrode (50), a source electrode region formed integrally with the display electrode, and a drain terminal region formed integrally with the drain line (44) are continuously formed.

Here, as shown in FIG. 12, the relief line (
53) is omitted from explanation, but is made of the same material as the gate in the process of FIG. 1, and is formed in the first layer. Moreover, since the insulating film (40) is not formed with the metal mask (39) as shown in FIG. 3, the drain line and the drain terminal can be electrically connected without forming a contact hole, unlike the conventional example. As shown in Figure 9, the terminal part has a two-layer structure of ITO and chromium, but chromium may be omitted, or the ITO may not extend to the terminal part, and only chromium in contact with the ITO may be extended to the terminal part. It may be allowed to exist. Furthermore, since the auxiliary capacitance line (54) is also formed in the first layer in the process shown in FIG. 1 and is covered with a metal mask as shown in FIG. 3, the terminal surface of the gate line is covered with an insulating film (40). It is exposed without being exposed. Therefore, by the steps shown in FIGS. 5 and 6, the gate terminal (37) and the gate line (
35) can be electrically connected. This structure is shown in FIG. Although the three-layer structure here includes the gate line, ITO, and Ni, only the gate line may be extended to the terminal portion, or Ni may be omitted in FIG. 10.

Furthermore, as shown in FIG. 8, only the region that will become the pixel electrode is formed with resist (55), and the entire surface is coated with nickel (55).
6) Form. Here, nickel is formed by electroless plating, including the drain electrode (48) and the drain line (44).
), are formed on the source electrode (49) and drain terminal (38), and are done to reduce their resistance. Here, since nickel can be formed on the ITO by electroless plating, it can be formed with a so-called self-aligning function. Drain electrode (48), drain line (4
4) The source electrode (49) can be formed without shifting from the underlying ITO layer.

Finally, the resist (55) is peeled off,
Although not shown in FIG. 9, an overcoat is applied, the counter substrate on which the counter electrode is formed and the main substrate (31) are bonded together, and liquid crystal is injected thereinto to complete the process.

[0028]

Effects of the Invention As is clear from the above description, the conductive portion of the first layer of the switching element constituting the liquid crystal device,
For example, since the gate or gate line is formed by a lift-off method, the second conductive layer formed on the upper layer, here the source electrode, drain electrode, row line or column line (here drain line). Step coverage is improved, wire breakage and short circuits can be prevented, and yield can be improved.

Furthermore, because of the lift-off method, the number of steps can be reduced and the yield can be further improved. This process can be carried out in the process of forming the gate and gate line, or in the process of forming ITO, or the process of connecting the source electrode, drain electrode, and terminal in FIG. 8.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 2 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 3 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 4 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 5 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 6 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 7 is a cross-sectional view of a liquid crystal display device according to the present invention.

FIG. 8 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 9 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 10 is a cross-sectional view of a liquid crystal display device according to the present invention.

FIG. 11 is a plan view of a liquid crystal display device according to the present invention.

FIG. 12 is a schematic plan view of a liquid crystal display device according to the present invention.

FIG. 13 is a schematic plan view of a conventional liquid crystal display device.

FIG. 14 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 15 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 16 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 17 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 18 is a cross-sectional view of a conventional liquid crystal display device.

Claims (7)

[Claims] 1. A method for manufacturing a liquid crystal display device in which switching elements are formed in a matrix on a transparent insulating substrate, the method comprising: forming at least a first conductive layer of the switching elements on the insulating substrate; Part 1 is a method for manufacturing a liquid crystal display device characterized in that it is formed by a lift-off method. 2. The first layer conductive portion is a TFT (t
2. The method of manufacturing a liquid crystal display device according to claim 1, wherein the electrode is a gate of a thin film transistor or a lower electrode of an auxiliary capacitor. 3. The first layer conductive portion is a TFD (t
2. The method for manufacturing a liquid crystal display device according to claim 1, wherein the lower layer electrode is a thin film diode. [Claim 4] A step of preparing a transparent insulating substrate;
A step of depositing a photoresist on the insulating substrate except for the gate region of the TFT to be formed, a step of depositing a gate material of the TFT on the entire surface of the insulating substrate, and a step of peeling off the photoresist and The TFT is placed on an insulating substrate.
1. A method for manufacturing a liquid crystal display device, comprising at least the step of forming a gate. 5. The liquid crystal display according to claim 4, wherein in the step of forming the photoresist except for the gate region of the TFT, the photoresist is also formed except for the gate line region which is integrally formed with the gate. Method of manufacturing the device. 6. The method of manufacturing a liquid crystal display device according to claim 5, wherein the gate material of the TFT is deposited by sputtering. [Claim 7] A step of preparing a transparent insulating substrate;
A step of applying a photoresist to this insulating substrate, removing the photoresist corresponding to at least a gate region of a TFT to be formed on this insulating substrate, and depositing a gate material of the TFT on the entire surface of this insulating substrate. step, peeling off the photoresist and depositing the TF on the insulating substrate.
a step of sequentially laminating an insulating layer, an active layer made of a semiconductor material, and a contact layer made of a semiconductor material on the insulating substrate; and a step of laminating the contact layer and the active layer corresponding to the gate region in sequence. forming a transparent electrode in a region corresponding to a pixel electrode to be formed near the gate region; removing the contact layer corresponding to the channel region of the TFT; A method for manufacturing a liquid crystal display device, comprising the step of forming a source electrode and a drain electrode of the TFT.