JPH0426499B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] At least in a computer system having an interrupt function, for example, an interrupt is generated for step processing in a program to be debugged,
In the interrupt processing routine, changes in registers and flag contents due to the execution of one instruction before entering the interrupt processing are monitored, and a step flag is set, and from the time the step flag is set, the corresponding The interrupt processing routine monitors the time until the end of execution of the branch instruction to return to the original debugged program, and after recognizing the end of the branch instruction, steps are executed again during the execution of the first instruction after the return. It is designed to generate interrupts for processing.

[Industrial application field]

The present invention relates at least to a control method for performing step operations in a computer system having an interrupt function.

2. Description of the Related Art With recent remarkable progress in semiconductor technology, logic devices such as microprocessors are increasingly becoming highly integrated.

Furthermore, with the diversification of data to be processed, the functions of microprocessors have become more sophisticated, and highly integrated microprocessors have come to be equipped with a large number of registers. It's here.

However, conventionally, as a means of debugging computer system programs, the program has been debugged.
A one-step operation is known in which an instruction is executed and the internal state of the program is monitored at the time.
With this one-step operation, even if one instruction is executed, one
When one instruction is executed, the microprocessor is in a stopped state, so there is a problem that its internal state cannot be directly monitored.

On the other hand, in highly integrated microprocessors, when interrupt processing is started while the program to be debugged is being executed, the contents of many registers, flags, etc. provided in the microprocessor are Usually, a function is provided to save data to a stack area on random access memory (hereinafter referred to as RAM).

Also, in the interrupt processing routine, the internal state of the microprocessor can be copied onto the RAM and output to, for example, an external device.

Under these circumstances, if control can be performed to enter interrupt processing every time one instruction is executed, it can be expected that changes in the internal state of the microprocessor for each step operation can be monitored.

[Conventional technology]

FIG. 3 is a diagram schematically showing an example of conventional means for performing a one-step operation.

Generally, a state in which a processor does not execute a program is a 'HALT' state.

In this "HALT" state, the program counter is stopped and the program is disconnected from the bus.

In the conventional one-step operation, as shown in the figure, the instruction control unit 3 of the processor sends a signal to put the processor in the "HALT" state.
For example, the processor can be controlled externally to “run” the processor.
A one-step operation was performed by transitioning from the state to the "HALT" state.

[Problem that the invention seeks to solve]

Therefore, in a one-step operation using the "HALT" state of a processor, as in the conventional method, the processor is completely stopped after executing one instruction, and as mentioned above, the processor is highly integrated. In the case of microprocessors such as
There was a problem in that it was not possible to monitor changes in the internal state each time a step was executed.

In view of the above conventional drawbacks, the present invention provides a function to save the contents of the internal registers of the microprocessor to a stack area on RAM, for example, when the microprocessor enters interrupt processing, as described above. Alternatively, by focusing on the fact that the contents of arbitrary registers and flags can be copied to RAM and output to an external device within the interrupt processing routine, it is possible to copy the contents of arbitrary registers and flags to RAM and output them to an external device. The object of the present invention is to provide a method that allows a microprocessor to enter interrupt processing and monitor changes in the internal state of a microprocessor each time an instruction is executed while performing step operations.

[Means for solving problems]

FIG. 1 is a principle block diagram of the step control system of the present invention.

When a microprocessor enters interrupt processing for step processing while executing a program to be debugged, for example due to a key operation by an operator, the state changes of internal registers, etc. of the microprocessor are stored in the RAM. After monitoring by looking at the stack area above, etc., the step flag 1 is turned on by inputting a command from the operator, etc., and the output of the step flag 1 is sent to the time monitoring section 2. input.

In the time monitoring unit 2, from the time when the step flag 1 becomes "on", for example, clocks are counted, and a branch (RTi) is executed to return from the interrupt processing to the original program to be debugged.
The end of the instruction is monitored, and the point at which a predetermined number of clocks is counted is recognized as the end point of the branch (RTi) instruction, and an interrupt signal for the next step processing is generated, and the branch (RTi) is started. The step flag 1 is configured to be reset by a microinstruction or the like that executes the RTi) instruction.

[Effect]

That is, according to the present invention, at least in a computer system having an interrupt function, for example, an interrupt for step processing is generated in a program to be debugged, and the interrupt processing is started in the interrupt processing routine. It monitors changes in registers and flag contents caused by the execution of the previous instruction, sets a step flag, and returns to the original debugged program from the interrupt processing routine from the point at which the step flag is set. The system monitors the time until the end of the execution of the branch instruction, and when the completion of the branch instruction is recognized, an interrupt for step processing is generated again during the execution of the first instruction after the return. Therefore, for example, it is possible to monitor changes in the internal registers of the microprocessor and flags every time one instruction is executed, which has the effect of improving program debugging efficiency.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.
FIG. 2 is a flowchart showing the operation when a one-step operation is performed in accordance with the present invention. Hereinafter, the step operation control method of the present invention will be explained with reference to FIG.

First, while a program, for example a microprocessor, is executing the program to be debugged (indicated by a thick line), an interrupt factor for step processing is set by an operator's console operation or the like. Then, the interrupt processing routine is entered.

At the time when the interrupt processing routine is entered, the contents of internal registers updated by one instruction executed before entering the interrupt processing are updated, for example.
Since it is saved in the stack area on RAM, in the interrupt processing routine, the contents of the necessary registers are read from the stack area and output to an external device, etc., so that after execution of one instruction of the microprocessor, monitor the status of

(See step 10) After this, the program waits in a loop to see if a command instructing a step operation has been input. (See step 11) Here, when the operator inputs the above-mentioned "step operation instruction command" to set the step flag to "on", the above-mentioned interrupt processing loop executes the command, for example, It is recognized by looking at a specific flag bit and branches to the corresponding step flag processing routine to set step flag 1 explained in FIG. 1 to "on". (See step 12) When the step flag 1 turns "on," the time monitoring section 2 counts the clocks since the step flag 1 turns "on."
The point in time when a predetermined number of clocks has been counted is the point at which the execution of the branch instruction (RTi) for returning from the interrupt handling routine to the original debugged program ends, and the branch instruction (RTi) end signal is output. . (See step 13) When the branch instruction (RTi) end signal is output,
Since the microprocessor is currently executing the next instruction of the program to be debugged, by using this signal as an interrupt signal for step processing, the microprocessor will be able to execute the next instruction of the program to be debugged. , again functions to enter interrupt processing for the above step processing.

After that, the same operation is repeated to execute one instruction of the program to be debugged, and each time the interrupt handling routine for step processing is entered, so that the microprogram after executing one instruction of the program to be debugged is Changes in the internal state of the setter can be monitored.

The number of clocks mentioned above depends on the relative position of the instruction that sets step flag 1 (step 12) and the branch (RTi) instruction (step 13), and how many clocks have passed since step flag 1 was set. At first glance, it is possible to know whether the branch (RTi) instruction is completed or not, so the time monitoring unit 2 in FIG. What is necessary is just to configure it so that the signal to be generated is output.

In this way, the present invention focuses on the fact that the contents of the internal registers of a highly integrated microprocessor can be read in the interrupt processing routine, and when a step operation is desired, it is possible to read the contents of the internal registers of a highly integrated microprocessor. In the interrupt processing routine for interrupt processing, a step flag is set to "on" and the time that the step flag is "on" is monitored to identify the end point of a branch instruction for returning from the interrupt processing to the original program. The present invention is characterized in that an interrupt for the above-mentioned step processing is generated when the next instruction of the original program is completed by the branch instruction end signal.

〔Effect of the invention〕

As explained above in detail, the step operation control method of the present invention generates an interrupt for step processing in a program to be debugged, for example, in a computer system having an interrupt function, and handles the interrupt. In the routine, changes in the contents of registers and flags caused by the execution of one instruction before starting the interrupt processing are monitored, and a step flag is set, and from the point when the step flag is set, the interrupt processing starts. The routine monitors the time until the end of execution of the branch instruction to return to the original debugged program, and when the completion of the branch instruction is recognized, the step process is restarted during the execution of the first instruction after the return. For example, the internal registers of a microprocessor,
Changes in flags can be monitored every time one instruction is executed, which has the effect of improving program debugging efficiency.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram of the step control method of the present invention, Fig. 2 is a flowchart showing the operation when one step operation is performed by implementing the present invention, and Fig. 3
The figure is a diagram schematically showing an example of means for performing a conventional one-step operation. In the drawing, 1 is a step flag, 2 is a time monitoring section, 3 is an instruction control section, and 10 to 13 are conventional 1
In each step of the step operation, , indicates the interrupt time, and indicates the interrupt signal for step processing, respectively.

Claims (1)

[Claims] 1. At least, in a computer system having an interrupt function, an interrupt for step processing is generated in a currently executing program, and a step flag 1 is set in the interrupt processing routine for the step processing. By setting the step flag 1, a time monitoring section 2 is provided which monitors a specific time from the time when the step flag 1 is set, and the time monitoring section 2 is used to perform a process for returning from the interrupt handling routine to the original program. When the execution of the branch instruction is finished and it is recognized that the first instruction after the return is being executed, the recognition signal causes the execution of the above-mentioned first instruction after the return to be executed again.
A step operation control method characterized in that control is performed to generate an interrupt for the step processing.