JPH04267453A - Direct memory access device - Google Patents

Abstract

PURPOSE:To provide a direct memory access device capable of the automatic transfer of a large amount of complicated data. CONSTITUTION:A memory device 30 or a peripheral equipment 40 is selected by a source address counter 10 and the output data are stored in a data retention device 60. The memory device 30 or the peripheral equipment 40 is selected by a destination address counter 70, and the output data are outputted to a data register 30. The calculation of the respective data of the data register 30 and the data retention device 60 is performed in an operation device 140. By executing these operations while making the source address counter 10 and the destination address counter 70 incremental, decremental or fixed, a large amount of complicated data can be automatically transferred.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a direct memory access device that enables automatic transfer of complex data.

0002

2. Description of the Related Art FIG. 2 is a block diagram showing an example of a conventional direct memory access device, in which 10 is a source address counter for generating a transfer source address for automatic data transfer, and 70 is a source address counter for generating a transfer source address for automatic data transfer. 20 is an address bus that outputs the address generated by the source address counter 10 and the destination address counter; 30 is a memory device selected by the address bus 20; 40 is a memory device selected by the address bus 20; A peripheral device is selected by the address bus 20, 50 is a data bus that connects the input/output of the memory device 30 and the peripheral device 40, 60 is a data holding device that temporarily stores output data to the data bus 50, and 80 is a direct memory access 90 is a comparison device that compares the values of the source address counter 10 and the stop address storage device 80; 100 is a comparison device 90 that compares the values of the source address counter 10 and the stop address storage device 80; This is a direct memory access end signal that ends the operation of the direct memory access device when the values are equal.

To explain the operation of this conventional example, an address generated by a source address counter 10 selects a memory device 30 or a peripheral device 40 through an address bus 20, and outputs its output data to a data bus 50. The data output to the data bus 50 is temporarily held in a data holding device 60. Next, the address generated by the destination address counter 70 selects the memory device 30 or the peripheral device 40 via the address bus 20, and outputs the data temporarily held in the data holding device 60 to this via the data bus 50.

These operations are performed using the source address counter 1.
The source address counter 90 is incremented or decremented by 0 and the destination counter 70 is incremented or decremented or fixed.
Comparing device 90 compares the value of and the value of stop address storage device 80.
Automatic transfer of large amounts of data is achieved by comparing the values continuously until the values are equal.

[0005]

[Problems to be Solved by the Invention] However, in the above conventional example, when automatically transferring a data string whose data length is not fixed, it is necessary to calculate the stop address for direct memory access every time a transfer is started, and the data If you are simply transferring automatically and need to perform processing such as masking only certain bits (logical AND operation), mask the data in advance or mask the transferred data before using it using software. The processing became complicated and it was difficult to improve the processing speed.

[0006]

[Means for Solving the Problems] In order to solve the above problems, a direct memory access device of the present invention provides:
at least one pair of pointer address generation means, a storage means for reading and writing specific data using an address specified by the pointer address generation means as address information, and a storage means for temporarily storing data read from the storage means; a temporary storage means for outputting data stored when writing to the memory; a first register means for storing a specific data pattern; , a second register means for storing specific data, and a comparison means for comparing the output of the second register means and the output of the temporary storage means.

[0007]

According to the present invention, it is possible to obtain a direct memory access device that enables automatic transfer of complex data.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a first embodiment of the present invention, which is different from the conventional example shown in FIG. Comparing means 120 for comparing the values of the stop data storage device 110, the data holding device 60, and the stop data storage device so as to determine the end condition when a certain data pattern is recognized without determining the access end condition. Additionally, a data register means 130 for storing a specific data pattern in advance, and an output of the data register means 130 and a data holding device 6
An arithmetic unit means 140 for calculating an output of 0 is added, and the result of the arithmetic unit means 140 is outputted when writing to the memory device 30 or the peripheral device 40.

To explain the operation of this embodiment, the address generated by the source address counter 10 selects the memory device 30 or the peripheral device 40 through the address bus 20, and outputs the output data to the data bus 50. The data output to the data bus 50 is temporarily held in a data holding device 60. Next, the address generated by the destination address counter 70 selects the memory device 30 or the peripheral device 40 through the address bus 20, and sets the data temporarily held in the data holding device 60 and the data register means 130 thereto. The arithmetic unit means 140 performs arithmetic operations on the stored data and outputs the result through the data bus 50.

These operations are performed by the source address counter 1.
0 is incremented or decremented, the destination counter 70 is incremented, decremented, or fixed, and the value of the data holding device 60 and the value of the stop data storage device 110 are compared by the comparator 120, and the comparison continues until the values become equal. and do it.

Furthermore, if the operation of the arithmetic unit means 140 is set to, for example, an AND operation, and data is set in the data register 130 to set only the least significant bit to '1', all data other than the least significant bit of the data of the transfer source are always transferred. Transfer can now be performed by setting the bit to '0', making it possible to automatically transfer a large amount of complex data. Of course, the computing unit means 1
40 can perform logical operations, arithmetic operations, and the like.

[0013]

Effects of the Invention As is clear from the above description, the direct memory access device of the present invention includes one or more sets of pointer address generation means and an address designated by the pointer address generation means for generating specific data by using the address specified by the pointer address generation means as address information. storage means for reading and writing, temporary storage means for temporarily storing data read from the storage means and outputting the stored data when writing to the storage means, and first register means for storing a specific data pattern. and calculating the output of the temporary storage means and the output of the first register means,
an arithmetic means for outputting an arithmetic result when writing into the storage means; a second register means for storing specific data; and a comparison means for comparing the output of the second register means and the output of the temporary storage means. With this, it is possible to obtain a direct memory access device that enables automatic transfer of complex data.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a direct memory access device according to an embodiment of the present invention.

[Fig. 2] A configuration diagram of a direct memory access device in a conventional embodiment.

[Explanation of symbols]

10 Source address counter 20 Address bus 30 Memory device 40 Peripheral device 50 Data bus 60 Data holding device 70 Destination address counter 80
Stop address storage device 90 Address comparison device 110 Stop data storage device 120 Data comparison means 130 Data register 140 Arithmetic unit

Claims (1)

[Claims] Claim 1: One or more sets of pointer address generation means;
Storage means for reading and writing specific data using the address specified by the pointer address generation means as address information, and temporarily storing the data read from the storage means and outputting the stored data when writing to the storage means. temporary storage means for storing a specific data pattern; first register means for storing a specific data pattern;
a calculation means for calculating the output of the register means and outputting the calculation result when writing to the storage means; a second register means for storing specific data; and an output of the second register means and the temporary storage means. A direct memory access device having comparison means for comparing the outputs of.