JPH0427172Y2 - - Google Patents

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Publication number
JPH0427172Y2
JPH0427172Y2 JP14560086U JP14560086U JPH0427172Y2 JP H0427172 Y2 JPH0427172 Y2 JP H0427172Y2 JP 14560086 U JP14560086 U JP 14560086U JP 14560086 U JP14560086 U JP 14560086U JP H0427172 Y2 JPH0427172 Y2 JP H0427172Y2
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JP
Japan
Prior art keywords
external lead
plug
semiconductor device
semiconductor element
lead pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14560086U
Other languages
Japanese (ja)
Other versions
JPS6351459U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14560086U priority Critical patent/JPH0427172Y2/ja
Publication of JPS6351459U publication Critical patent/JPS6351459U/ja
Application granted granted Critical
Publication of JPH0427172Y2 publication Critical patent/JPH0427172Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は半導体素子を収納するためのプラグイ
ン型半導体素子収納用パツケージの改良に関する
ものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an improvement of a plug-in type semiconductor device housing package for housing a semiconductor device.

〔従来の技術〕[Conventional technology]

従来、半導体素子、特に半導体集積回路素子を
収納するためのプラグイン型半導体素子収納用パ
ツケージは、第2図に示すように、セラミツクス
等の電気絶縁材料から成り、その上面の略中央部
に半導体素子を収納するための凹部及び該凹部周
辺から底面にかけて導出されたタングステン
(W)、モリブデン(Mo)等の金属粉末から成る
メタライズ金属層12を有する絶縁基体11と、
半導体素子を外部回路に電気的に接続するために
前記メタライズ金属層12に銀ロウ等のロウ材を
介し取着された多数の外部リードピン13と蓋体
14とから構成されており、その内部に半導体素
子15が収納され、気密封止されて半導体装置と
なる。
Conventionally, a plug-in type semiconductor device storage package for storing semiconductor devices, especially semiconductor integrated circuit devices, is made of an electrically insulating material such as ceramics, and a semiconductor device is placed approximately in the center of the top surface of the package, as shown in FIG. an insulating base 11 having a recess for accommodating an element and a metallized metal layer 12 made of metal powder such as tungsten (W) or molybdenum (Mo) derived from the periphery of the recess to the bottom surface;
It is composed of a large number of external lead pins 13 and a lid body 14 attached to the metallized metal layer 12 through a brazing material such as silver solder in order to electrically connect the semiconductor element to an external circuit. The semiconductor element 15 is housed and hermetically sealed to form a semiconductor device.

また前記絶縁基体11の底面で、半導体素子1
5が収納される凹部下方には銅−鉄合金(Cu−
Fe)等から成る放熱板16が取着されており、
該放熱板16は半導体素子15が作動時等に発す
る熱を吸収し、大気中に放出させることによつて
半導体素子15に熱破壊や特性に熱劣化が生じる
のを有効に防止している。
Further, on the bottom surface of the insulating base 11, the semiconductor element 1
A copper-iron alloy (Cu-
A heat sink 16 made of Fe) or the like is attached.
The heat sink 16 absorbs heat generated by the semiconductor element 15 during operation and releases it into the atmosphere, thereby effectively preventing thermal damage to the semiconductor element 15 or thermal deterioration of its characteristics.

尚、この従来のプラグイン型半導体素子収納用
パツケージでは、外部リードピン13をメタライ
ズ金属層12に強固にロウ付けするために通常、
外部リードピン13が取着されるメタライズ金属
層12の露出外表面にはロウ材と濡れ性が良いニ
ツケル(Ni)がめつき方法により被着されてい
る。
In addition, in this conventional plug-in type semiconductor device storage package, in order to firmly braze the external lead pins 13 to the metallized metal layer 12,
The exposed outer surface of the metallized metal layer 12 to which the external lead pin 13 is attached is coated with nickel (Ni), which has good wettability with brazing material, by a plating method.

〔考案が解決しようとする問題点〕[Problem that the invention aims to solve]

しかし乍ら、この従来のプラグイン型半導体素
子収納用パツケージは、絶縁基体の底面に大面積
の放熱板が取着されていることから外部リードピ
ンを取着し得る面積が小であり、そのため近時の
半導体素子の高密度化、高集積化の進展に伴う半
導体素子の電極数の増大に対応して外部リードピ
ンの数が急増した場合、絶縁基体11の底面を極
めて大きなものにして外部リードピンの取着し得
る面積を大としなければならず、その結果、半導
体素子を収納するパツケージの形状が極めて大型
となる欠点を有していた。また更に、このプラグ
イン型半導体素子収納用パツケージを実装する電
気回路基板も必然的に大きくならざるを得ず、小
型化が進む電子機器においては、その実用に供し
なくなるという欠点も有していた。
However, since this conventional plug-in type package for housing semiconductor devices has a large-area heat sink attached to the bottom of the insulating base, the area where external lead pins can be attached is small. When the number of external lead pins increases rapidly in response to the increase in the number of electrodes on semiconductor devices as semiconductor devices become more dense and highly integrated, the bottom surface of the insulating substrate 11 is made extremely large to increase the number of external lead pins. This has the disadvantage that the mounting area must be increased, and as a result, the shape of the package housing the semiconductor element becomes extremely large. Furthermore, the electric circuit board on which this plug-in type semiconductor element storage package is mounted must inevitably become large, which also has the disadvantage that it becomes unusable in electronic devices that are becoming smaller. .

〔考案の目的〕[Purpose of invention]

本考案は上記欠点に鑑み案出されたもので、そ
の目的は内部に収納する半導体素子の発する熱を
良好に吸収除去し、半導体素子が熱破壊したり、
特性に熱劣化を生じたりするのを皆無となすこと
ができる小型のプラグイン型半導体素子収納用パ
ツケージを提供することにある。
The present invention was devised in view of the above-mentioned drawbacks, and its purpose is to effectively absorb and remove the heat generated by the semiconductor elements housed inside, thereby preventing the semiconductor elements from being thermally destroyed.
It is an object of the present invention to provide a small plug-in type semiconductor device housing package that can completely eliminate thermal deterioration of characteristics.

〔問題点を解決するための手段〕[Means for solving problems]

本考案は内部に半導体素子を載置収納するため
の空所を有する絶縁容器の底面に多数の外部リー
ドピンを取着して成るプラグイン型半導体素子収
納パツケージにおいて、前記絶縁容器の内部空所
の少なくとも下方に位置する外部リードピンを熱
伝導率が0.6cal/sec・℃以上の金属で形成した
ことを特徴とするものである。
The present invention provides a plug-in type semiconductor device storage package comprising a plurality of external lead pins attached to the bottom of an insulating container having a cavity for mounting and storing semiconductor devices therein. It is characterized in that at least the external lead pin located below is formed of a metal having a thermal conductivity of 0.6 cal/sec·°C or more.

〔実施例〕〔Example〕

次に、本考案を添付の第1図に示す実施例に基
づき詳細に説明する。
Next, the present invention will be explained in detail based on the embodiment shown in the attached FIG. 1.

第1図は本考案のプラグイン型半導体素子収納
用パツケージの一実施例を示し、1はアルミナセ
ラミツクス等の電気絶縁材料から成る絶縁基体で
あり、2は同じく電気絶縁材料から成る蓋体であ
る。この絶縁基体1と蓋体2とで絶縁容器が構成
される。
FIG. 1 shows an embodiment of the plug-in type semiconductor device storage package of the present invention, in which 1 is an insulating base made of an electrically insulating material such as alumina ceramics, and 2 is a lid also made of an electrically insulating material. . This insulating base 1 and lid 2 constitute an insulating container.

前記絶縁基体1にはその上面中央部に半導体素
子を収納するための凹部が設けてあり、凹部底面
には半導体素子3が接着材を介し取着される。
The insulating substrate 1 has a recessed portion in the center of its upper surface for accommodating a semiconductor element, and a semiconductor element 3 is attached to the bottom surface of the recessed portion through an adhesive.

また、前記絶縁基体1の凹部周辺から底面にか
けてメタライズ金属層4が被着形成されており、
メタライズ金属層4の凹部周辺部には半導体素子
3の電極がワイヤ5を介し電気的に接続され、ま
た基体1底面部には外部リードピン6がロウ材を
介しロウ付けされる。
Further, a metallized metal layer 4 is formed on the insulating substrate 1 from the periphery of the recess to the bottom surface,
The electrodes of the semiconductor element 3 are electrically connected to the periphery of the concave portion of the metallized metal layer 4 via wires 5, and external lead pins 6 are brazed to the bottom surface of the base 1 via a brazing material.

前記絶縁基体1及びメタライズ金属層4は、例
えばセラミツク生シートを複数枚準備し、それぞ
れの生シートの上面及び生シートに形成した貫通
孔内にタングステン等の金属粉末から成るメタラ
イズペーストを厚膜手法によつて印刷塗布し、し
かる後、これらを積層するとともに焼結一体化さ
せることによつて形成される。
The insulating substrate 1 and the metallized metal layer 4 can be made by preparing a plurality of raw ceramic sheets, for example, and applying a metallizing paste made of metal powder such as tungsten on the upper surface of each raw sheet and in the through holes formed in the raw sheet using a thick film method. They are formed by printing and coating them, then laminating them and sintering them into one piece.

前記絶縁基体1の底面に取着された外部リード
ピン6は内部に収納される半導体素子3を外部回
路と接続する作用を為し、外部リードピン6を外
部回路に設けたソケツト等に挿入接続することに
よつて内部に収納される半導体素子3はメタライ
ズ金属層4及び外部リードピン6を介し外部回路
と接続されることとなる。
The external lead pins 6 attached to the bottom surface of the insulating base 1 function to connect the semiconductor element 3 housed inside to an external circuit, and the external lead pins 6 can be inserted and connected to a socket or the like provided in the external circuit. As a result, the semiconductor element 3 housed inside is connected to an external circuit via the metallized metal layer 4 and external lead pins 6.

また、前記絶縁基体1底面部のメタライズ金属
層4の外表面には外部リードピン6を強固にロウ
付けするためにロウ材との濡れ性が優れたニツケ
ル(Ni)等の金属がめつき方法により被着され
ている。
Further, the outer surface of the metallized metal layer 4 on the bottom surface of the insulating substrate 1 is coated with a metal such as nickel (Ni), which has excellent wettability with brazing material, by a plating method in order to firmly braze the external lead pins 6. It is worn.

かくして、本考案のプラグイン型半導体素子収
納用パツケージによれば、絶縁基体1の凹部底面
に半導体素子3を取着固定するとともに該半導体
素子3の各電極をワイヤ5によりメタライズ金属
層4に接続させた後、絶縁基体1と蓋体2とをガ
ラス、樹脂等の封止部材で取着させることにより
その内部に半導体素子3を気密に封止し、半導体
装置となる。
Thus, according to the plug-in type semiconductor device storage package of the present invention, the semiconductor device 3 is attached and fixed to the bottom surface of the recess of the insulating substrate 1, and each electrode of the semiconductor device 3 is connected to the metallized metal layer 4 by the wire 5. After this, the insulating base 1 and the lid 2 are attached using a sealing member such as glass or resin, thereby airtightly sealing the semiconductor element 3 therein, thereby forming a semiconductor device.

本考案においては絶縁容器の底面に取着される
外部リードピンのうち絶縁容器の少なくとも内部
空所の下方に位置するものを熱伝導率が0.6cal/
cm・sec・℃以上の金属で形成しておくことが重
要である。このため第1図に示す実施例では絶縁
基体1の底面で半導体素子3が収納される空所の
下方にはCu99.15wt%−Cd0.85wt%、Cu99.05wt
%−Cr0.85wt%−Si0.1wt%、Cu99.85wt%−
Zr0.15wt%、Ag95wt%−Cu5wt%、Ag10wt%
−Cu90wt%等の熱伝導率が0.6Ccal/cm・sec・
℃以上の金属から成る外部リードピン6aが取着
されている。このように絶縁容器の底面に取着さ
れた外部リードピンのうち半導体素子が収納され
る空所の下方に位置するものを熱伝導率が
0.6cal/cm・sec・℃以上の金属で形成すると該
外部リードピンに半導体素子が発する熱を良好に
吸収除去させることができ放熱板の取着を不要と
してプラグイン型半導体素子収納用パツケージを
小型となすことができる。
In the present invention, among the external lead pins attached to the bottom of the insulating container, those located below at least the internal cavity of the insulating container have a thermal conductivity of 0.6 cal/
It is important to form it with a metal with a temperature of cm・sec・℃ or higher. Therefore, in the embodiment shown in FIG. 1, Cu99.15wt% - Cd0.85wt%, Cu99.05wt%
%-Cr0.85wt%-Si0.1wt%, Cu99.85wt%-
Zr0.15wt%, Ag95wt% - Cu5wt%, Ag10wt%
-Thermal conductivity of Cu90wt% etc. is 0.6Ccal/cm・sec・
An external lead pin 6a made of metal with a temperature of 0.degree. C. or higher is attached. Among the external lead pins attached to the bottom of the insulating container, those located below the cavity where the semiconductor element is housed have a high thermal conductivity.
When made of metal with a temperature of 0.6cal/cm・sec・℃ or higher, the external lead pins can effectively absorb and remove the heat generated by the semiconductor element, making it unnecessary to attach a heat sink and making the plug-in type package for storing semiconductor elements smaller. can be done.

尚、前記外部リードピンはCu−Cd,Ag−Cu
等の金属を従来周知の金属加工法(プレス成形
法)により所定形状に成形することによつて形成
される。
Note that the external lead pins are Cu-Cd, Ag-Cu.
It is formed by forming a metal such as into a predetermined shape by a conventionally well-known metal processing method (press molding method).

〔考案の効果〕[Effect of idea]

本考案のプラグイン型半導体素子収納用パツケ
ージによれば、絶縁容器に取着される外部リード
ピンのうち容器の少なくとも空所の下方に位置す
る外部リードピンを熱伝導率が0.6cal/cm・
sec・℃以上の金属で形成したことから絶縁容器
の内部に収納する半導体素子の発する熱は前記外
部リードピンに良好に吸収されて除去され、半導
体素子に熱破壊や特性に熱劣化を来すことは一切
ない。
According to the plug-in type package for housing semiconductor devices of the present invention, the external lead pins located below at least the cavity of the container among the external lead pins attached to the insulating container have a thermal conductivity of 0.6 cal/cm.
Since it is made of metal with a temperature of sec/°C or higher, the heat generated by the semiconductor element housed inside the insulating container is well absorbed and removed by the external lead pins, thereby preventing thermal damage or thermal deterioration of the characteristics of the semiconductor element. There is nothing.

また外部リードピンが半導体素子の熱を吸収、
除去することから半導体素子の熱を吸収除去する
放熱板は一切不要であり、プラグイン型半導体素
子収納用パツケージを小型と成すこともできる。
In addition, the external lead pin absorbs the heat of the semiconductor element,
Since the heat dissipation plate is removed, a heat sink for absorbing and removing heat from the semiconductor element is not required at all, and the plug-in type semiconductor element housing package can be made smaller.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のプラグイン型半導体素子収納
用パツケージの一実施例を示す断面図、第2図は
従来のプラグイン型半導体素子収納用パツケージ
の断面図である。 1……絶縁基体、2……蓋体、6……外部リー
ドピン。
FIG. 1 is a sectional view showing an embodiment of a plug-in type semiconductor device storage package according to the present invention, and FIG. 2 is a sectional view of a conventional plug-in type semiconductor device storage package. 1... Insulating base, 2... Lid, 6... External lead pin.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 内部に半導体素子を載置収納するための空所を
有する絶縁容器の底面に多数の外部リードピンを
取着して成るプラグイン型半導体素子収納パツケ
ージにおいて、前記絶縁容器の内部空所の少なく
とも下方に位置する外部リードピンを熱伝導率が
0.6cal/cm/sec・℃以上の金属で形成したこと
を特徴とするプラグイン型半導体素子収納用パツ
ケージ。
In a plug-in type semiconductor device storage package comprising a plurality of external lead pins attached to the bottom of an insulating container having a cavity for mounting and storing semiconductor devices therein, at least below the internal cavity of the insulating container. The thermal conductivity of the external lead pin located
A plug-in type semiconductor device storage package characterized by being made of metal with a temperature of 0.6 cal/cm/sec/°C or higher.
JP14560086U 1986-09-22 1986-09-22 Expired JPH0427172Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14560086U JPH0427172Y2 (en) 1986-09-22 1986-09-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14560086U JPH0427172Y2 (en) 1986-09-22 1986-09-22

Publications (2)

Publication Number Publication Date
JPS6351459U JPS6351459U (en) 1988-04-07
JPH0427172Y2 true JPH0427172Y2 (en) 1992-06-30

Family

ID=31057291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14560086U Expired JPH0427172Y2 (en) 1986-09-22 1986-09-22

Country Status (1)

Country Link
JP (1) JPH0427172Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2892687B2 (en) * 1989-06-14 1999-05-17 株式会社日立製作所 Package for semiconductor device

Also Published As

Publication number Publication date
JPS6351459U (en) 1988-04-07

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